pax_global_header00006660000000000000000000000064147717513110014521gustar00rootroot0000000000000052 comment=73291884d926445e499d6b9b71cb7a9bdbc7c393 nvtop-3.2.0/000077500000000000000000000000001477175131100126715ustar00rootroot00000000000000nvtop-3.2.0/.clang-format000066400000000000000000000116111477175131100152440ustar00rootroot00000000000000--- Language: Cpp # BasedOnStyle: LLVM AccessModifierOffset: -2 AlignAfterOpenBracket: Align AlignArrayOfStructures: None AlignConsecutiveMacros: None AlignConsecutiveAssignments: None AlignConsecutiveBitFields: None AlignConsecutiveDeclarations: None AlignEscapedNewlines: Right AlignOperands: Align AlignTrailingComments: true AllowAllArgumentsOnNextLine: true AllowAllConstructorInitializersOnNextLine: true AllowAllParametersOfDeclarationOnNextLine: true AllowShortEnumsOnASingleLine: true AllowShortBlocksOnASingleLine: Never AllowShortCaseLabelsOnASingleLine: false AllowShortFunctionsOnASingleLine: All AllowShortLambdasOnASingleLine: All AllowShortIfStatementsOnASingleLine: Never AllowShortLoopsOnASingleLine: false AlwaysBreakAfterDefinitionReturnType: None AlwaysBreakAfterReturnType: None AlwaysBreakBeforeMultilineStrings: false AlwaysBreakTemplateDeclarations: MultiLine AttributeMacros: - __capability BinPackArguments: true BinPackParameters: true BraceWrapping: AfterCaseLabel: false AfterClass: false AfterControlStatement: Never AfterEnum: false AfterFunction: false AfterNamespace: false AfterObjCDeclaration: false AfterStruct: false AfterUnion: false AfterExternBlock: false BeforeCatch: false BeforeElse: false BeforeLambdaBody: false BeforeWhile: false IndentBraces: false SplitEmptyFunction: true SplitEmptyRecord: true SplitEmptyNamespace: true BreakBeforeBinaryOperators: None BreakBeforeConceptDeclarations: true BreakBeforeBraces: Attach BreakBeforeInheritanceComma: false BreakInheritanceList: BeforeColon BreakBeforeTernaryOperators: true BreakConstructorInitializersBeforeComma: false BreakConstructorInitializers: BeforeColon BreakAfterJavaFieldAnnotations: false BreakStringLiterals: true ColumnLimit: 120 CommentPragmas: '^ IWYU pragma:' CompactNamespaces: false ConstructorInitializerAllOnOneLineOrOnePerLine: false ConstructorInitializerIndentWidth: 4 ContinuationIndentWidth: 4 Cpp11BracedListStyle: true DeriveLineEnding: true DerivePointerAlignment: false DisableFormat: false EmptyLineAfterAccessModifier: Never EmptyLineBeforeAccessModifier: LogicalBlock ExperimentalAutoDetectBinPacking: false FixNamespaceComments: true ForEachMacros: - foreach - Q_FOREACH - BOOST_FOREACH IfMacros: - KJ_IF_MAYBE IncludeBlocks: Preserve IncludeCategories: - Regex: '^"(llvm|llvm-c|clang|clang-c)/' Priority: 2 SortPriority: 0 CaseSensitive: false - Regex: '^(<|"(gtest|gmock|isl|json)/)' Priority: 3 SortPriority: 0 CaseSensitive: false - Regex: '.*' Priority: 1 SortPriority: 0 CaseSensitive: false IncludeIsMainRegex: '(Test)?$' IncludeIsMainSourceRegex: '' IndentAccessModifiers: false IndentCaseLabels: false IndentCaseBlocks: false IndentGotoLabels: true IndentPPDirectives: None IndentExternBlock: AfterExternBlock IndentRequires: false IndentWidth: 2 IndentWrappedFunctionNames: false InsertTrailingCommas: None JavaScriptQuotes: Leave JavaScriptWrapImports: true KeepEmptyLinesAtTheStartOfBlocks: true LambdaBodyIndentation: Signature MacroBlockBegin: '' MacroBlockEnd: '' MaxEmptyLinesToKeep: 1 NamespaceIndentation: None ObjCBinPackProtocolList: Auto ObjCBlockIndentWidth: 2 ObjCBreakBeforeNestedBlockParam: true ObjCSpaceAfterProperty: false ObjCSpaceBeforeProtocolList: true PenaltyBreakAssignment: 2 PenaltyBreakBeforeFirstCallParameter: 19 PenaltyBreakComment: 300 PenaltyBreakFirstLessLess: 120 PenaltyBreakString: 1000 PenaltyBreakTemplateDeclaration: 10 PenaltyExcessCharacter: 1000000 PenaltyReturnTypeOnItsOwnLine: 60 PenaltyIndentedWhitespace: 0 PointerAlignment: Right PPIndentWidth: -1 ReferenceAlignment: Pointer ReflowComments: true ShortNamespaceLines: 1 SortIncludes: CaseSensitive SortJavaStaticImport: Before SortUsingDeclarations: true SpaceAfterCStyleCast: false SpaceAfterLogicalNot: false SpaceAfterTemplateKeyword: true SpaceBeforeAssignmentOperators: true SpaceBeforeCaseColon: false SpaceBeforeCpp11BracedList: false SpaceBeforeCtorInitializerColon: true SpaceBeforeInheritanceColon: true SpaceBeforeParens: ControlStatements SpaceAroundPointerQualifiers: Default SpaceBeforeRangeBasedForLoopColon: true SpaceInEmptyBlock: false SpaceInEmptyParentheses: false SpacesBeforeTrailingComments: 1 SpacesInAngles: Never SpacesInConditionalStatement: false SpacesInContainerLiterals: true SpacesInCStyleCastParentheses: false SpacesInLineCommentPrefix: Minimum: 1 Maximum: -1 SpacesInParentheses: false SpacesInSquareBrackets: false SpaceBeforeSquareBrackets: false BitFieldColonSpacing: Both Standard: Latest StatementAttributeLikeMacros: - Q_EMIT StatementMacros: - Q_UNUSED - QT_REQUIRE_VERSION TabWidth: 8 UseCRLF: false UseTab: Never WhitespaceSensitiveMacros: - STRINGIZE - PP_STRINGIZE - BOOST_PP_STRINGIZE - NS_SWIFT_NAME - CF_SWIFT_NAME ... nvtop-3.2.0/.dockerignore000077700000000000000000000000001477175131100173302.gitignoreustar00rootroot00000000000000nvtop-3.2.0/.github/000077500000000000000000000000001477175131100142315ustar00rootroot00000000000000nvtop-3.2.0/.github/workflows/000077500000000000000000000000001477175131100162665ustar00rootroot00000000000000nvtop-3.2.0/.github/workflows/compile.yml000066400000000000000000000014751477175131100204500ustar00rootroot00000000000000name: Compile Ubuntu on: - push - pull_request jobs: build: runs-on: ${{ matrix.os }} strategy: fail-fast: false matrix: os: [ubuntu-24.04, ubuntu-22.04, ubuntu-20.04] env: BUILD_DIR: build DEBIAN_FRONTEND: noninteractive steps: - uses: actions/checkout@v4 - name: Install dependencies run: sudo apt-get install -y libncurses5-dev libncursesw5-dev libdrm-dev libsystemd-dev - name: Configure CMake run: cmake -S . -B $BUILD_DIR - name: Build run: cmake --build $BUILD_DIR - name: Install run: DESTDIR="$PWD/build/install" cmake --build $BUILD_DIR --target install - name: Upload uses: actions/upload-artifact@v4 with: name: nvtop ${{ matrix.os }} path: ${{ env.BUILD_DIR }}/install nvtop-3.2.0/.gitignore000066400000000000000000000000561477175131100146620ustar00rootroot00000000000000*.o *ctags build/ cmake-build*/ .vscode .idea nvtop-3.2.0/AppImage/000077500000000000000000000000001477175131100143545ustar00rootroot00000000000000nvtop-3.2.0/AppImage/README.md000066400000000000000000000002461477175131100156350ustar00rootroot00000000000000# Build the AppImage ```bash podman pull ubuntu:18.04 podman run --interactive --tty --rm --volume $PWD:/nvtop ubuntu:24.04 cd nvtop ./AppImage/make_appimage.sh ``` nvtop-3.2.0/AppImage/make_appimage.sh000077500000000000000000000030251477175131100174730ustar00rootroot00000000000000#!/usr/bin/env bash export ARCH="$(uname -m)" export APPIMAGE_EXTRACT_AND_RUN=1 APPIMAGETOOL="https://github.com/AppImage/appimagetool/releases/download/continuous/appimagetool-$ARCH.AppImage" install_deps() { apt-get update apt-get install -y gcc g++ cmake libncurses5-dev libncursesw5-dev libdrm-dev \ wget file libudev-dev ninja-build cmake file desktop-file-utils } configure_nvtop() { cmake -B build -S . -DCMAKE_BUILD_TYPE=Release \ -DUSE_LIBUDEV_OVER_LIBSYSTEMD=ON -DCMAKE_INSTALL_PREFIX=/usr } build_nvtop() { cmake --build build } install_nvtop_AppDir() { DESTDIR=$PWD/AppDir cmake --build build --target install } bundle_dependencies() { mkdir -p AppDir/usr/lib ldd AppDir/usr/bin/nvtop | awk -F"[> ]" '{print $4}' \ | xargs -I {} cp -vf {} AppDir/usr/lib cp -v /lib64/ld-linux-x86-64.so.2 AppDir } configure_appdir() { cat >> AppDir/AppRun <<- 'EOF' #!/bin/sh HERE="$(readlink -f "$(dirname "$0")")" exec "$HERE/ld-linux-x86-64.so.2" \ --library-path "$HERE/usr/lib" "$HERE"/usr/bin/nvtop "$@" EOF chmod u+x AppDir/AppRun ln -s usr/share/applications/nvtop.desktop AppDir ln -s usr/share/icons/nvtop.svg AppDir ln -s usr/share/icons/nvtop.svg AppDir/.DirIcon } get_appimagetool() { wget -q "$APPIMAGETOOL" -O ./appimagetool chmod u+x ./appimagetool } create_AppImage() { install_deps configure_nvtop build_nvtop install_nvtop_AppDir bundle_dependencies configure_appdir get_appimagetool export VERSION="$(./AppDir/AppRun --version | awk '{print $NF}')" ./appimagetool -n AppDir } create_AppImage nvtop-3.2.0/CMakeLists.txt000066400000000000000000000146541477175131100154430ustar00rootroot00000000000000cmake_minimum_required(VERSION 3.18) #///////////////////////////////////////////////////////////////////# # PROJECT # #///////////////////////////////////////////////////////////////////# project(nvtop VERSION 3.2.0 LANGUAGES C CXX) set(default_build_type "Release") # Default build type if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES) message(STATUS "Setting build type to '${default_build_type}' as none was specified.") set(CMAKE_BUILD_TYPE "${default_build_type}" CACHE STRING "Choose the type of build." FORCE) endif() set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS "Debug" "Release" "MinSizeRel" "RelWithDebInfo") set(CMAKE_EXPORT_COMPILE_COMMANDS ON) #///////////////////////////////////////////////////////////////////# # DEPENDENCIES # #///////////////////////////////////////////////////////////////////# list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules ${CMAKE_CURRENT_SOURCE_DIR}/cmake) set(CURSES_NEED_NCURSES TRUE) # Try to find ncurses with unicode support first set(CURSES_NEED_WIDE TRUE) find_package(Curses QUIET) if (NOT CURSE_FOUND) # Fallback to regular ncurses library, which may also support unicode! set(CURSES_NEED_WIDE FALSE) find_package(Curses REQUIRED) endif() add_library(ncurses INTERFACE IMPORTED) set_property(TARGET ncurses PROPERTY INTERFACE_INCLUDE_DIRECTORIES ${CURSES_INCLUDE_DIRS}) set_property(TARGET ncurses PROPERTY INTERFACE_LINK_LIBRARIES ${CURSES_LIBRARIES}) add_compile_definitions(NCURSES_ENABLE_STDBOOL_H=1) #///////////////////////////////////////////////////////////////////# # COMPILATION OPTIONS # #///////////////////////////////////////////////////////////////////# # Use full RPATH on build tree set(CMAKE_SKIP_BUILD_RPATH FALSE) # Do not build with install RPATH set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) # Set the RPATH when install set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) # Only set RPATH if the installation directory is not a system directory LIST(FIND CMAKE_PLATFORM_IMPLICIT_LINK_DIRECTORIES "${CMAKE_INSTALL_PREFIX}/lib" isSystemDir) if("${isSystemDir}" STREQUAL "-1") set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib") else() set(CMAKE_INSTALL_RPATH "") endif() if(APPLE) set(APPLE_SUPPORT_DEFAULT ON) set(NVIDIA_SUPPORT_DEFAULT OFF) set(AMDGPU_SUPPORT_DEFAULT OFF) set(INTEL_SUPPORT_DEFAULT OFF) set(MSM_SUPPORT_DEFAULT OFF) set(PANFROST_SUPPORT_DEFAULT OFF) set(PANTHOR_SUPPORT_DEFAULT OFF) set(ASCEND_SUPPORT_DEFAULT OFF) elseif(ASCEND_SUPPORT) set(APPLE_SUPPORT_DEFAULT OFF) set(NVIDIA_SUPPORT_DEFAULT OFF) set(AMDGPU_SUPPORT_DEFAULT OFF) set(INTEL_SUPPORT_DEFAULT OFF) set(MSM_SUPPORT_DEFAULT OFF) set(PANFROST_SUPPORT_DEFAULT OFF) set(PANTHOR_SUPPORT_DEFAULT OFF) set(ASCEND_SUPPORT_DEFAULT ON) else() set(APPLE_SUPPORT_DEFAULT OFF) set(NVIDIA_SUPPORT_DEFAULT ON) set(AMDGPU_SUPPORT_DEFAULT ON) set(INTEL_SUPPORT_DEFAULT ON) set(V3D_SUPPORT_DEFAULT ON) set(MSM_SUPPORT_DEFAULT ON) set(PANFROST_SUPPORT_DEFAULT ON) set(PANTHOR_SUPPORT_DEFAULT ON) set(ASCEND_SUPPORT_DEFAULT OFF) endif() # TPU support is only available on Linux if (CMAKE_SYSTEM_NAME STREQUAL "Linux") # Check for libtpuinfo.so to set the default for TPU support find_library(LIBTPUINFO NAMES libtpuinfo.so PATHS /usr/lib /usr/lib64 /usr/local/lib /usr/local/lib64 HINTS ${CMAKE_INSTALL_PREFIX}/lib ${CMAKE_INSTALL_PREFIX}/lib64 lib lib64 ) if (NOT LIBTPUINFO) set(TPU_SUPPORT_DEFAULT OFF) else() set(TPU_SUPPORT_DEFAULT ON) endif() else() set(TPU_SUPPORT_DEFAULT OFF) endif() option(NVIDIA_SUPPORT "Build support for NVIDIA GPUs through libnvml" ${NVIDIA_SUPPORT_DEFAULT}) option(AMDGPU_SUPPORT "Build support for AMD GPUs through amdgpu driver" ${AMDGPU_SUPPORT_DEFAULT}) option(INTEL_SUPPORT "Build support for Intel GPUs through i915 or xe driver" ${INTEL_SUPPORT_DEFAULT}) option(MSM_SUPPORT "Build support for Adreno GPUs through msm driver" ${MSM_SUPPORT_DEFAULT}) option(APPLE_SUPPORT "Build support for Apple GPUs through Metal" ${APPLE_SUPPORT_DEFAULT}) option(PANFROST_SUPPORT "Build support for Mali GPUs through panfrost driver" ${PANFROST_SUPPORT_DEFAULT}) option(PANTHOR_SUPPORT "Build support for Mali GPUs through panthor driver" ${PANTHOR_SUPPORT_DEFAULT}) option(ASCEND_SUPPORT "Build support for Ascend NPUs through Ascend DCMI" ${ASCEND_SUPPORT_DEFAULT}) option(V3D_SUPPORT "Build support for Raspberrypi through v3d" ${V3D_SUPPORT_DEFAULT}) option(TPU_SUPPORT "Build support for Google TPUs through GRPC" ${TPU_SUPPORT_DEFAULT}) add_subdirectory(src) #///////////////////////////////////////////////////////////////////# # INSTALL # #///////////////////////////////////////////////////////////////////# string(TIMESTAMP TODAY_MANPAGE "%B %Y") string(TIMESTAMP TODAY_ISO_8601 "%Y-%m-%d") configure_file( "${CMAKE_CURRENT_SOURCE_DIR}/manpage/nvtop.in" "${CMAKE_CURRENT_BINARY_DIR}/manpage/nvtop" IMMEDIATE @ONLY) configure_file( "${CMAKE_CURRENT_SOURCE_DIR}/desktop/nvtop.metainfo.xml.in" "${CMAKE_CURRENT_BINARY_DIR}/desktop/nvtop.metainfo.xml" IMMEDIATE @ONLY) install(FILES "${CMAKE_CURRENT_BINARY_DIR}/manpage/nvtop" DESTINATION share/man/man1/ PERMISSIONS OWNER_READ OWNER_WRITE GROUP_READ WORLD_READ RENAME nvtop.1) install(FILES "${CMAKE_CURRENT_SOURCE_DIR}/desktop/nvtop.svg" DESTINATION share/icons PERMISSIONS OWNER_READ OWNER_WRITE GROUP_READ WORLD_READ) install(FILES "${CMAKE_CURRENT_SOURCE_DIR}/desktop/nvtop.desktop" DESTINATION share/applications PERMISSIONS OWNER_READ OWNER_WRITE GROUP_READ WORLD_READ) install(FILES "${CMAKE_CURRENT_BINARY_DIR}/desktop/nvtop.metainfo.xml" DESTINATION share/metainfo PERMISSIONS OWNER_READ OWNER_WRITE GROUP_READ WORLD_READ) configure_file( "${CMAKE_CURRENT_SOURCE_DIR}/cmake/cmake_uninstall.cmake.in" "${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake" IMMEDIATE @ONLY) add_custom_target(uninstall COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake) #///////////////////////////////////////////////////////////////////# # TESTING # #///////////////////////////////////////////////////////////////////# if (NOT CMAKE_BUILD_TYPE STREQUAL "Debug") option(BUILD_TESTING "Build tests" OFF) endif() include(CTest) add_subdirectory(tests) nvtop-3.2.0/COPYING000066400000000000000000001045131477175131100137300ustar00rootroot00000000000000 GNU GENERAL PUBLIC LICENSE Version 3, 29 June 2007 Copyright (C) 2007 Free Software Foundation, Inc. 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Copyright (C) This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . Also add information on how to contact you by electronic and paper mail. If the program does terminal interaction, make it output a short notice like this when it starts in an interactive mode: Copyright (C) This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, your program's commands might be different; for a GUI interface, you would use an "about box". You should also get your employer (if you work as a programmer) or school, if any, to sign a "copyright disclaimer" for the program, if necessary. For more information on this, and how to apply and follow the GNU GPL, see . The GNU General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Lesser General Public License instead of this License. But first, please read . nvtop-3.2.0/Dockerfile000066400000000000000000000023441477175131100146660ustar00rootroot00000000000000 # BUILD: docker build . -t nvtop # or use other image with: --build-arg IMAGE=nvcr.io/nvidia/cudagl:11.4.2-base-ubuntu20.04 # or nvidia/driver:418.87.01-ubuntu18.04, nvcr.io/nvidia/cudagl:11.4.2-base-ubuntu20.04 # USE: docker run --rm -it --gpus all --pid host nvtop ARG IMAGE=nvidia/opengl:1.2-glvnd-runtime-ubuntu20.04 FROM ${IMAGE} as builder ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update && \ apt-get install -yq build-essential wget libncurses5-dev libncursesw5-dev libssl-dev \ pkg-config libdrm-dev libgtest-dev libudev-dev python3-venv # Get a recent-enough CMake RUN python3 -m venv /.venv && \ . /.venv/bin/activate && \ pip install --upgrade pip && \ pip install cmake COPY . /nvtop WORKDIR /nvtop RUN mkdir -p /nvtop/build && \ cd /nvtop/build && \ . /.venv/bin/activate && \ cmake .. && \ make -j && \ make install # Stage 2 FROM ${IMAGE} RUN DEBIAN_FRONTEND=noninteractive apt-get update -y && apt-get install -yq libncurses5 libncursesw5 libdrm-amdgpu1 \ && rm -rf /var/lib/apt/lists/* COPY --from=builder /usr/local/bin/nvtop /usr/local/bin/nvtop COPY --from=builder /usr/local/share/man/man1/nvtop.1 /usr/local/share/man/man1/nvtop.1 ENV LANG=C.UTF-8 ENTRYPOINT [ "/usr/local/bin/nvtop" ] nvtop-3.2.0/LICENSE000077700000000000000000000000001477175131100147242COPYINGustar00rootroot00000000000000nvtop-3.2.0/README.markdown000066400000000000000000000264021477175131100153760ustar00rootroot00000000000000NVTOP ===== What is NVTOP? -------------- NVTOP stands for Neat Videocard TOP, a (h)top like task monitor for GPUs and accelerators. It can handle multiple GPUs and print information about them in a htop-familiar way. Currently supported vendors are AMD (Linux amdgpu driver), Apple (limited M1 & M2 support), Huawei (Ascend), Intel (Linux i915/Xe drivers), NVIDIA (Linux proprietary divers), Qualcomm Adreno (Linux MSM driver), Broadcom VideoCore (Linux v3d driver). Because a picture is worth a thousand words: ![NVTOP interface](/screenshot/NVTOP_ex1.png) Table of Contents ----------------- - [NVTOP Options and Interactive Commands](#nvtop-options-and-interactive-commands) - [Interactive Setup Window](#interactive-setup-window) - [Saving Preferences](#saving-preferences) - [NVTOP Manual and Command line Options](#nvtop-manual-and-command-line-options) - [GPU Support](#gpu-support) - [AMD](#amd) - [Intel](#intel) - [NVIDIA](#nvidia) - [Adreno](#adreno) - [Apple](#apple) - [Ascend](#ascend) (only tested on 910B) - [VideoCore](#videocore) - [Build](#build) - [Distribution Specific Installation Process](#distribution-specific-installation-process) - [Ubuntu / Debian](#ubuntu--debian) - [Ubuntu Impish (21.10) / Debian buster (stable) and more recent (stable)](#ubuntu-impish-2110-debian-buster-stable-and-more-recent) - [Fedora / Red Hat / CentOS](#fedora--red-hat--centos) - [OpenSUSE](#opensuse) - [Arch Linux](#arch-linux) - [Gentoo](#gentoo) - [AppImage](#appimage) - [Snap](#snap) - [Conda-forge](#conda-forge) - [Docker](#docker) - [NVTOP Build](#nvtop-build) - [Troubleshoot](#troubleshoot) - [License](#license) NVTOP Options and Interactive Commands -------------------------------------- ### Interactive Setup Window NVTOP has a builtin setup utility that provides a way to specialize the interface to your needs. Simply press ``F2`` and select the options that are the best for you. ![NVTOP Setup Window](/screenshot/Nvtop-config.png) ### Saving Preferences You can save the preferences set in the setup window by pressing ``F12``. The preferences will be loaded the next time you run ``nvtop``. ### NVTOP Manual and Command line Options NVTOP comes with a manpage! ```bash man nvtop ``` For quick command line arguments help ```bash nvtop -h nvtop --help ``` GPU Support ----------- ### AMD NVTOP supports AMD GPUs using the `amdgpu` driver through the exposed DRM and sysfs interface. AMD introduced the fdinfo interface in kernel 5.14 ([browse kernel source](https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c?h=linux-5.14.y)). Hence, you will need a kernel with a version greater or equal to 5.14 to see the processes using AMD GPUs. Support for recent GPUs are regularly mainlined into the linux kernel, so please use a recent-enough kernel for your GPU. ### Intel NVTOP supports Intel GPUs using the `i915` or `xe` linux driver. Intel introduced the fdinfo interface in kernel 5.19 ([browse kernel source](https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/gpu/drm/i915/i915_drm_client.c?h=linux-5.19.y)). Hence, you will need a kernel with a version greater or equal to 5.19 to see the processes using Intel GPUs. Intel requires CAP_PERFMON or CAP_SYS_ADMIN capabilities to access the total memory usage, you can run `sudo setcap cap_perfmon=ep nvtop` to grant the necessary permissions or run nvtop as root. ### NVIDIA The *NVML library* does not support some of the queries for GPUs coming before the Kepler microarchitecture. Anything starting at GeForce 600, GeForce 800M and successor should work fine. For more information about supported GPUs please take a look at the [NVML documentation](http://docs.nvidia.com/deploy/nvml-api/nvml-api-reference.html#nvml-api-reference). ### Adreno NVTOP supports Adreno GPUs using the `msm` linux driver. msm introduced the fdinfo interface in kernel 6.0 ([browse kernel source](https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/gpu/drm/msm/msm_drv.c?h=linux-6.0.y)). Hence, you will need a kernel with a version greater or equal to 6.0 to see the processes using Adreno GPUs. ### Apple NVTOP includes some initial support for Apple using Metal. This is only supported when building for Apple, and when building for Apple only this vendor is supported. **APPLE SUPPORT STATUS** - Apple support is still being worked on. Some bugs and limitations may apply. ### Ascend NVTOP supports Ascend (testing on Altas 800 (910B)) by DCMI API (version 6.0.0). Currently, the DCMI only supports limited APIs, missing PCIe generation, tx/rx throughput info, max power draw etc. ### VideoCore NVTOP supports VideoCore (testing on raspberrypi 4B). Supports GPU frequency, temperature, utilization, per-process utilization, GPU memory usage, and H264 decoding utilization. On non-raspberry pi os, you need to use the `linux-rpi 6.12.y` kernel and above, and ensure the presence of the `/dev/vcio` device. Build ----- Several libraries are required in order for NVTOP to display GPU info: * The *ncurses* library driving the user interface. * This makes the screen look beautiful. * For NVIDIA: the *NVIDIA Management Library* (*NVML*) which comes with the GPU driver. * This queries the GPU for info. * For AMD: the libdrm library used to query AMD GPUs through the kernel driver. ## Distribution Specific Installation Process ### Ubuntu / Debian If your distribution provides the snap utility, follow the [snap installation process](#snap) to obtain an up-to-date version of `nvtop`. A standalone application is available as [AppImage](#appimage). #### Ubuntu Impish (21.10), Debian buster (stable) and more recent - ```bash sudo apt install nvtop ``` #### Ubuntu PPA A [PPA supporting Ubuntu 20.04, 22.04 and newer](https://launchpad.net/~flexiondotorg/+archive/ubuntu/nvtop) is provided by [Martin Wimpress](https://github.com/flexiondotorg) that offers an up-to-date version of `nvtop`, enabled for NVIDIA, AMD and Intel. ```bash sudo add-apt-repository ppa:flexiondotorg/nvtop sudo apt install nvtop ``` #### Older - AMD and Intel Dependencies ```bash sudo apt install libdrm-dev libsystemd-dev # Ubuntu 18.04 sudo apt install libudev-dev ``` - NVIDIA Depenency - NVIDIA drivers (see [Ubuntu Wiki](https://help.ubuntu.com/community/BinaryDriverHowto/Nvidia) or [Ubuntu PPA](https://launchpad.net/~graphics-drivers/+archive/ubuntu/ppa) or [Debian Wiki](https://wiki.debian.org/NvidiaGraphicsDrivers#NVIDIA_Proprietary_Driver)) - NVTOP Dependencies - CMake, ncurses and Git ```bash sudo apt install cmake libncurses5-dev libncursesw5-dev git ``` - NVTOP - Follow the [NVTOP Build](#nvtop-build) ### Fedora / Red Hat / CentOS A standalone application is available as [AppImage](#appimage). #### Fedora 36 and newer - ```bash sudo dnf install nvtop ``` #### Red Hat Enterprise Linux 8 and 9 - ```bash sudo dnf install -y https://dl.fedoraproject.org/pub/epel/epel-release-latest-$(rpm -E %{rhel}).noarch.rpm sudo dnf install nvtop ``` #### CentOS Stream, Rocky Linux, AlmaLinux - ```bash sudo dnf install -y epel-release sudo dnf install nvtop ``` #### Build process for Fedora / Red Hat / CentOS: - AMD and Intel Dependencies ```bash sudo dnf install libdrm-devel systemd-devel ``` - NVIDIA Depenency - NVIDIA drivers, **CUDA required for nvml libraries** (see [RPM Fusion](https://rpmfusion.org/Howto/NVIDIA)) - NVTOP Dependencies - CMake, ncurses, C++ and Git ```bash sudo dnf install cmake ncurses-devel git gcc-c++ ``` - NVTOP - Follow the [NVTOP Build](#nvtop-build) ### OpenSUSE A standalone application is available as an [AppImage](#appimage). Build process for OpenSUSE: - AMD Dependecy ```bash sudo zypper install libdrm-devel ``` - NVIDIA Depenency - NVIDIA drivers (see [SUSE Support Database](https://en.opensuse.org/SDB:NVIDIA_drivers)) - NVTOP Dependencies - CMake, ncurses and Git ```bash sudo zypper install cmake ncurses-devel git ``` - NVTOP - Follow the [NVTOP Build](#nvtop-build) ### Arch Linux - ```bash sudo pacman -S nvtop ``` ### Gentoo - ```bash sudo emerge -av nvtop ``` ### AppImage An AppImage is a standalone application. Just download the AppImage, make it executable and run it! - Go to the [release page](https://github.com/Syllo/nvtop/releases/latest) and download `nvtop-x86_64.AppImage` - ```bash # Go to the download location ** The path may differ on your system ** cd $HOME/Downloads # Make the AppImage executable chmod u+x nvtop-x86_64.AppImage # Enjoy nvtop ./nvtop-x86_64.AppImage ``` If you are curious how that works, please visit the [AppImage website](https://appimage.org/). ### Snap - ```bash snap install nvtop # Add the capability to kill processes inside nvtop snap connect nvtop:process-control # Add the capability to inspect GPU information (fan, PCIe, power, etc) snap connect nvtop:hardware-observe # AMDGPU process list support (read /proc/) snap connect nvtop:system-observe # Temporary workaround to get per-process GPU usage (read /proc//fdinfo) snap connect nvtop:kubernetes-support ``` Notice: The connect commands allow ### Conda-forge A [conda-forge feedstock for `nvtop`](https://github.com/conda-forge/nvtop-feedstock) is available. #### conda / mamba / miniforge ```bash conda install --channel conda-forge nvtop ``` #### pixi ```bash pixi global install nvtop ``` ### Docker - NVIDIA drivers (same as above) - [nvidia-docker](https://github.com/NVIDIA/nvidia-docker) (See [Container Toolkit Installation Guide](https://docs.nvidia.com/datacenter/cloud-native/container-toolkit/install-guide.html#docker)) - ```bash git clone https://github.com/Syllo/nvtop.git && cd nvtop sudo docker build --tag nvtop . sudo docker run -it --rm --runtime=nvidia --gpus=all --pid=host nvtop ``` ## NVTOP Build ```bash git clone https://github.com/Syllo/nvtop.git mkdir -p nvtop/build && cd nvtop/build cmake .. -DNVIDIA_SUPPORT=ON -DAMDGPU_SUPPORT=ON -DINTEL_SUPPORT=ON make # Install globally on the system sudo make install # Alternatively, install without privileges at a location of your choosing # cmake .. -DNVIDIA_SUPPORT=ON -DAMDGPU_SUPPORT=ON -DINTEL_SUPPORT=ON -DCMAKE_INSTALL_PREFIX=/path/to/your/dir # make # make install ``` If you use **conda** as environment manager and encounter an error while building NVTOP, try `conda deactivate` before invoking `cmake`. The build system supports multiple build types (e.g. -DCMAKE_BUILD_TYPE=RelWithDebInfo): * Release: Binary without debug info * RelWithDebInfo: Binary with debug info * Debug: Compile with warning flags and address/undefined sanitizers enabled (for development purposes) Troubleshoot ------------ - The plot looks bad: - Verify that you installed the wide character version of the ncurses library (libncurses**w**5-dev for Debian / Ubuntu), clean the build directory and restart the build process. - **Putty**: Tell putty not to lie about its capabilities (`$TERM`) by setting the field ``Terminal-type string`` to ``putty`` in the menu ``Connection > Data > Terminal Details``. License ------- NVTOP is licensed under the GPLv3 license or any later version. You will find a copy of the license inside the COPYING file of the repository or at the GNU website <[www.gnu.org/licenses/](http://www.gnu.org/licenses/)>. nvtop-3.2.0/cmake/000077500000000000000000000000001477175131100137515ustar00rootroot00000000000000nvtop-3.2.0/cmake/cmake_uninstall.cmake.in000066400000000000000000000020241477175131100205270ustar00rootroot00000000000000if(NOT EXISTS "@CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt") message(FATAL_ERROR "Cannot find install manifest: @CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt") endif(NOT EXISTS "@CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt") file(READ "@CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt" files) string(REGEX REPLACE "\n" ";" files "${files}") foreach(file ${files}) message(STATUS "Uninstalling $ENV{DESTDIR}${file}") if(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}") exec_program( "@CMAKE_COMMAND@" ARGS "-E remove \"$ENV{DESTDIR}${file}\"" OUTPUT_VARIABLE rm_out RETURN_VALUE rm_retval) if(NOT "${rm_retval}" STREQUAL 0) message(FATAL_ERROR "Problem when removing $ENV{DESTDIR}${file}") endif(NOT "${rm_retval}" STREQUAL 0) else(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}") message(STATUS "File $ENV{DESTDIR}${file} does not exist.") endif(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}") endforeach(file) nvtop-3.2.0/cmake/compile-flags-helpers.cmake000066400000000000000000000053571477175131100211470ustar00rootroot00000000000000include(CheckLinkerFlag) function(add_compiler_option_to_target_type TARGET BUILDTYPE VISIBILITY OPTIONS) include(CheckCCompilerFlag) list(APPEND OPTIONS ${ARGN}) foreach(COMPILE_OPTION IN LISTS OPTIONS) string(REPLACE "=" "-" COMPILE_OPTION_NAME "${COMPILE_OPTION}") check_c_compiler_flag(${COMPILE_OPTION} "compiler_has${COMPILE_OPTION_NAME}") if (${compiler_has${COMPILE_OPTION_NAME}}) target_compile_options(${TARGET} ${VISIBILITY} $<$:${COMPILE_OPTION}>) endif() endforeach() endfunction() function(add_compiler_option_to_all_but_target_type TARGET BUILDTYPE VISIBILITY OPTIONS) include(CheckCCompilerFlag) list(APPEND OPTIONS ${ARGN}) foreach(COMPILE_OPTION IN LISTS OPTIONS) string(REPLACE "=" "-" COMPILE_OPTION_NAME "${COMPILE_OPTION}") check_c_compiler_flag(${COMPILE_OPTION} "compiler_has${COMPILE_OPTION_NAME}") if (${compiler_has${COMPILE_OPTION_NAME}}) target_compile_options(${TARGET} ${VISIBILITY} $<$>:${COMPILE_OPTION}>) endif() endforeach() endfunction() function(add_linker_option_to_target_type TARGET BUILDTYPE VISIBILITY OPTIONS) include(CheckCCompilerFlag) list(APPEND OPTIONS ${ARGN}) foreach(LINK_OPTION IN LISTS OPTIONS) string(REPLACE "," "_" LINK_OPTION_NAME "${LINK_OPTION}") check_linker_flag(C "${LINK_OPTION}" "linker_has${LINK_OPTION_NAME}") if (${linker_has${LINK_OPTION_NAME}}) target_link_libraries(${TARGET} ${VISIBILITY} $<$:${LINK_OPTION}>) endif() endforeach() endfunction() function(add_linker_option_to_all_but_target_type TARGET BUILDTYPE VISIBILITY OPTIONS) include(CheckCCompilerFlag) list(APPEND OPTIONS ${ARGN}) foreach(LINK_OPTION IN LISTS OPTIONS) string(REPLACE "," "_" LINK_OPTION_NAME "${LINK_OPTION}") check_linker_flag(C "${LINK_OPTION}" "linker_has${LINK_OPTION_NAME}") if (${linker_has${LINK_OPTION_NAME}}) target_link_libraries(${TARGET} ${VISIBILITY} $<$>:${LINK_OPTION}>) endif() endforeach() endfunction() function(add_sanitizers_to_target TARGET BUILDTYPE VISIBILITY SANITIZERS) list(APPEND SANITIZERS ${ARGN}) foreach(SAN IN LISTS SANITIZERS) set(CMAKE_REQUIRED_FLAGS "-fsanitize=${SAN}") check_c_compiler_flag("-fsanitize=${SAN}" "sanitizer-${SAN}-available") unset(CMAKE_REQUIRED_FLAGS) if (${sanitizer-${SAN}-available}) list(APPEND AVAILABLE_SANITIZERS ${SAN}) endif() endforeach() foreach(SAN IN LISTS AVAILABLE_SANITIZERS) target_compile_options(${TARGET} ${VISIBILITY} $<$:-fsanitize=${SAN}>) target_link_libraries(${TARGET} ${VISIBILITY} $<$:-fsanitize=${SAN}>) endforeach() endfunction() nvtop-3.2.0/cmake/modules/000077500000000000000000000000001477175131100154215ustar00rootroot00000000000000nvtop-3.2.0/cmake/modules/FindASan.cmake000066400000000000000000000041401477175131100200450ustar00rootroot00000000000000# The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. option(SANITIZE_ADDRESS "Enable AddressSanitizer for sanitized targets." Off) set(FLAG_CANDIDATES # Clang 3.2+ use this version. The no-omit-frame-pointer option is optional. "-g -fsanitize=address -fno-omit-frame-pointer" "-g -fsanitize=address" # Older deprecated flag for ASan "-g -faddress-sanitizer" ) if (SANITIZE_ADDRESS AND (SANITIZE_THREAD OR SANITIZE_MEMORY)) message(FATAL_ERROR "AddressSanitizer is not compatible with " "ThreadSanitizer or MemorySanitizer.") endif () include(sanitize-helpers) if (SANITIZE_ADDRESS) sanitizer_check_compiler_flags("${FLAG_CANDIDATES}" "AddressSanitizer" "ASan") find_program(ASan_WRAPPER "asan-wrapper" PATHS ${CMAKE_MODULE_PATH}) mark_as_advanced(ASan_WRAPPER) endif () function (add_sanitize_address TARGET) if (NOT SANITIZE_ADDRESS) return() endif () sanitizer_add_flags(${TARGET} "AddressSanitizer" "ASan") endfunction () nvtop-3.2.0/cmake/modules/FindCurses.cmake000066400000000000000000000213701477175131100204730ustar00rootroot00000000000000# Distributed under the OSI-approved BSD 3-Clause License. See accompanying # file Copyright.txt or https://cmake.org/licensing for details. #[=======================================================================[.rst: FindCurses ---------- Find the curses or ncurses include file and library. Result Variables ^^^^^^^^^^^^^^^^ This module defines the following variables: ``CURSES_FOUND`` True if Curses is found. ``CURSES_INCLUDE_DIRS`` The include directories needed to use Curses. ``CURSES_LIBRARIES`` The libraries needed to use Curses. ``CURSES_CFLAGS`` Parameters which ought be given to C/C++ compilers when using Curses. ``CURSES_HAVE_CURSES_H`` True if curses.h is available. ``CURSES_HAVE_NCURSES_H`` True if ncurses.h is available. ``CURSES_HAVE_NCURSES_NCURSES_H`` True if ``ncurses/ncurses.h`` is available. ``CURSES_HAVE_NCURSES_CURSES_H`` True if ``ncurses/curses.h`` is available. Set ``CURSES_NEED_NCURSES`` to ``TRUE`` before the ``find_package(Curses)`` call if NCurses functionality is required. Set ``CURSES_NEED_WIDE`` to ``TRUE`` before the ``find_package(Curses)`` call if unicode functionality is required. Backward Compatibility ^^^^^^^^^^^^^^^^^^^^^^ The following variable are provided for backward compatibility: ``CURSES_INCLUDE_DIR`` Path to Curses include. Use ``CURSES_INCLUDE_DIRS`` instead. ``CURSES_LIBRARY`` Path to Curses library. Use ``CURSES_LIBRARIES`` instead. #]=======================================================================] include(CheckLibraryExists) # we don't know anything about cursesw, so only ncurses # may be ncursesw if(NOT CURSES_NEED_WIDE) set(NCURSES_LIBRARY_NAME "ncurses") else() set(NCURSES_LIBRARY_NAME "ncursesw") # Also, if we are searchig fo wide curses - we are actually searching # for ncurses, we don't know about any other unicode version. set(CURSES_NEED_NCURSES TRUE) endif() find_library(CURSES_CURSES_LIBRARY NAMES curses) find_library(CURSES_NCURSES_LIBRARY NAMES "${NCURSES_LIBRARY_NAME}" ) set(CURSES_USE_NCURSES FALSE) if(CURSES_NCURSES_LIBRARY AND ((NOT CURSES_CURSES_LIBRARY) OR CURSES_NEED_NCURSES)) set(CURSES_USE_NCURSES TRUE) endif() # http://cygwin.com/ml/cygwin-announce/2010-01/msg00002.html # cygwin ncurses stopped providing curses.h symlinks see above # message. Cygwin is an ncurses package, so force ncurses on # cygwin if the curses.h is missing if(CYGWIN) if (CURSES_NEED_WIDE) if(NOT EXISTS /usr/include/ncursesw/curses.h) set(CURSES_USE_NCURSES TRUE) endif() else() if(NOT EXISTS /usr/include/curses.h) set(CURSES_USE_NCURSES TRUE) endif() endif() endif() # Not sure the logic is correct here. # If NCurses is required, use the function wsyncup() to check if the library # has NCurses functionality (at least this is where it breaks on NetBSD). # If wsyncup is in curses, use this one. # If not, try to find ncurses and check if this has the symbol. # Once the ncurses library is found, search the ncurses.h header first, but # some web pages also say that even with ncurses there is not always a ncurses.h: # http://osdir.com/ml/gnome.apps.mc.devel/2002-06/msg00029.html # So at first try ncurses.h, if not found, try to find curses.h under the same # prefix as the library was found, if still not found, try curses.h with the # default search paths. if(CURSES_CURSES_LIBRARY AND CURSES_NEED_NCURSES) include(CMakePushCheckState) cmake_push_check_state() set(CMAKE_REQUIRED_QUIET ${Curses_FIND_QUIETLY}) CHECK_LIBRARY_EXISTS("${CURSES_CURSES_LIBRARY}" wsyncup "" CURSES_CURSES_HAS_WSYNCUP) if(CURSES_NCURSES_LIBRARY AND NOT CURSES_CURSES_HAS_WSYNCUP) CHECK_LIBRARY_EXISTS("${CURSES_NCURSES_LIBRARY}" wsyncup "" CURSES_NCURSES_HAS_WSYNCUP) if( CURSES_NCURSES_HAS_WSYNCUP) set(CURSES_USE_NCURSES TRUE) endif() endif() cmake_pop_check_state() endif() if(CURSES_USE_NCURSES) get_filename_component(_cursesLibDir "${CURSES_NCURSES_LIBRARY}" PATH) get_filename_component(_cursesParentDir "${_cursesLibDir}" PATH) # Use CURSES_NCURSES_INCLUDE_PATH if set, for compatibility. if(CURSES_NCURSES_INCLUDE_PATH) if (CURSES_NEED_WIDE) find_path(CURSES_INCLUDE_PATH NAMES ncursesw/ncurses.h ncursesw/curses.h ncursesw.h cursesw.h PATHS ${CURSES_NCURSES_INCLUDE_PATH} NO_DEFAULT_PATH ) else() find_path(CURSES_INCLUDE_PATH NAMES ncurses/ncurses.h ncurses/curses.h ncurses.h curses.h PATHS ${CURSES_NCURSES_INCLUDE_PATH} NO_DEFAULT_PATH ) endif() endif() if (CURSES_NEED_WIDE) set(CURSES_TINFO_LIBRARY_NAME tinfow) find_path(CURSES_INCLUDE_PATH NAMES ncursesw/ncurses.h ncursesw/curses.h ncursesw.h cursesw.h HINTS "${_cursesParentDir}/include" ) else() set(CURSES_TINFO_LIBRARY_NAME tinfo) find_path(CURSES_INCLUDE_PATH NAMES ncurses/ncurses.h ncurses/curses.h ncurses.h curses.h HINTS "${_cursesParentDir}/include" ) endif() # Previous versions of FindCurses provided these values. if(NOT DEFINED CURSES_LIBRARY) set(CURSES_LIBRARY "${CURSES_NCURSES_LIBRARY}") endif() CHECK_LIBRARY_EXISTS("${CURSES_NCURSES_LIBRARY}" cbreak "" CURSES_NCURSES_HAS_CBREAK) if(NOT CURSES_NCURSES_HAS_CBREAK) find_library(CURSES_EXTRA_LIBRARY "${CURSES_TINFO_LIBRARY_NAME}" HINTS "${_cursesLibDir}") find_library(CURSES_EXTRA_LIBRARY "${CURSES_TINFO_LIBRARY_NAME}" ) endif() else() get_filename_component(_cursesLibDir "${CURSES_CURSES_LIBRARY}" PATH) get_filename_component(_cursesParentDir "${_cursesLibDir}" PATH) #We can't find anything with CURSES_NEED_WIDE because we know #only about ncursesw unicode curses version if(NOT CURSES_NEED_WIDE) find_path(CURSES_INCLUDE_PATH NAMES curses.h HINTS "${_cursesParentDir}/include" ) endif() # Previous versions of FindCurses provided these values. if(NOT DEFINED CURSES_CURSES_H_PATH) set(CURSES_CURSES_H_PATH "${CURSES_INCLUDE_PATH}") endif() if(NOT DEFINED CURSES_LIBRARY) set(CURSES_LIBRARY "${CURSES_CURSES_LIBRARY}") endif() endif() # Report whether each possible header name exists in the include directory. if(NOT DEFINED CURSES_HAVE_NCURSES_NCURSES_H) if(CURSES_NEED_WIDE) if(EXISTS "${CURSES_INCLUDE_PATH}/ncursesw/ncurses.h") set(CURSES_HAVE_NCURSES_NCURSES_H "${CURSES_INCLUDE_PATH}/ncursesw/ncurses.h") endif() elseif(EXISTS "${CURSES_INCLUDE_PATH}/ncurses/ncurses.h") set(CURSES_HAVE_NCURSES_NCURSES_H "${CURSES_INCLUDE_PATH}/ncurses/ncurses.h") endif() if(NOT DEFINED CURSES_HAVE_NCURSES_NCURSES_H) set(CURSES_HAVE_NCURSES_NCURSES_H "CURSES_HAVE_NCURSES_NCURSES_H-NOTFOUND") endif() endif() if(NOT DEFINED CURSES_HAVE_NCURSES_CURSES_H) if(CURSES_NEED_WIDE) if(EXISTS "${CURSES_INCLUDE_PATH}/ncursesw/curses.h") set(CURSES_HAVE_NCURSES_CURSES_H "${CURSES_INCLUDE_PATH}/ncursesw/curses.h") endif() elseif(EXISTS "${CURSES_INCLUDE_PATH}/ncurses/curses.h") set(CURSES_HAVE_NCURSES_CURSES_H "${CURSES_INCLUDE_PATH}/ncurses/curses.h") endif() if(NOT DEFINED CURSES_HAVE_NCURSES_CURSES_H) set(CURSES_HAVE_NCURSES_CURSES_H "CURSES_HAVE_NCURSES_CURSES_H-NOTFOUND") endif() endif() if(NOT CURSES_NEED_WIDE) #ncursesw can't be found for this paths if(NOT DEFINED CURSES_HAVE_NCURSES_H) if(EXISTS "${CURSES_INCLUDE_PATH}/ncurses.h") set(CURSES_HAVE_NCURSES_H "${CURSES_INCLUDE_PATH}/ncurses.h") else() set(CURSES_HAVE_NCURSES_H "CURSES_HAVE_NCURSES_H-NOTFOUND") endif() endif() if(NOT DEFINED CURSES_HAVE_CURSES_H) if(EXISTS "${CURSES_INCLUDE_PATH}/curses.h") set(CURSES_HAVE_CURSES_H "${CURSES_INCLUDE_PATH}/curses.h") else() set(CURSES_HAVE_CURSES_H "CURSES_HAVE_CURSES_H-NOTFOUND") endif() endif() endif() find_library(CURSES_FORM_LIBRARY form HINTS "${_cursesLibDir}") find_library(CURSES_FORM_LIBRARY form ) # Previous versions of FindCurses provided these values. if(NOT DEFINED FORM_LIBRARY) set(FORM_LIBRARY "${CURSES_FORM_LIBRARY}") endif() # Need to provide the *_LIBRARIES set(CURSES_LIBRARIES ${CURSES_LIBRARY}) if(CURSES_EXTRA_LIBRARY) set(CURSES_LIBRARIES ${CURSES_LIBRARIES} ${CURSES_EXTRA_LIBRARY}) endif() if(CURSES_FORM_LIBRARY) set(CURSES_LIBRARIES ${CURSES_LIBRARIES} ${CURSES_FORM_LIBRARY}) endif() # Provide the *_INCLUDE_DIRS and *_CFLAGS results. set(CURSES_INCLUDE_DIRS ${CURSES_INCLUDE_PATH}) set(CURSES_INCLUDE_DIR ${CURSES_INCLUDE_PATH}) # compatibility find_package(PkgConfig QUIET) if(PKG_CONFIG_FOUND) pkg_check_modules(NCURSES QUIET ${NCURSES_LIBRARY_NAME}) set(CURSES_CFLAGS ${NCURSES_CFLAGS_OTHER}) endif() include(FindPackageHandleStandardArgs) FIND_PACKAGE_HANDLE_STANDARD_ARGS(Curses DEFAULT_MSG CURSES_LIBRARY CURSES_INCLUDE_PATH) mark_as_advanced( CURSES_INCLUDE_PATH CURSES_CURSES_LIBRARY CURSES_NCURSES_LIBRARY CURSES_EXTRA_LIBRARY CURSES_FORM_LIBRARY ) nvtop-3.2.0/cmake/modules/FindLibdrm.cmake000066400000000000000000000065371477175131100204500ustar00rootroot00000000000000#.rst: # FindLibdrm # ------- # # Try to find libdrm on a Unix system. # # This will define the following variables: # # ``Libdrm_FOUND`` # True if (the requested version of) libdrm is available # ``Libdrm_VERSION`` # The version of libdrm # ``Libdrm_LIBRARIES`` # This can be passed to target_link_libraries() instead of the ``Libdrm::Libdrm`` # target # ``Libdrm_INCLUDE_DIRS`` # This should be passed to target_include_directories() if the target is not # used for linking # ``Libdrm_DEFINITIONS`` # This should be passed to target_compile_options() if the target is not # used for linking # # If ``Libdrm_FOUND`` is TRUE, it will also define the following imported target: # # ``Libdrm::Libdrm`` # The libdrm library # # In general we recommend using the imported target, as it is easier to use. # Bear in mind, however, that if the target is in the link interface of an # exported library, it must be made available by the package config file. #============================================================================= # SPDX-FileCopyrightText: 2014 Alex Merry # SPDX-FileCopyrightText: 2014 Martin Gräßlin # # SPDX-License-Identifier: BSD-3-Clause #============================================================================= if(CMAKE_VERSION VERSION_LESS 2.8.12) message(FATAL_ERROR "CMake 2.8.12 is required by FindLibdrm.cmake") endif() if(CMAKE_MINIMUM_REQUIRED_VERSION VERSION_LESS 2.8.12) message(AUTHOR_WARNING "Your project should require at least CMake 2.8.12 to use FindLibdrm.cmake") endif() if(NOT WIN32) # Use pkg-config to get the directories and then use these values # in the FIND_PATH() and FIND_LIBRARY() calls find_package(PkgConfig) pkg_check_modules(PKG_Libdrm QUIET libdrm) set(Libdrm_DEFINITIONS ${PKG_Libdrm_CFLAGS_OTHER}) set(Libdrm_VERSION ${PKG_Libdrm_VERSION}) find_path(Libdrm_INCLUDE_DIR NAMES xf86drm.h HINTS ${PKG_Libdrm_INCLUDE_DIRS} ) find_library(Libdrm_LIBRARY NAMES drm HINTS ${PKG_Libdrm_LIBRARY_DIRS} ) include(FindPackageHandleStandardArgs) find_package_handle_standard_args(Libdrm FOUND_VAR Libdrm_FOUND REQUIRED_VARS Libdrm_LIBRARY Libdrm_INCLUDE_DIR VERSION_VAR Libdrm_VERSION ) if(Libdrm_FOUND AND NOT TARGET Libdrm::Libdrm) add_library(Libdrm::Libdrm UNKNOWN IMPORTED) set_target_properties(Libdrm::Libdrm PROPERTIES IMPORTED_LOCATION "${Libdrm_LIBRARY}" INTERFACE_COMPILE_OPTIONS "${Libdrm_DEFINITIONS}" INTERFACE_INCLUDE_DIRECTORIES "${Libdrm_INCLUDE_DIR}" INTERFACE_INCLUDE_DIRECTORIES "${Libdrm_INCLUDE_DIR}/libdrm" ) endif() mark_as_advanced(Libdrm_LIBRARY Libdrm_INCLUDE_DIR) # compatibility variables set(Libdrm_LIBRARIES ${Libdrm_LIBRARY}) set(Libdrm_INCLUDE_DIRS ${Libdrm_INCLUDE_DIR} "${Libdrm_INCLUDE_DIR}/libdrm") set(Libdrm_VERSION_STRING ${Libdrm_VERSION}) else() message(STATUS "FindLibdrm.cmake cannot find libdrm on Windows systems.") set(Libdrm_FOUND FALSE) endif() include(FeatureSummary) set_package_properties(Libdrm PROPERTIES URL "https://wiki.freedesktop.org/dri/" DESCRIPTION "Userspace interface to kernel DRM services" ) nvtop-3.2.0/cmake/modules/FindMSan.cmake000066400000000000000000000043641477175131100200710ustar00rootroot00000000000000# The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. option(SANITIZE_MEMORY "Enable MemorySanitizer for sanitized targets." Off) set(FLAG_CANDIDATES "-g -fsanitize=memory" ) include(sanitize-helpers) if (SANITIZE_MEMORY) if (NOT ${CMAKE_SYSTEM_NAME} STREQUAL "Linux") message(WARNING "MemorySanitizer disabled for target ${TARGET} because " "MemorySanitizer is supported for Linux systems only.") set(SANITIZE_MEMORY Off CACHE BOOL "Enable MemorySanitizer for sanitized targets." FORCE) elseif (NOT ${CMAKE_SIZEOF_VOID_P} EQUAL 8) message(WARNING "MemorySanitizer disabled for target ${TARGET} because " "MemorySanitizer is supported for 64bit systems only.") set(SANITIZE_MEMORY Off CACHE BOOL "Enable MemorySanitizer for sanitized targets." FORCE) else () sanitizer_check_compiler_flags("${FLAG_CANDIDATES}" "MemorySanitizer" "MSan") endif () endif () function (add_sanitize_memory TARGET) if (NOT SANITIZE_MEMORY) return() endif () sanitizer_add_flags(${TARGET} "MemorySanitizer" "MSan") endfunction () nvtop-3.2.0/cmake/modules/FindSanitizers.cmake000077500000000000000000000072311477175131100213650ustar00rootroot00000000000000# The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # If any of the used compiler is a GNU compiler, add a second option to static # link against the sanitizers. option(SANITIZE_LINK_STATIC "Try to link static against sanitizers." Off) set(FIND_QUIETLY_FLAG "") if (DEFINED Sanitizers_FIND_QUIETLY) set(FIND_QUIETLY_FLAG "QUIET") endif () find_package(ASan ${FIND_QUIETLY_FLAG}) find_package(TSan ${FIND_QUIETLY_FLAG}) find_package(MSan ${FIND_QUIETLY_FLAG}) find_package(UBSan ${FIND_QUIETLY_FLAG}) function(sanitizer_add_blacklist_file FILE) if(NOT IS_ABSOLUTE ${FILE}) set(FILE "${CMAKE_CURRENT_SOURCE_DIR}/${FILE}") endif() get_filename_component(FILE "${FILE}" REALPATH) sanitizer_check_compiler_flags("-fsanitize-blacklist=${FILE}" "SanitizerBlacklist" "SanBlist") endfunction() function(add_sanitizers ...) # If no sanitizer is enabled, return immediately. if (NOT (SANITIZE_ADDRESS OR SANITIZE_MEMORY OR SANITIZE_THREAD OR SANITIZE_UNDEFINED)) return() endif () foreach (TARGET ${ARGV}) # Check if this target will be compiled by exactly one compiler. Other- # wise sanitizers can't be used and a warning should be printed once. get_target_property(TARGET_TYPE ${TARGET} TYPE) if (TARGET_TYPE STREQUAL "INTERFACE_LIBRARY") message(WARNING "Can't use any sanitizers for target ${TARGET}, " "because it is an interface library and cannot be " "compiled directly.") return() endif () sanitizer_target_compilers(${TARGET} TARGET_COMPILER) list(LENGTH TARGET_COMPILER NUM_COMPILERS) if (NUM_COMPILERS GREATER 1) message(WARNING "Can't use any sanitizers for target ${TARGET}, " "because it will be compiled by incompatible compilers. " "Target will be compiled without sanitizers.") return() # If the target is compiled by no or no known compiler, give a warning. elseif (NUM_COMPILERS EQUAL 0) message(WARNING "Sanitizers for target ${TARGET} may not be" " usable, because it uses no or an unknown compiler. " "This is a false warning for targets using only " "object lib(s) as input.") endif () # Add sanitizers for target. add_sanitize_address(${TARGET}) add_sanitize_thread(${TARGET}) add_sanitize_memory(${TARGET}) add_sanitize_undefined(${TARGET}) endforeach () endfunction(add_sanitizers) nvtop-3.2.0/cmake/modules/FindSystemd.cmake000066400000000000000000000023061477175131100206550ustar00rootroot00000000000000# # - Find systemd libraries # # SYSTEMD_INCLUDE_DIRS - where to find systemd/sd-journal.h, etc. # SYSTEMD_LIBRARIES - List of libraries when using libsystemd. # SYSTEMD_FOUND - True if libsystemd is found. # A "systemd" target is created when found pkg_search_module(PC_SYSTEMD QUIET libsystemd) find_path(SYSTEMD_INCLUDE_DIR NAMES systemd/sd-device.h HINTS ${PC_SYSTEMD_INCLUDE_DIRS} ) find_library(SYSTEMD_LIBRARY NAMES systemd HINTS ${PC_SYSTEMD_LIBRARY_DIRS} ) include(FindPackageHandleStandardArgs) find_package_handle_standard_args(Systemd REQUIRED_VARS SYSTEMD_LIBRARY SYSTEMD_INCLUDE_DIR VERSION_VAR PC_SYSTEMD_VERSION) if(SYSTEMD_FOUND) set(SYSTEMD_LIBRARIES ${SYSTEMD_LIBRARY}) set(SYSTEMD_INCLUDE_DIRS ${SYSTEMD_INCLUDE_DIR}) add_library(systemd INTERFACE IMPORTED GLOBAL) target_include_directories(systemd INTERFACE ${SYSTEMD_INCLUDE_DIRS}) set_target_properties(systemd PROPERTIES INTERFACE_INCLUDE_DIRECTORIES ${SYSTEMD_INCLUDE_DIRS}) target_link_libraries(systemd INTERFACE ${SYSTEMD_LIBRARIES}) else() set(SYSTEMD_LIBRARIES) set(SYSTEMD_INCLUDE_DIRS) endif() mark_as_advanced(SYSTEMD_LIBRARIES SYSTEMD_INCLUDE_DIRS)nvtop-3.2.0/cmake/modules/FindTSan.cmake000066400000000000000000000047731477175131100201040ustar00rootroot00000000000000# The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. option(SANITIZE_THREAD "Enable ThreadSanitizer for sanitized targets." Off) set(FLAG_CANDIDATES "-g -fsanitize=thread" ) # ThreadSanitizer is not compatible with MemorySanitizer. if (SANITIZE_THREAD AND SANITIZE_MEMORY) message(FATAL_ERROR "ThreadSanitizer is not compatible with " "MemorySanitizer.") endif () include(sanitize-helpers) if (SANITIZE_THREAD) if (NOT ${CMAKE_SYSTEM_NAME} STREQUAL "Linux" AND NOT ${CMAKE_SYSTEM_NAME} STREQUAL "Darwin") message(WARNING "ThreadSanitizer disabled for target ${TARGET} because " "ThreadSanitizer is supported for Linux systems and macOS only.") set(SANITIZE_THREAD Off CACHE BOOL "Enable ThreadSanitizer for sanitized targets." FORCE) elseif (NOT ${CMAKE_SIZEOF_VOID_P} EQUAL 8) message(WARNING "ThreadSanitizer disabled for target ${TARGET} because " "ThreadSanitizer is supported for 64bit systems only.") set(SANITIZE_THREAD Off CACHE BOOL "Enable ThreadSanitizer for sanitized targets." FORCE) else () sanitizer_check_compiler_flags("${FLAG_CANDIDATES}" "ThreadSanitizer" "TSan") endif () endif () function (add_sanitize_thread TARGET) if (NOT SANITIZE_THREAD) return() endif () sanitizer_add_flags(${TARGET} "ThreadSanitizer" "TSan") endfunction () nvtop-3.2.0/cmake/modules/FindUBSan.cmake000066400000000000000000000032401477175131100201730ustar00rootroot00000000000000# The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. option(SANITIZE_UNDEFINED "Enable UndefinedBehaviorSanitizer for sanitized targets." Off) set(FLAG_CANDIDATES "-g -fsanitize=undefined" ) include(sanitize-helpers) if (SANITIZE_UNDEFINED) sanitizer_check_compiler_flags("${FLAG_CANDIDATES}" "UndefinedBehaviorSanitizer" "UBSan") endif () function (add_sanitize_undefined TARGET) if (NOT SANITIZE_UNDEFINED) return() endif () sanitizer_add_flags(${TARGET} "UndefinedBehaviorSanitizer" "UBSan") endfunction () nvtop-3.2.0/cmake/modules/FindUDev.cmake000066400000000000000000000030441477175131100200700ustar00rootroot00000000000000# Configure libudev environment # # UDEV_FOUND - system has a libudev # UDEV_INCLUDE_DIR - where to find header files # UDEV_LIBRARIES - the libraries to link against udev # UDEV_STABLE - it's true when is the version greater or equals to 143 - version when the libudev was stabilized in its API # An "udev" target is created when found # # Adapted from a version of Petr Vanek # copyright (c) 2011 Petr Vanek # copyright (c) 2022 Maxime Schmitt # # Redistribution and use of this file is allowed according to the terms of the BSD license. # pkg_search_module(PC_UDEV QUIET libudev) find_path(UDEV_INCLUDE_DIR NAMES libudev.h HINTS ${PC_UDEV_INCLUDE_DIRS} ) find_library(UDEV_LIBRARY NAMES udev HINTS ${PC_UDEV_LIBRARY_DIRS} ) include(FindPackageHandleStandardArgs) find_package_handle_standard_args(UDev REQUIRED_VARS UDEV_LIBRARY UDEV_INCLUDE_DIR VERSION_VAR PC_UDEV_VERSION) if(UDEV_FOUND) if(PC_UDEV_VERSION GREATER_EQUAL "143") set(UDEV_STABLE TRUE) else() set(UDEV_STABLE FALSE) endif() set(UDEV_LIBRARIES ${UDEV_LIBRARY}) set(UDEV_INCLUDE_DIRS ${UDEV_INCLUDE_DIR}) message(STATUS "Libudev stable: ${UDEV_STABLE}") add_library(udev INTERFACE IMPORTED GLOBAL) set_target_properties(udev PROPERTIES INTERFACE_INCLUDE_DIRECTORIES ${UDEV_INCLUDE_DIRS}) target_link_libraries(udev INTERFACE ${UDEV_LIBRARIES}) else() set(UDEV_LIBRARIES) set(UDEV_INCLUDE_DIRS) endif() mark_as_advanced(UDEV_LIBRARIES UDEV_INCLUDE_DIRS)nvtop-3.2.0/cmake/modules/asan-wrapper000077500000000000000000000037331477175131100177550ustar00rootroot00000000000000#!/bin/sh # The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # This script is a wrapper for AddressSanitizer. In some special cases you need # to preload AddressSanitizer to avoid error messages - e.g. if you're # preloading another library to your application. At the moment this script will # only do something, if we're running on a Linux platform. OSX might not be # affected. # Exit immediately, if platform is not Linux. if [ "$(uname)" != "Linux" ] then exec $@ fi # Get the used libasan of the application ($1). If a libasan was found, it will # be prepended to LD_PRELOAD. libasan=$(ldd $1 | grep libasan | sed "s/^[[:space:]]//" | cut -d' ' -f1) if [ -n "$libasan" ] then if [ -n "$LD_PRELOAD" ] then export LD_PRELOAD="$libasan:$LD_PRELOAD" else export LD_PRELOAD="$libasan" fi fi # Execute the application. exec $@ nvtop-3.2.0/cmake/modules/sanitize-helpers.cmake000077500000000000000000000170041477175131100217160ustar00rootroot00000000000000# The MIT License (MIT) # # Copyright (c) # 2013 Matthew Arsenault # 2015-2016 RWTH Aachen University, Federal Republic of Germany # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in all # copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # Helper function to get the language of a source file. function (sanitizer_lang_of_source FILE RETURN_VAR) get_filename_component(LONGEST_EXT "${FILE}" EXT) # If extension is empty return. This can happen for extensionless headers if("${LONGEST_EXT}" STREQUAL "") set(${RETURN_VAR} "" PARENT_SCOPE) return() endif() # Get shortest extension as some files can have dot in their names string(REGEX REPLACE "^.*(\\.[^.]+)$" "\\1" FILE_EXT ${LONGEST_EXT}) string(TOLOWER "${FILE_EXT}" FILE_EXT) string(SUBSTRING "${FILE_EXT}" 1 -1 FILE_EXT) get_property(ENABLED_LANGUAGES GLOBAL PROPERTY ENABLED_LANGUAGES) foreach (LANG ${ENABLED_LANGUAGES}) list(FIND CMAKE_${LANG}_SOURCE_FILE_EXTENSIONS "${FILE_EXT}" TEMP) if (NOT ${TEMP} EQUAL -1) set(${RETURN_VAR} "${LANG}" PARENT_SCOPE) return() endif () endforeach() set(${RETURN_VAR} "" PARENT_SCOPE) endfunction () # Helper function to get compilers used by a target. function (sanitizer_target_compilers TARGET RETURN_VAR) # Check if all sources for target use the same compiler. If a target uses # e.g. C and Fortran mixed and uses different compilers (e.g. clang and # gfortran) this can trigger huge problems, because different compilers may # use different implementations for sanitizers. set(BUFFER "") get_target_property(TSOURCES ${TARGET} SOURCES) foreach (FILE ${TSOURCES}) # If expression was found, FILE is a generator-expression for an object # library. Object libraries will be ignored. string(REGEX MATCH "TARGET_OBJECTS:([^ >]+)" _file ${FILE}) if ("${_file}" STREQUAL "") sanitizer_lang_of_source(${FILE} LANG) if (LANG) list(APPEND BUFFER ${CMAKE_${LANG}_COMPILER_ID}) endif () endif () endforeach () list(REMOVE_DUPLICATES BUFFER) set(${RETURN_VAR} "${BUFFER}" PARENT_SCOPE) endfunction () # Helper function to check compiler flags for language compiler. function (sanitizer_check_compiler_flag FLAG LANG VARIABLE) if (${LANG} STREQUAL "C") include(CheckCCompilerFlag) check_c_compiler_flag("${FLAG}" ${VARIABLE}) elseif (${LANG} STREQUAL "CXX") include(CheckCXXCompilerFlag) check_cxx_compiler_flag("${FLAG}" ${VARIABLE}) elseif (${LANG} STREQUAL "Fortran") # CheckFortranCompilerFlag was introduced in CMake 3.x. To be compatible # with older Cmake versions, we will check if this module is present # before we use it. Otherwise we will define Fortran coverage support as # not available. include(CheckFortranCompilerFlag OPTIONAL RESULT_VARIABLE INCLUDED) if (INCLUDED) check_fortran_compiler_flag("${FLAG}" ${VARIABLE}) elseif (NOT CMAKE_REQUIRED_QUIET) message(STATUS "Performing Test ${VARIABLE}") message(STATUS "Performing Test ${VARIABLE}" " - Failed (Check not supported)") endif () endif() endfunction () # Helper function to test compiler flags. function (sanitizer_check_compiler_flags FLAG_CANDIDATES NAME PREFIX) set(CMAKE_REQUIRED_QUIET ${${PREFIX}_FIND_QUIETLY}) get_property(ENABLED_LANGUAGES GLOBAL PROPERTY ENABLED_LANGUAGES) foreach (LANG ${ENABLED_LANGUAGES}) # Sanitizer flags are not dependend on language, but the used compiler. # So instead of searching flags foreach language, search flags foreach # compiler used. set(COMPILER ${CMAKE_${LANG}_COMPILER_ID}) if (NOT DEFINED ${PREFIX}_${COMPILER}_FLAGS) foreach (FLAG ${FLAG_CANDIDATES}) if(NOT CMAKE_REQUIRED_QUIET) message(STATUS "Try ${COMPILER} ${NAME} flag = [${FLAG}]") endif() set(CMAKE_REQUIRED_FLAGS "${FLAG}") unset(${PREFIX}_FLAG_DETECTED CACHE) sanitizer_check_compiler_flag("${FLAG}" ${LANG} ${PREFIX}_FLAG_DETECTED) if (${PREFIX}_FLAG_DETECTED) # If compiler is a GNU compiler, search for static flag, if # SANITIZE_LINK_STATIC is enabled. if (SANITIZE_LINK_STATIC AND (${COMPILER} STREQUAL "GNU")) string(TOLOWER ${PREFIX} PREFIX_lower) sanitizer_check_compiler_flag( "-static-lib${PREFIX_lower}" ${LANG} ${PREFIX}_STATIC_FLAG_DETECTED) if (${PREFIX}_STATIC_FLAG_DETECTED) set(FLAG "-static-lib${PREFIX_lower} ${FLAG}") endif () endif () set(${PREFIX}_${COMPILER}_FLAGS "${FLAG}" CACHE STRING "${NAME} flags for ${COMPILER} compiler.") mark_as_advanced(${PREFIX}_${COMPILER}_FLAGS) break() endif () endforeach () if (NOT ${PREFIX}_FLAG_DETECTED) set(${PREFIX}_${COMPILER}_FLAGS "" CACHE STRING "${NAME} flags for ${COMPILER} compiler.") mark_as_advanced(${PREFIX}_${COMPILER}_FLAGS) message(WARNING "${NAME} is not available for ${COMPILER} " "compiler. Targets using this compiler will be " "compiled without ${NAME}.") endif () endif () endforeach () endfunction () # Helper to assign sanitizer flags for TARGET. function (sanitizer_add_flags TARGET NAME PREFIX) # Get list of compilers used by target and check, if sanitizer is available # for this target. Other compiler checks like check for conflicting # compilers will be done in add_sanitizers function. sanitizer_target_compilers(${TARGET} TARGET_COMPILER) list(LENGTH TARGET_COMPILER NUM_COMPILERS) if ("${${PREFIX}_${TARGET_COMPILER}_FLAGS}" STREQUAL "") return() endif() # Set compile- and link-flags for target. set_property(TARGET ${TARGET} APPEND_STRING PROPERTY COMPILE_FLAGS " ${${PREFIX}_${TARGET_COMPILER}_FLAGS}") set_property(TARGET ${TARGET} APPEND_STRING PROPERTY COMPILE_FLAGS " ${SanBlist_${TARGET_COMPILER}_FLAGS}") set_property(TARGET ${TARGET} APPEND_STRING PROPERTY LINK_FLAGS " ${${PREFIX}_${TARGET_COMPILER}_FLAGS}") endfunction () nvtop-3.2.0/cmake/optimization_flags.cmake000066400000000000000000000015651477175131100206640ustar00rootroot00000000000000set(ADDITIONAL_DEBUG_COMPILE_OPTIONS "-Wall" #"-Wpedantic" "-Wextra" "-Waddress" "-Waggressive-loop-optimizations" #"-Wcast-qual" #"-Wcast-align" "-Wbad-function-cast" "-Wmissing-declarations" "-Wmissing-parameter-type" "-Wmissing-prototypes" "-Wnested-externs" "-Wold-style-declaration" "-Wold-style-definition" "-Wstrict-prototypes" "-Wpointer-sign" "-Wdouble-promotion" "-Wuninitialized" "-Winit-self" "-Wstrict-aliasing" "-Wsuggest-attribute=const" "-Wtrampolines" "-Wfloat-equal" "-Wshadow" "-Wunsafe-loop-optimizations" "-Wfloat-conversion" "-Wlogical-op" "-Wnormalized" "-Wdisabled-optimization" "-Whsa" #"-Wconversion" "-Wunused-result" "-Werror=implicit-function-declaration" #"-Wpadded" "-Wformat" "-Wformat-security" CACHE INTERNAL "String" ) set(ADDITIONAL_RELEASE_LINK_OPTIONS "-Wl,-z,relro") nvtop-3.2.0/desktop/000077500000000000000000000000001477175131100143425ustar00rootroot00000000000000nvtop-3.2.0/desktop/nvtop.desktop000066400000000000000000000002471477175131100171060ustar00rootroot00000000000000[Desktop Entry] Name=nvtop GenericName=GPU Process Monitor Type=Application Terminal=true Exec=nvtop Icon=nvtop Categories=System;Monitor; X-AppImage-Integrate=false nvtop-3.2.0/desktop/nvtop.metainfo.xml.in000066400000000000000000000030331477175131100204370ustar00rootroot00000000000000 io.github.syllo.nvtop nvtop GPU process monitor for AMD, Intel and NVIDIA CC0-1.0 GPL-3.0-or-later Maxime Schmitt

Nvtop stands for Neat Videocard TOP, a (h)top like task monitor for AMD, Intel and NVIDIA GPUs. It can handle multiple GPUs and print information about them in a htop familiar way.

 nvtop.desktop nvtop.svg System Monitor https://github.com/Syllo/nvtop The nvtop interface https://raw.githubusercontent.com/Syllo/nvtop/master/screenshot/NVTOP_ex1.png The nvtop option screen https://raw.githubusercontent.com/Syllo/nvtop/master/screenshot/Nvtop-config.png nvtop nvtop-3.2.0/desktop/nvtop.svg000066400000000000000000000055541477175131100162420ustar00rootroot00000000000000 nvtop-3.2.0/include/000077500000000000000000000000001477175131100143145ustar00rootroot00000000000000nvtop-3.2.0/include/ascend/000077500000000000000000000000001477175131100155515ustar00rootroot00000000000000nvtop-3.2.0/include/ascend/dcmi_interface_api.h000066400000000000000000000366551477175131100215260ustar00rootroot00000000000000/* Copyright(C) 2021-2023. Huawei Technologies Co.,Ltd. All rights reserved. Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ #ifndef __DCMI_INTERFACE_API_H__ #define __DCMI_INTERFACE_API_H__ #ifdef __cplusplus #if __cplusplus extern "C" { #endif #endif /* __cplusplus */ #ifdef __linux__ #define DCMIDLLEXPORT #else #define DCMIDLLEXPORT _declspec(dllexport) #endif #define MAX_CARD_NUM 64 #define MAX_CHIP_NAME_LEN 32 // Maximum length of chip name #define TEMPLATE_NAME_LEN 32 #define DIE_ID_COUNT 5 // Number of die ID characters #define DCMI_UTILIZATION_RATE_DDR 1 #define DCMI_UTILIZATION_RATE_AICORE 2 #define DCMI_UTILIZATION_RATE_AICPU 3 #define DCMI_UTILIZATION_RATE_CTRLCPU 4 #define DCMI_UTILIZATION_RATE_DDR_BANDWIDTH 5 #define DCMI_UTILIZATION_RATE_HBM 6 #define DCMI_UTILIZATION_RATE_HBM_BANDWIDTH 10 #define DCMI_UTILIZATION_RATE_VECTORCORE 12 /*----------------------------------------------* * Structure description * *----------------------------------------------*/ struct dcmi_chip_info { unsigned char chip_type[MAX_CHIP_NAME_LEN]; unsigned char chip_name[MAX_CHIP_NAME_LEN]; unsigned char chip_ver[MAX_CHIP_NAME_LEN]; unsigned int aicore_cnt; }; struct dcmi_pcie_info_all { unsigned int venderid; unsigned int subvenderid; unsigned int deviceid; unsigned int subdeviceid; int domain; unsigned int bdf_busid; unsigned int bdf_deviceid; unsigned int bdf_funcid; unsigned char reserve[32]; /* the size of dcmi_pcie_info_all is 64 */ }; struct dcmi_die_id { unsigned int soc_die[DIE_ID_COUNT]; }; struct dcmi_hbm_info { unsigned long long memory_size; unsigned int freq; unsigned long long memory_usage; int temp; unsigned int bandwith_util_rate; }; struct dcmi_get_memory_info_stru { unsigned long long memory_size; /* unit:MB */ unsigned long long memory_available; /* free + hugepages_free * hugepagesize */ unsigned int freq; unsigned long hugepagesize; /* unit:KB */ unsigned long hugepages_total; unsigned long hugepages_free; unsigned int utiliza; /* ddr memory info usages */ unsigned char reserve[60]; /* the size of dcmi_memory_info is 96 */ }; enum dcmi_ip_addr_type { DCMI_IPADDR_TYPE_V4 = 0, /** IPv4 */ DCMI_IPADDR_TYPE_V6 = 1, /** IPv6 */ DCMI_IPADDR_TYPE_ANY = 2 /** IPv4+IPv6 ("dual-stack") */ }; struct dcmi_ip_addr { union { unsigned char ip6[16]; unsigned char ip4[4]; } u_addr; enum dcmi_ip_addr_type ip_type; }; enum dcmi_unit_type { NPU_TYPE = 0, MCU_TYPE = 1, CPU_TYPE = 2, INVALID_TYPE = 0xFF }; enum dcmi_rdfx_detect_result { DCMI_RDFX_DETECT_OK = 0, DCMI_RDFX_DETECT_SOCK_FAIL = 1, DCMI_RDFX_DETECT_RECV_TIMEOUT = 2, DCMI_RDFX_DETECT_UNREACH = 3, DCMI_RDFX_DETECT_TIME_EXCEEDED = 4, DCMI_RDFX_DETECT_FAULT = 5, DCMI_RDFX_DETECT_INIT = 6, DCMI_RDFX_DETECT_THREAD_ERR = 7, DCMI_RDFX_DETECT_IP_SET = 8, DCMI_RDFX_DETECT_MAX = 0xFF }; enum dcmi_port_type { DCMI_VNIC_PORT = 0, DCMI_ROCE_PORT = 1, DCMI_INVALID_PORT }; enum dcmi_main_cmd { DCMI_MAIN_CMD_DVPP = 0, DCMI_MAIN_CMD_ISP, DCMI_MAIN_CMD_TS_GROUP_NUM, DCMI_MAIN_CMD_CAN, DCMI_MAIN_CMD_UART, DCMI_MAIN_CMD_UPGRADE, DCMI_MAIN_CMD_TEMP = 50, DCMI_MAIN_CMD_SVM = 51, DCMI_MAIN_CMD_VDEV_MNG, DCMI_MAIN_CMD_DEVICE_SHARE = 0x8001, DCMI_MAIN_CMD_MAX }; enum dcmi_freq_type { DCMI_FREQ_DDR = 1, DCMI_FREQ_CTRLCPU = 2, DCMI_FREQ_HBM = 6, DCMI_FREQ_AICORE_CURRENT_ = 7, DCMI_FREQ_AICORE_MAX = 9, DCMI_FREQ_VECTORCORE_CURRENT = 12 }; enum dcmi_reset_channel { OUTBAND_CHANNEL = 0, // out-of-band reset INBAND_CHANNEL // in-band reset }; enum dcmi_boot_status { DCMI_BOOT_STATUS_UNINIT = 0, // not init DCMI_BOOT_STATUS_BIOS, // BIOS starting DCMI_BOOT_STATUS_OS, // OS starting DCMI_BOOT_STATUS_FINISH // started }; enum dcmi_event_type { DCMI_DMS_FAULT_EVENT = 0, }; enum dcmi_die_type { NDIE, VDIE }; #define DCMI_VDEV_RES_NAME_LEN 16 #define DCMI_VDEV_SIZE 20 #define DCMI_VDEV_FOR_RESERVE 32 #define DCMI_SOC_SPLIT_MAX 32 #define DCMI_MAX_EVENT_NAME_LENGTH 256 #define DCMI_MAX_EVENT_DATA_LENGTH 32 #define DCMI_EVENT_FILTER_FLAG_EVENT_ID (1UL << 0) #define DCMI_EVENT_FILTER_FLAG_SERVERITY (1UL << 1) #define DCMI_EVENT_FILTER_FLAG_NODE_TYPE (1UL << 2) #define DCMI_MAX_EVENT_RESV_LENGTH 32 struct dcmi_base_resource { unsigned long long token; unsigned long long token_max; unsigned long long task_timeout; unsigned int vfg_id; unsigned char vip_mode; unsigned char reserved[DCMI_VDEV_FOR_RESERVE - 1]; /* bytes aligned */ }; /* total types of computing resource */ struct dcmi_computing_resource { /* accelator resource */ float aic; float aiv; unsigned short dsa; unsigned short rtsq; unsigned short acsq; unsigned short cdqm; unsigned short c_core; unsigned short ffts; unsigned short sdma; unsigned short pcie_dma; /* memory resource, MB as unit */ unsigned long long memory_size; /* id resource */ unsigned int event_id; unsigned int notify_id; unsigned int stream_id; unsigned int model_id; /* cpu resource */ unsigned short topic_schedule_aicpu; unsigned short host_ctrl_cpu; unsigned short host_aicpu; unsigned short device_aicpu; unsigned short topic_ctrl_cpu_slot; /* vnpu resource */ unsigned int vdev_aicore_utilization; unsigned long long vdev_memory_total; unsigned long long vdev_memory_free; unsigned char reserved[DCMI_VDEV_FOR_RESERVE-DCMI_VDEV_SIZE]; }; struct dcmi_media_resource { /* dvpp resource */ float jpegd; float jpege; float vpc; float vdec; float pngd; float venc; unsigned char reserved[DCMI_VDEV_FOR_RESERVE]; }; struct dcmi_create_vdev_out { unsigned int vdev_id; unsigned int pcie_bus; unsigned int pcie_device; unsigned int pcie_func; unsigned int vfg_id; unsigned char reserved[DCMI_VDEV_FOR_RESERVE]; }; struct dcmi_create_vdev_res_stru { unsigned int vdev_id; unsigned int vfg_id; char template_name[TEMPLATE_NAME_LEN]; unsigned char reserved[64]; }; struct dcmi_vdev_query_info { char name[DCMI_VDEV_RES_NAME_LEN]; unsigned int status; unsigned int is_container_used; unsigned int vfid; unsigned int vfg_id; unsigned long long container_id; struct dcmi_base_resource base; struct dcmi_computing_resource computing; struct dcmi_media_resource media; }; /* for single search */ struct dcmi_vdev_query_stru { unsigned int vdev_id; struct dcmi_vdev_query_info query_info; }; struct dcmi_soc_free_resource { unsigned int vfg_num; unsigned int vfg_bitmap; struct dcmi_base_resource base; struct dcmi_computing_resource computing; struct dcmi_media_resource media; }; struct dcmi_soc_total_resource { unsigned int vdev_num; unsigned int vdev_id[DCMI_SOC_SPLIT_MAX]; unsigned int vfg_num; unsigned int vfg_bitmap; struct dcmi_base_resource base; struct dcmi_computing_resource computing; struct dcmi_media_resource media; }; struct dcmi_dms_fault_event { unsigned int event_id; /* Event ID */ unsigned short deviceid; /* Device ID */ unsigned char node_type; /* Node type */ unsigned char node_id; /* Node ID */ unsigned char sub_node_type; /* Subnode type */ unsigned char sub_node_id; /* Subnode ID */ unsigned char severity; /* Event severity. 0: warning; 1: minor; 2: major; 3: critical */ unsigned char assertion; /* Event type. 0: fault recovery; 1: fault generation; 2: one-off event */ int event_serial_num; /* Alarm serial number */ int notify_serial_num; /* Notification serial number*/ /* Time when the event occurs, presenting as the number of seconds that have elapsed since the Unix epoch. */ unsigned long long alarm_raised_time; char event_name[DCMI_MAX_EVENT_NAME_LENGTH]; /* Event description */ char additional_info[DCMI_MAX_EVENT_DATA_LENGTH]; /* Additional event information */ unsigned char resv[DCMI_MAX_EVENT_RESV_LENGTH]; /**< Reserves 32 bytes */ }; struct dcmi_event { enum dcmi_event_type type; /* Event type */ union { struct dcmi_dms_fault_event dms_event; /* Event content */ } event_t; }; struct dcmi_event_filter { /* It can be used to enable one or all filter criteria. The filter criteria are as follows: 0: disables the filter criteria. DCMI_EVENT_FILTER_FLAG_EVENT_ID: receives only specified events. DCMI_EVENT_FILTER_FLAG_SERVERITY: receives only the events of a specified level and higher levels. DCMI_EVENT_FILTER_FLAG_NODE_TYPE: receives only events of a specified node type. */ unsigned long long filter_flag; /* Receives a specified event. For details, see the Health Management Error Definition. */ unsigned int event_id; /* Receives events of a specified level and higher levels. For details, see the severity definition in the struct dcmi_dms_fault_event structure. */ unsigned char severity; /* Receives only events of a specified node type. For details, see the Health Management Error Definition. */ unsigned char node_type; unsigned char resv[DCMI_MAX_EVENT_RESV_LENGTH]; /* < Reserves 32 bytes. */ }; struct dcmi_proc_mem_info { int proc_id; // unit is byte unsigned long proc_mem_usage; }; struct dcmi_board_info { unsigned int board_id; unsigned int pcb_id; unsigned int bom_id; unsigned int slot_id; // slot_id indicates pcie slot ID of the chip }; struct dsmi_hbm_info_stru { unsigned long long memory_size; /**< HBM total size, KB */ unsigned int freq; /**< HBM freq, MHZ */ unsigned long long memory_usage; /**< HBM memory_usage, KB */ int temp; /**< HBM temperature */ unsigned int bandwith_util_rate; }; #define DCMI_VERSION_1 #define DCMI_VERSION_2 #if defined DCMI_VERSION_2 DCMIDLLEXPORT int dcmi_init(void); DCMIDLLEXPORT int dcmi_get_card_list(int *card_num, int *card_list, int list_len); DCMIDLLEXPORT int dcmi_get_device_num_in_card(int card_id, int *device_num); DCMIDLLEXPORT int dcmi_get_device_id_in_card(int card_id, int *device_id_max, int *mcu_id, int *cpu_id); DCMIDLLEXPORT int dcmi_get_device_type(int card_id, int device_id, enum dcmi_unit_type *device_type); DCMIDLLEXPORT int dcmi_get_device_pcie_info_v2(int card_id, int device_id, struct dcmi_pcie_info_all *pcie_info); DCMIDLLEXPORT int dcmi_get_device_chip_info(int card_id, int device_id, struct dcmi_chip_info *chip_info); DCMIDLLEXPORT int dcmi_get_device_power_info(int card_id, int device_id, int *power); DCMIDLLEXPORT int dcmi_get_device_health(int card_id, int device_id, unsigned int *health); DCMIDLLEXPORT int dcmi_get_device_errorcode_v2( int card_id, int device_id, int *error_count, unsigned int *error_code_list, unsigned int list_len); DCMIDLLEXPORT int dcmi_get_device_temperature(int card_id, int device_id, int *temperature); DCMIDLLEXPORT int dcmi_get_device_voltage(int card_id, int device_id, unsigned int *voltage); DCMIDLLEXPORT int dcmi_get_device_frequency( int card_id, int device_id, enum dcmi_freq_type input_type, unsigned int *frequency); DCMIDLLEXPORT int dcmi_get_device_hbm_info(int card_id, int device_id, struct dcmi_hbm_info *hbm_info); DCMIDLLEXPORT int dcmi_get_device_memory_info_v3(int card_id, int device_id, struct dcmi_get_memory_info_stru *memory_info); DCMIDLLEXPORT int dcmi_get_device_utilization_rate( int card_id, int device_id, int input_type, unsigned int *utilization_rate); DCMIDLLEXPORT int dcmi_get_device_info( int card_id, int device_id, enum dcmi_main_cmd main_cmd, unsigned int sub_cmd, void *buf, unsigned int *size); DCMIDLLEXPORT int dcmi_get_device_ip(int card_id, int device_id, enum dcmi_port_type input_type, int port_id, struct dcmi_ip_addr *ip, struct dcmi_ip_addr *mask); DCMIDLLEXPORT int dcmi_get_device_network_health(int card_id, int device_id, enum dcmi_rdfx_detect_result *result); DCMIDLLEXPORT int dcmi_get_device_logic_id(int *device_logic_id, int card_id, int device_id); DCMIDLLEXPORT int dcmi_create_vdevice(int card_id, int device_id, struct dcmi_create_vdev_res_stru *vdev, struct dcmi_create_vdev_out *out); DCMIDLLEXPORT int dcmi_set_destroy_vdevice(int card_id, int device_id, unsigned int vdevid); DCMIDLLEXPORT int dcmi_get_device_phyid_from_logicid(unsigned int logicid, unsigned int *phyid); DCMIDLLEXPORT int dcmi_get_device_logicid_from_phyid(unsigned int phyid, unsigned int *logicid); DCMIDLLEXPORT int dcmi_get_card_id_device_id_from_logicid(int *card_id, int *device_id, unsigned int device_logic_id); DCMIDLLEXPORT int dcmi_get_card_id_device_id_from_phyid(int *card_id, int *device_id, unsigned int device_phy_id); DCMIDLLEXPORT int dcmi_get_product_type(int card_id, int device_id, char *product_type_str, int buf_size); DCMIDLLEXPORT int dcmi_set_device_reset(int card_id, int device_id, enum dcmi_reset_channel channel_type); DCMIDLLEXPORT int dcmi_get_device_boot_status(int card_id, int device_id, enum dcmi_boot_status *boot_status); DCMIDLLEXPORT int dcmi_subscribe_fault_event(int card_id, int device_id, struct dcmi_event_filter filter); DCMIDLLEXPORT int dcmi_get_npu_work_mode(int card_id, unsigned char *work_mode); DCMIDLLEXPORT int dcmi_get_device_die_v2( int card_id, int device_id, enum dcmi_die_type input_type, struct dcmi_die_id *die_id); DCMIDLLEXPORT int dcmi_get_device_resource_info (int card_id, int device_id, struct dcmi_proc_mem_info *proc_info, int *proc_num); DCMIDLLEXPORT int dcmi_get_device_board_info (int card_id, int device_id, struct dcmi_board_info *board_info); DCMIDLLEXPORT int dcmi_get_hbm_info(int card_id, int device_id, struct dsmi_hbm_info_stru *device_hbm_info); #endif #if defined DCMI_VERSION_1 /* The following interfaces are V1 version interfaces. In order to ensure the compatibility is temporarily reserved, * the later version will be deleted. Please switch to the V2 version interface as soon as possible */ struct dcmi_memory_info_stru { unsigned long long memory_size; unsigned int freq; unsigned int utiliza; }; DCMIDLLEXPORT int dcmi_get_memory_info(int card_id, int device_id, struct dcmi_memory_info_stru *device_memory_info); DCMIDLLEXPORT int dcmi_get_device_errorcode( int card_id, int device_id, int *error_count, unsigned int *error_code, int *error_width); DCMIDLLEXPORT int dcmi_mcu_get_power_info(int card_id, int *power); #endif #ifdef __cplusplus #if __cplusplus } #endif #endif /* __cplusplus */ #endif /* __DCMI_INTERFACE_API_H__ */nvtop-3.2.0/include/ini.h000066400000000000000000000123371477175131100152520ustar00rootroot00000000000000/* inih -- simple .INI file parser SPDX-License-Identifier: BSD-3-Clause Copyright (C) 2009-2020, Ben Hoyt inih is released under the New BSD license (see LICENSE.txt). Go to the project home page for more info: https://github.com/benhoyt/inih */ #ifndef INI_H #define INI_H /* Make this header file easier to include in C++ code */ #ifdef __cplusplus extern "C" { #endif #include /* Nonzero if ini_handler callback should accept lineno parameter. */ #ifndef INI_HANDLER_LINENO #define INI_HANDLER_LINENO 0 #endif /* Typedef for prototype of handler function. */ #if INI_HANDLER_LINENO typedef int (*ini_handler)(void* user, const char* section, const char* name, const char* value, int lineno); #else typedef int (*ini_handler)(void* user, const char* section, const char* name, const char* value); #endif /* Typedef for prototype of fgets-style reader function. */ typedef char* (*ini_reader)(char* str, int num, void* stream); /* Parse given INI-style file. May have [section]s, name=value pairs (whitespace stripped), and comments starting with ';' (semicolon). Section is "" if name=value pair parsed before any section heading. name:value pairs are also supported as a concession to Python's configparser. For each name=value pair parsed, call handler function with given user pointer as well as section, name, and value (data only valid for duration of handler call). Handler should return nonzero on success, zero on error. Returns 0 on success, line number of first error on parse error (doesn't stop on first error), -1 on file open error, or -2 on memory allocation error (only when INI_USE_STACK is zero). */ int ini_parse(const char* filename, ini_handler handler, void* user); /* Same as ini_parse(), but takes a FILE* instead of filename. This doesn't close the file when it's finished -- the caller must do that. */ int ini_parse_file(FILE* file, ini_handler handler, void* user); /* Same as ini_parse(), but takes an ini_reader function pointer instead of filename. Used for implementing custom or string-based I/O (see also ini_parse_string). */ int ini_parse_stream(ini_reader reader, void* stream, ini_handler handler, void* user); /* Same as ini_parse(), but takes a zero-terminated string with the INI data instead of a file. Useful for parsing INI data from a network socket or already in memory. */ int ini_parse_string(const char* string, ini_handler handler, void* user); /* Nonzero to allow multi-line value parsing, in the style of Python's configparser. If allowed, ini_parse() will call the handler with the same name for each subsequent line parsed. */ #ifndef INI_ALLOW_MULTILINE #define INI_ALLOW_MULTILINE 1 #endif /* Nonzero to allow a UTF-8 BOM sequence (0xEF 0xBB 0xBF) at the start of the file. See https://github.com/benhoyt/inih/issues/21 */ #ifndef INI_ALLOW_BOM #define INI_ALLOW_BOM 1 #endif /* Chars that begin a start-of-line comment. Per Python configparser, allow both ; and # comments at the start of a line by default. */ #ifndef INI_START_COMMENT_PREFIXES #define INI_START_COMMENT_PREFIXES ";#" #endif /* Nonzero to allow inline comments (with valid inline comment characters specified by INI_INLINE_COMMENT_PREFIXES). Set to 0 to turn off and match Python 3.2+ configparser behaviour. */ #ifndef INI_ALLOW_INLINE_COMMENTS #define INI_ALLOW_INLINE_COMMENTS 1 #endif #ifndef INI_INLINE_COMMENT_PREFIXES #define INI_INLINE_COMMENT_PREFIXES ";" #endif /* Nonzero to use stack for line buffer, zero to use heap (malloc/free). */ #ifndef INI_USE_STACK #define INI_USE_STACK 1 #endif /* Maximum line length for any line in INI file (stack or heap). Note that this must be 3 more than the longest line (due to '\r', '\n', and '\0'). */ #ifndef INI_MAX_LINE #define INI_MAX_LINE 200 #endif /* Nonzero to allow heap line buffer to grow via realloc(), zero for a fixed-size buffer of INI_MAX_LINE bytes. Only applies if INI_USE_STACK is zero. */ #ifndef INI_ALLOW_REALLOC #define INI_ALLOW_REALLOC 0 #endif /* Initial size in bytes for heap line buffer. Only applies if INI_USE_STACK is zero. */ #ifndef INI_INITIAL_ALLOC #define INI_INITIAL_ALLOC 200 #endif /* Stop parsing on first error (default is to keep parsing). */ #ifndef INI_STOP_ON_FIRST_ERROR #define INI_STOP_ON_FIRST_ERROR 0 #endif /* Nonzero to call the handler at the start of each new section (with name and value NULL). Default is to only call the handler on each name=value pair. */ #ifndef INI_CALL_HANDLER_ON_NEW_SECTION #define INI_CALL_HANDLER_ON_NEW_SECTION 0 #endif /* Nonzero to allow a name without a value (no '=' or ':' on the line) and call the handler with value NULL in this case. Default is to treat no-value lines as an error. */ #ifndef INI_ALLOW_NO_VALUE #define INI_ALLOW_NO_VALUE 0 #endif /* Nonzero to use custom ini_malloc, ini_free, and ini_realloc memory allocation functions (INI_USE_STACK must also be 0). These functions must have the same signatures as malloc/free/realloc and behave in a similar way. ini_realloc is only needed if INI_ALLOW_REALLOC is set. */ #ifndef INI_CUSTOM_ALLOCATOR #define INI_CUSTOM_ALLOCATOR 0 #endif #ifdef __cplusplus } #endif #endif /* INI_H */ nvtop-3.2.0/include/libdrm/000077500000000000000000000000001477175131100155655ustar00rootroot00000000000000nvtop-3.2.0/include/libdrm/xe_drm.h000066400000000000000000001606151477175131100172250ustar00rootroot00000000000000/* SPDX-License-Identifier: MIT */ /* This file is required by nvtop in order to support the newest xe driver whose xe_drm.h hasn't made it to libdrm yet */ /* * Copyright © 2023 Intel Corporation */ #ifndef _UAPI_XE_DRM_H_ #define _UAPI_XE_DRM_H_ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif /* * Please note that modifications to all structs defined here are * subject to backwards-compatibility constraints. * Sections in this file are organized as follows: * 1. IOCTL definition * 2. Extension definition and helper structs * 3. IOCTL's Query structs in the order of the Query's entries. * 4. The rest of IOCTL structs in the order of IOCTL declaration. */ /** * DOC: Xe Device Block Diagram * * The diagram below represents a high-level simplification of a discrete * GPU supported by the Xe driver. It shows some device components which * are necessary to understand this API, as well as how their relations * to each other. This diagram does not represent real hardware:: * * ┌──────────────────────────────────────────────────────────────────┐ * │ ┌──────────────────────────────────────────────────┐ ┌─────────┐ │ * │ │ ┌───────────────────────┐ ┌─────┐ │ │ ┌─────┐ │ │ * │ │ │ VRAM0 ├───┤ ... │ │ │ │VRAM1│ │ │ * │ │ └───────────┬───────────┘ └─GT1─┘ │ │ └──┬──┘ │ │ * │ │ ┌──────────────────┴───────────────────────────┐ │ │ ┌──┴──┐ │ │ * │ │ │ ┌─────────────────────┐ ┌─────────────────┐ │ │ │ │ │ │ │ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │RCS0 │ │BCS0 │ │ │ │ │ │ │ │ │ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VCS0 │ │VCS1 │ │ │ │ │ │ │ │ │ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VECS0│ │VECS1│ │ │ │ │ │ ... │ │ │ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │CCS0 │ │CCS1 │ │ │ │ │ │ │ │ │ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ * │ │ │ └─────────DSS─────────┘ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ * │ │ │ │ │CCS2 │ │CCS3 │ │ │ │ │ │ │ │ │ * │ │ │ ┌─────┐ ┌─────┐ ┌─────┐ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ * │ │ │ │ ... │ │ ... │ │ ... │ │ │ │ │ │ │ │ │ │ * │ │ │ └─DSS─┘ └─DSS─┘ └─DSS─┘ └─────Engines─────┘ │ │ │ │ │ │ │ * │ │ └───────────────────────────GT0────────────────┘ │ │ └─GT2─┘ │ │ * │ └────────────────────────────Tile0─────────────────┘ └─ Tile1──┘ │ * └─────────────────────────────Device0───────┬──────────────────────┘ * │ * ───────────────────────┴────────── PCI bus */ /** * DOC: Xe uAPI Overview * * This section aims to describe the Xe's IOCTL entries, its structs, and other * Xe related uAPI such as uevents and PMU (Platform Monitoring Unit) related * entries and usage. * * List of supported IOCTLs: * - &DRM_IOCTL_XE_DEVICE_QUERY * - &DRM_IOCTL_XE_GEM_CREATE * - &DRM_IOCTL_XE_GEM_MMAP_OFFSET * - &DRM_IOCTL_XE_VM_CREATE * - &DRM_IOCTL_XE_VM_DESTROY * - &DRM_IOCTL_XE_VM_BIND * - &DRM_IOCTL_XE_EXEC_QUEUE_CREATE * - &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY * - &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY * - &DRM_IOCTL_XE_EXEC * - &DRM_IOCTL_XE_WAIT_USER_FENCE * - &DRM_IOCTL_XE_OBSERVATION */ /* * xe specific ioctls. * * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset * against DRM_COMMAND_BASE and should be between [0x0, 0x60). */ #define DRM_XE_DEVICE_QUERY 0x00 #define DRM_XE_GEM_CREATE 0x01 #define DRM_XE_GEM_MMAP_OFFSET 0x02 #define DRM_XE_VM_CREATE 0x03 #define DRM_XE_VM_DESTROY 0x04 #define DRM_XE_VM_BIND 0x05 #define DRM_XE_EXEC_QUEUE_CREATE 0x06 #define DRM_XE_EXEC_QUEUE_DESTROY 0x07 #define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x08 #define DRM_XE_EXEC 0x09 #define DRM_XE_WAIT_USER_FENCE 0x0a #define DRM_XE_OBSERVATION 0x0b /* Must be kept compact -- no holes */ #define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query) #define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create) #define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset) #define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create) #define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy) #define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind) #define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create) #define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy) #define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property) #define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec) #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence) #define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param) /** * DOC: Xe IOCTL Extensions * * Before detailing the IOCTLs and its structs, it is important to highlight * that every IOCTL in Xe is extensible. * * Many interfaces need to grow over time. In most cases we can simply * extend the struct and have userspace pass in more data. Another option, * as demonstrated by Vulkan's approach to providing extensions for forward * and backward compatibility, is to use a list of optional structs to * provide those extra details. * * The key advantage to using an extension chain is that it allows us to * redefine the interface more easily than an ever growing struct of * increasing complexity, and for large parts of that interface to be * entirely optional. The downside is more pointer chasing; chasing across * the __user boundary with pointers encapsulated inside u64. * * Example chaining: * * .. code-block:: C * * struct drm_xe_user_extension ext3 { * .next_extension = 0, // end * .name = ..., * }; * struct drm_xe_user_extension ext2 { * .next_extension = (uintptr_t)&ext3, * .name = ..., * }; * struct drm_xe_user_extension ext1 { * .next_extension = (uintptr_t)&ext2, * .name = ..., * }; * * Typically the struct drm_xe_user_extension would be embedded in some uAPI * struct, and in this case we would feed it the head of the chain(i.e ext1), * which would then apply all of the above extensions. */ /** * struct drm_xe_user_extension - Base class for defining a chain of extensions */ struct drm_xe_user_extension { /** * @next_extension: * * Pointer to the next struct drm_xe_user_extension, or zero if the end. */ __u64 next_extension; /** * @name: Name of the extension. * * Note that the name here is just some integer. * * Also note that the name space for this is not global for the whole * driver, but rather its scope/meaning is limited to the specific piece * of uAPI which has embedded the struct drm_xe_user_extension. */ __u32 name; /** * @pad: MBZ * * All undefined bits must be zero. */ __u32 pad; }; /** * struct drm_xe_ext_set_property - Generic set property extension * * A generic struct that allows any of the Xe's IOCTL to be extended * with a set_property operation. */ struct drm_xe_ext_set_property { /** @base: base user extension */ struct drm_xe_user_extension base; /** @property: property to set */ __u32 property; /** @pad: MBZ */ __u32 pad; /** @value: property value */ __u64 value; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_engine_class_instance - instance of an engine class * * It is returned as part of the @drm_xe_engine, but it also is used as * the input of engine selection for both @drm_xe_exec_queue_create and * @drm_xe_query_engine_cycles * * The @engine_class can be: * - %DRM_XE_ENGINE_CLASS_RENDER * - %DRM_XE_ENGINE_CLASS_COPY * - %DRM_XE_ENGINE_CLASS_VIDEO_DECODE * - %DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE * - %DRM_XE_ENGINE_CLASS_COMPUTE * - %DRM_XE_ENGINE_CLASS_VM_BIND - Kernel only classes (not actual * hardware engine class). Used for creating ordered queues of VM * bind operations. */ struct drm_xe_engine_class_instance { #define DRM_XE_ENGINE_CLASS_RENDER 0 #define DRM_XE_ENGINE_CLASS_COPY 1 #define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2 #define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3 #define DRM_XE_ENGINE_CLASS_COMPUTE 4 #define DRM_XE_ENGINE_CLASS_VM_BIND 5 /** @engine_class: engine class id */ __u16 engine_class; /** @engine_instance: engine instance id */ __u16 engine_instance; /** @gt_id: Unique ID of this GT within the PCI Device */ __u16 gt_id; /** @pad: MBZ */ __u16 pad; }; /** * struct drm_xe_engine - describe hardware engine */ struct drm_xe_engine { /** @instance: The @drm_xe_engine_class_instance */ struct drm_xe_engine_class_instance instance; /** @reserved: Reserved */ __u64 reserved[3]; }; /** * struct drm_xe_query_engines - describe engines * * If a query is made with a struct @drm_xe_device_query where .query * is equal to %DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of * struct @drm_xe_query_engines in .data. */ struct drm_xe_query_engines { /** @num_engines: number of engines returned in @engines */ __u32 num_engines; /** @pad: MBZ */ __u32 pad; /** @engines: The returned engines for this device */ struct drm_xe_engine engines[]; }; /** * enum drm_xe_memory_class - Supported memory classes. */ enum drm_xe_memory_class { /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */ DRM_XE_MEM_REGION_CLASS_SYSMEM = 0, /** * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this * represents the memory that is local to the device, which we * call VRAM. Not valid on integrated platforms. */ DRM_XE_MEM_REGION_CLASS_VRAM }; /** * struct drm_xe_mem_region - Describes some region as known to * the driver. */ struct drm_xe_mem_region { /** * @mem_class: The memory class describing this region. * * See enum drm_xe_memory_class for supported values. */ __u16 mem_class; /** * @instance: The unique ID for this region, which serves as the * index in the placement bitmask used as argument for * &DRM_IOCTL_XE_GEM_CREATE */ __u16 instance; /** * @min_page_size: Min page-size in bytes for this region. * * When the kernel allocates memory for this region, the * underlying pages will be at least @min_page_size in size. * Buffer objects with an allowable placement in this region must be * created with a size aligned to this value. * GPU virtual address mappings of (parts of) buffer objects that * may be placed in this region must also have their GPU virtual * address and range aligned to this value. * Affected IOCTLS will return %-EINVAL if alignment restrictions are * not met. */ __u32 min_page_size; /** * @total_size: The usable size in bytes for this region. */ __u64 total_size; /** * @used: Estimate of the memory used in bytes for this region. * * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable * accounting. Without this the value here will always equal * zero. */ __u64 used; /** * @cpu_visible_size: How much of this region can be CPU * accessed, in bytes. * * This will always be <= @total_size, and the remainder (if * any) will not be CPU accessible. If the CPU accessible part * is smaller than @total_size then this is referred to as a * small BAR system. * * On systems without small BAR (full BAR), the probed_size will * always equal the @total_size, since all of it will be CPU * accessible. * * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM * regions (for other types the value here will always equal * zero). */ __u64 cpu_visible_size; /** * @cpu_visible_used: Estimate of CPU visible memory used, in * bytes. * * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable * accounting. Without this the value here will always equal * zero. Note this is only currently tracked for * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value * here will always be zero). */ __u64 cpu_visible_used; /** @reserved: Reserved */ __u64 reserved[6]; }; /** * struct drm_xe_query_mem_regions - describe memory regions * * If a query is made with a struct drm_xe_device_query where .query * is equal to DRM_XE_DEVICE_QUERY_MEM_REGIONS, then the reply uses * struct drm_xe_query_mem_regions in .data. */ struct drm_xe_query_mem_regions { /** @num_mem_regions: number of memory regions returned in @mem_regions */ __u32 num_mem_regions; /** @pad: MBZ */ __u32 pad; /** @mem_regions: The returned memory regions for this device */ struct drm_xe_mem_region mem_regions[]; }; /** * struct drm_xe_query_config - describe the device configuration * * If a query is made with a struct drm_xe_device_query where .query * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses * struct drm_xe_query_config in .data. * * The index in @info can be: * - %DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID - Device ID (lower 16 bits) * and the device revision (next 8 bits) * - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device * configuration, see list below * * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device * has usable VRAM * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment * required by this device, typically SZ_4K or SZ_64K * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest * available exec queue priority */ struct drm_xe_query_config { /** @num_params: number of parameters returned in info */ __u32 num_params; /** @pad: MBZ */ __u32 pad; #define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0 #define DRM_XE_QUERY_CONFIG_FLAGS 1 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0) #define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2 #define DRM_XE_QUERY_CONFIG_VA_BITS 3 #define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4 /** @info: array of elements containing the config info */ __u64 info[]; }; /** * struct drm_xe_gt - describe an individual GT. * * To be used with drm_xe_query_gt_list, which will return a list with all the * existing GT individual descriptions. * Graphics Technology (GT) is a subset of a GPU/tile that is responsible for * implementing graphics and/or media operations. * * The index in @type can be: * - %DRM_XE_QUERY_GT_TYPE_MAIN * - %DRM_XE_QUERY_GT_TYPE_MEDIA */ struct drm_xe_gt { #define DRM_XE_QUERY_GT_TYPE_MAIN 0 #define DRM_XE_QUERY_GT_TYPE_MEDIA 1 /** @type: GT type: Main or Media */ __u16 type; /** @tile_id: Tile ID where this GT lives (Information only) */ __u16 tile_id; /** @gt_id: Unique ID of this GT within the PCI Device */ __u16 gt_id; /** @pad: MBZ */ __u16 pad[3]; /** @reference_clock: A clock frequency for timestamp */ __u32 reference_clock; /** * @near_mem_regions: Bit mask of instances from * drm_xe_query_mem_regions that are nearest to the current engines * of this GT. * Each index in this mask refers directly to the struct * drm_xe_query_mem_regions' instance, no assumptions should * be made about order. The type of each region is described * by struct drm_xe_query_mem_regions' mem_class. */ __u64 near_mem_regions; /** * @far_mem_regions: Bit mask of instances from * drm_xe_query_mem_regions that are far from the engines of this GT. * In general, they have extra indirections when compared to the * @near_mem_regions. For a discrete device this could mean system * memory and memory living in a different tile. * Each index in this mask refers directly to the struct * drm_xe_query_mem_regions' instance, no assumptions should * be made about order. The type of each region is described * by struct drm_xe_query_mem_regions' mem_class. */ __u64 far_mem_regions; /** @ip_ver_major: Graphics/media IP major version on GMD_ID platforms */ __u16 ip_ver_major; /** @ip_ver_minor: Graphics/media IP minor version on GMD_ID platforms */ __u16 ip_ver_minor; /** @ip_ver_rev: Graphics/media IP revision version on GMD_ID platforms */ __u16 ip_ver_rev; /** @pad2: MBZ */ __u16 pad2; /** @reserved: Reserved */ __u64 reserved[7]; }; /** * struct drm_xe_query_gt_list - A list with GT description items. * * If a query is made with a struct drm_xe_device_query where .query * is equal to DRM_XE_DEVICE_QUERY_GT_LIST, then the reply uses struct * drm_xe_query_gt_list in .data. */ struct drm_xe_query_gt_list { /** @num_gt: number of GT items returned in gt_list */ __u32 num_gt; /** @pad: MBZ */ __u32 pad; /** @gt_list: The GT list returned for this device */ struct drm_xe_gt gt_list[]; }; /** * struct drm_xe_query_topology_mask - describe the topology mask of a GT * * This is the hardware topology which reflects the internal physical * structure of the GPU. * * If a query is made with a struct drm_xe_device_query where .query * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses * struct drm_xe_query_topology_mask in .data. * * The @type can be: * - %DRM_XE_TOPO_DSS_GEOMETRY - To query the mask of Dual Sub Slices * (DSS) available for geometry operations. For example a query response * containing the following in mask: * ``DSS_GEOMETRY ff ff ff ff 00 00 00 00`` * means 32 DSS are available for geometry. * - %DRM_XE_TOPO_DSS_COMPUTE - To query the mask of Dual Sub Slices * (DSS) available for compute operations. For example a query response * containing the following in mask: * ``DSS_COMPUTE ff ff ff ff 00 00 00 00`` * means 32 DSS are available for compute. * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU) * available per Dual Sub Slices (DSS). For example a query response * containing the following in mask: * ``EU_PER_DSS ff ff 00 00 00 00 00 00`` * means each DSS has 16 SIMD8 EUs. This type may be omitted if device * doesn't have SIMD8 EUs. * - %DRM_XE_TOPO_SIMD16_EU_PER_DSS - To query the mask of SIMD16 Execution * Units (EU) available per Dual Sub Slices (DSS). For example a query * response containing the following in mask: * ``SIMD16_EU_PER_DSS ff ff 00 00 00 00 00 00`` * means each DSS has 16 SIMD16 EUs. This type may be omitted if device * doesn't have SIMD16 EUs. */ struct drm_xe_query_topology_mask { /** @gt_id: GT ID the mask is associated with */ __u16 gt_id; #define DRM_XE_TOPO_DSS_GEOMETRY 1 #define DRM_XE_TOPO_DSS_COMPUTE 2 #define DRM_XE_TOPO_L3_BANK 3 #define DRM_XE_TOPO_EU_PER_DSS 4 #define DRM_XE_TOPO_SIMD16_EU_PER_DSS 5 /** @type: type of mask */ __u16 type; /** @num_bytes: number of bytes in requested mask */ __u32 num_bytes; /** @mask: little-endian mask of @num_bytes */ __u8 mask[]; }; /** * struct drm_xe_query_engine_cycles - correlate CPU and GPU timestamps * * If a query is made with a struct drm_xe_device_query where .query is equal to * DRM_XE_DEVICE_QUERY_ENGINE_CYCLES, then the reply uses struct drm_xe_query_engine_cycles * in .data. struct drm_xe_query_engine_cycles is allocated by the user and * .data points to this allocated structure. * * The query returns the engine cycles, which along with GT's @reference_clock, * can be used to calculate the engine timestamp. In addition the * query returns a set of cpu timestamps that indicate when the command * streamer cycle count was captured. */ struct drm_xe_query_engine_cycles { /** * @eci: This is input by the user and is the engine for which command * streamer cycles is queried. */ struct drm_xe_engine_class_instance eci; /** * @clockid: This is input by the user and is the reference clock id for * CPU timestamp. For definition, see clock_gettime(2) and * perf_event_open(2). Supported clock ids are CLOCK_MONOTONIC, * CLOCK_MONOTONIC_RAW, CLOCK_REALTIME, CLOCK_BOOTTIME, CLOCK_TAI. */ __s32 clockid; /** @width: Width of the engine cycle counter in bits. */ __u32 width; /** * @engine_cycles: Engine cycles as read from its register * at 0x358 offset. */ __u64 engine_cycles; /** * @cpu_timestamp: CPU timestamp in ns. The timestamp is captured before * reading the engine_cycles register using the reference clockid set by the * user. */ __u64 cpu_timestamp; /** * @cpu_delta: Time delta in ns captured around reading the lower dword * of the engine_cycles register. */ __u64 cpu_delta; }; /** * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version * * Given a uc_type this will return the branch, major, minor and patch version * of the micro-controller firmware. */ struct drm_xe_query_uc_fw_version { /** @uc_type: The micro-controller type to query firmware version */ #define XE_QUERY_UC_TYPE_GUC_SUBMISSION 0 #define XE_QUERY_UC_TYPE_HUC 1 __u16 uc_type; /** @pad: MBZ */ __u16 pad; /** @branch_ver: branch uc fw version */ __u32 branch_ver; /** @major_ver: major uc fw version */ __u32 major_ver; /** @minor_ver: minor uc fw version */ __u32 minor_ver; /** @patch_ver: patch uc fw version */ __u32 patch_ver; /** @pad2: MBZ */ __u32 pad2; /** @reserved: Reserved */ __u64 reserved; }; /** * struct drm_xe_device_query - Input of &DRM_IOCTL_XE_DEVICE_QUERY - main * structure to query device information * * The user selects the type of data to query among DRM_XE_DEVICE_QUERY_* * and sets the value in the query member. This determines the type of * the structure provided by the driver in data, among struct drm_xe_query_*. * * The @query can be: * - %DRM_XE_DEVICE_QUERY_ENGINES * - %DRM_XE_DEVICE_QUERY_MEM_REGIONS * - %DRM_XE_DEVICE_QUERY_CONFIG * - %DRM_XE_DEVICE_QUERY_GT_LIST * - %DRM_XE_DEVICE_QUERY_HWCONFIG - Query type to retrieve the hardware * configuration of the device such as information on slices, memory, * caches, and so on. It is provided as a table of key / value * attributes. * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES * * If size is set to 0, the driver fills it with the required size for * the requested type of data to query. If size is equal to the required * size, the queried information is copied into data. If size is set to * a value different from 0 and different from the required size, the * IOCTL call returns -EINVAL. * * For example the following code snippet allows retrieving and printing * information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES: * * .. code-block:: C * * struct drm_xe_query_engines *engines; * struct drm_xe_device_query query = { * .extensions = 0, * .query = DRM_XE_DEVICE_QUERY_ENGINES, * .size = 0, * .data = 0, * }; * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query); * engines = malloc(query.size); * query.data = (uintptr_t)engines; * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query); * for (int i = 0; i < engines->num_engines; i++) { * printf("Engine %d: %s\n", i, * engines->engines[i].instance.engine_class == * DRM_XE_ENGINE_CLASS_RENDER ? "RENDER": * engines->engines[i].instance.engine_class == * DRM_XE_ENGINE_CLASS_COPY ? "COPY": * engines->engines[i].instance.engine_class == * DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE": * engines->engines[i].instance.engine_class == * DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE": * engines->engines[i].instance.engine_class == * DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE": * "UNKNOWN"); * } * free(engines); */ struct drm_xe_device_query { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; #define DRM_XE_DEVICE_QUERY_ENGINES 0 #define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1 #define DRM_XE_DEVICE_QUERY_CONFIG 2 #define DRM_XE_DEVICE_QUERY_GT_LIST 3 #define DRM_XE_DEVICE_QUERY_HWCONFIG 4 #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5 #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6 #define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7 #define DRM_XE_DEVICE_QUERY_OA_UNITS 8 /** @query: The type of data to query */ __u32 query; /** @size: Size of the queried data */ __u32 size; /** @data: Queried data is placed here */ __u64 data; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_gem_create - Input of &DRM_IOCTL_XE_GEM_CREATE - A structure for * gem creation * * The @flags can be: * - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING * - %DRM_XE_GEM_CREATE_FLAG_SCANOUT * - %DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM - When using VRAM as a * possible placement, ensure that the corresponding VRAM allocation * will always use the CPU accessible part of VRAM. This is important * for small-bar systems (on full-bar systems this gets turned into a * noop). * Note1: System memory can be used as an extra placement if the kernel * should spill the allocation to system memory, if space can't be made * available in the CPU accessible part of VRAM (giving the same * behaviour as the i915 interface, see * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS). * Note2: For clear-color CCS surfaces the kernel needs to read the * clear-color value stored in the buffer, and on discrete platforms we * need to use VRAM for display surfaces, therefore the kernel requires * setting this flag for such objects, otherwise an error is thrown on * small-bar systems. * * @cpu_caching supports the following values: * - %DRM_XE_GEM_CPU_CACHING_WB - Allocate the pages with write-back * caching. On iGPU this can't be used for scanout surfaces. Currently * not allowed for objects placed in VRAM. * - %DRM_XE_GEM_CPU_CACHING_WC - Allocate the pages as write-combined. This * is uncached. Scanout surfaces should likely use this. All objects * that can be placed in VRAM must use this. */ struct drm_xe_gem_create { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** * @size: Size of the object to be created, must match region * (system or vram) minimum alignment (&min_page_size). */ __u64 size; /** * @placement: A mask of memory instances of where BO can be placed. * Each index in this mask refers directly to the struct * drm_xe_query_mem_regions' instance, no assumptions should * be made about order. The type of each region is described * by struct drm_xe_query_mem_regions' mem_class. */ __u32 placement; #define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0) #define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1) #define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2) /** * @flags: Flags, currently a mask of memory instances of where BO can * be placed */ __u32 flags; /** * @vm_id: Attached VM, if any * * If a VM is specified, this BO must: * * 1. Only ever be bound to that VM. * 2. Cannot be exported as a PRIME fd. */ __u32 vm_id; /** * @handle: Returned handle for the object. * * Object handles are nonzero. */ __u32 handle; #define DRM_XE_GEM_CPU_CACHING_WB 1 #define DRM_XE_GEM_CPU_CACHING_WC 2 /** * @cpu_caching: The CPU caching mode to select for this object. If * mmaping the object the mode selected here will also be used. The * exception is when mapping system memory (including data evicted * to system) on discrete GPUs. The caching mode selected will * then be overridden to DRM_XE_GEM_CPU_CACHING_WB, and coherency * between GPU- and CPU is guaranteed. The caching mode of * existing CPU-mappings will be updated transparently to * user-space clients. */ __u16 cpu_caching; /** @pad: MBZ */ __u16 pad[3]; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_gem_mmap_offset - Input of &DRM_IOCTL_XE_GEM_MMAP_OFFSET */ struct drm_xe_gem_mmap_offset { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @handle: Handle for the object being mapped. */ __u32 handle; /** @flags: Must be zero */ __u32 flags; /** @offset: The fake offset to use for subsequent mmap call */ __u64 offset; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_vm_create - Input of &DRM_IOCTL_XE_VM_CREATE * * The @flags can be: * - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE * - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts * exec submissions to its exec_queues that don't have an upper time * limit on the job execution time. But exec submissions to these * don't allow any of the flags DRM_XE_SYNC_FLAG_SYNCOBJ, * DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ, DRM_XE_SYNC_FLAG_DMA_BUF, * used as out-syncobjs, that is, together with DRM_XE_SYNC_FLAG_SIGNAL. * LR VMs can be created in recoverable page-fault mode using * DRM_XE_VM_CREATE_FLAG_FAULT_MODE, if the device supports it. * If that flag is omitted, the UMD can not rely on the slightly * different per-VM overcommit semantics that are enabled by * DRM_XE_VM_CREATE_FLAG_FAULT_MODE (see below), but KMD may * still enable recoverable pagefaults if supported by the device. * - %DRM_XE_VM_CREATE_FLAG_FAULT_MODE - Requires also * DRM_XE_VM_CREATE_FLAG_LR_MODE. It allows memory to be allocated on * demand when accessed, and also allows per-VM overcommit of memory. * The xe driver internally uses recoverable pagefaults to implement * this. */ struct drm_xe_vm_create { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; #define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (1 << 0) #define DRM_XE_VM_CREATE_FLAG_LR_MODE (1 << 1) #define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (1 << 2) /** @flags: Flags */ __u32 flags; /** @vm_id: Returned VM ID */ __u32 vm_id; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_vm_destroy - Input of &DRM_IOCTL_XE_VM_DESTROY */ struct drm_xe_vm_destroy { /** @vm_id: VM ID */ __u32 vm_id; /** @pad: MBZ */ __u32 pad; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_vm_bind_op - run bind operations * * The @op can be: * - %DRM_XE_VM_BIND_OP_MAP * - %DRM_XE_VM_BIND_OP_UNMAP * - %DRM_XE_VM_BIND_OP_MAP_USERPTR * - %DRM_XE_VM_BIND_OP_UNMAP_ALL * - %DRM_XE_VM_BIND_OP_PREFETCH * * and the @flags can be: * - %DRM_XE_VM_BIND_FLAG_READONLY - Setup the page tables as read-only * to ensure write protection * - %DRM_XE_VM_BIND_FLAG_IMMEDIATE - On a faulting VM, do the * MAP operation immediately rather than deferring the MAP to the page * fault handler. This is implied on a non-faulting VM as there is no * fault handler to defer to. * - %DRM_XE_VM_BIND_FLAG_NULL - When the NULL flag is set, the page * tables are setup with a special bit which indicates writes are * dropped and all reads return zero. In the future, the NULL flags * will only be valid for DRM_XE_VM_BIND_OP_MAP operations, the BO * handle MBZ, and the BO offset MBZ. This flag is intended to * implement VK sparse bindings. */ struct drm_xe_vm_bind_op { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP */ __u32 obj; /** * @pat_index: The platform defined @pat_index to use for this mapping. * The index basically maps to some predefined memory attributes, * including things like caching, coherency, compression etc. The exact * meaning of the pat_index is platform specific and defined in the * Bspec and PRMs. When the KMD sets up the binding the index here is * encoded into the ppGTT PTE. * * For coherency the @pat_index needs to be at least 1way coherent when * drm_xe_gem_create.cpu_caching is DRM_XE_GEM_CPU_CACHING_WB. The KMD * will extract the coherency mode from the @pat_index and reject if * there is a mismatch (see note below for pre-MTL platforms). * * Note: On pre-MTL platforms there is only a caching mode and no * explicit coherency mode, but on such hardware there is always a * shared-LLC (or is dgpu) so all GT memory accesses are coherent with * CPU caches even with the caching mode set as uncached. It's only the * display engine that is incoherent (on dgpu it must be in VRAM which * is always mapped as WC on the CPU). However to keep the uapi somewhat * consistent with newer platforms the KMD groups the different cache * levels into the following coherency buckets on all pre-MTL platforms: * * ppGTT UC -> COH_NONE * ppGTT WC -> COH_NONE * ppGTT WT -> COH_NONE * ppGTT WB -> COH_AT_LEAST_1WAY * * In practice UC/WC/WT should only ever used for scanout surfaces on * such platforms (or perhaps in general for dma-buf if shared with * another device) since it is only the display engine that is actually * incoherent. Everything else should typically use WB given that we * have a shared-LLC. On MTL+ this completely changes and the HW * defines the coherency mode as part of the @pat_index, where * incoherent GT access is possible. * * Note: For userptr and externally imported dma-buf the kernel expects * either 1WAY or 2WAY for the @pat_index. * * For DRM_XE_VM_BIND_FLAG_NULL bindings there are no KMD restrictions * on the @pat_index. For such mappings there is no actual memory being * mapped (the address in the PTE is invalid), so the various PAT memory * attributes likely do not apply. Simply leaving as zero is one * option (still a valid pat_index). */ __u16 pat_index; /** @pad: MBZ */ __u16 pad; union { /** * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE, * ignored for unbind */ __u64 obj_offset; /** @userptr: user pointer to bind on */ __u64 userptr; }; /** * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL */ __u64 range; /** @addr: Address to operate on, MBZ for UNMAP_ALL */ __u64 addr; #define DRM_XE_VM_BIND_OP_MAP 0x0 #define DRM_XE_VM_BIND_OP_UNMAP 0x1 #define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2 #define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3 #define DRM_XE_VM_BIND_OP_PREFETCH 0x4 /** @op: Bind operation to perform */ __u32 op; #define DRM_XE_VM_BIND_FLAG_READONLY (1 << 0) #define DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 1) #define DRM_XE_VM_BIND_FLAG_NULL (1 << 2) #define DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3) /** @flags: Bind flags */ __u32 flags; /** * @prefetch_mem_region_instance: Memory region to prefetch VMA to. * It is a region instance, not a mask. * To be used only with %DRM_XE_VM_BIND_OP_PREFETCH operation. */ __u32 prefetch_mem_region_instance; /** @pad2: MBZ */ __u32 pad2; /** @reserved: Reserved */ __u64 reserved[3]; }; /** * struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND * * Below is an example of a minimal use of @drm_xe_vm_bind to * asynchronously bind the buffer `data` at address `BIND_ADDRESS` to * illustrate `userptr`. It can be synchronized by using the example * provided for @drm_xe_sync. * * .. code-block:: C * * data = aligned_alloc(ALIGNMENT, BO_SIZE); * struct drm_xe_vm_bind bind = { * .vm_id = vm, * .num_binds = 1, * .bind.obj = 0, * .bind.obj_offset = to_user_pointer(data), * .bind.range = BO_SIZE, * .bind.addr = BIND_ADDRESS, * .bind.op = DRM_XE_VM_BIND_OP_MAP_USERPTR, * .bind.flags = 0, * .num_syncs = 1, * .syncs = &sync, * .exec_queue_id = 0, * }; * ioctl(fd, DRM_IOCTL_XE_VM_BIND, &bind); * */ struct drm_xe_vm_bind { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @vm_id: The ID of the VM to bind to */ __u32 vm_id; /** * @exec_queue_id: exec_queue_id, must be of class DRM_XE_ENGINE_CLASS_VM_BIND * and exec queue must have same vm_id. If zero, the default VM bind engine * is used. */ __u32 exec_queue_id; /** @pad: MBZ */ __u32 pad; /** @num_binds: number of binds in this IOCTL */ __u32 num_binds; union { /** @bind: used if num_binds == 1 */ struct drm_xe_vm_bind_op bind; /** * @vector_of_binds: userptr to array of struct * drm_xe_vm_bind_op if num_binds > 1 */ __u64 vector_of_binds; }; /** @pad2: MBZ */ __u32 pad2; /** @num_syncs: amount of syncs to wait on */ __u32 num_syncs; /** @syncs: pointer to struct drm_xe_sync array */ __u64 syncs; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE * * The example below shows how to use @drm_xe_exec_queue_create to create * a simple exec_queue (no parallel submission) of class * &DRM_XE_ENGINE_CLASS_RENDER. * * .. code-block:: C * * struct drm_xe_engine_class_instance instance = { * .engine_class = DRM_XE_ENGINE_CLASS_RENDER, * }; * struct drm_xe_exec_queue_create exec_queue_create = { * .extensions = 0, * .vm_id = vm, * .num_bb_per_exec = 1, * .num_eng_per_bb = 1, * .instances = to_user_pointer(&instance), * }; * ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create); * */ struct drm_xe_exec_queue_create { #define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0 #define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0 #define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1 /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @width: submission width (number BB per exec) for this exec queue */ __u16 width; /** @num_placements: number of valid placements for this exec queue */ __u16 num_placements; /** @vm_id: VM to use for this exec queue */ __u32 vm_id; /** @flags: MBZ */ __u32 flags; /** @exec_queue_id: Returned exec queue ID */ __u32 exec_queue_id; /** * @instances: user pointer to a 2-d array of struct * drm_xe_engine_class_instance * * length = width (i) * num_placements (j) * index = j + i * width */ __u64 instances; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_exec_queue_destroy - Input of &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY */ struct drm_xe_exec_queue_destroy { /** @exec_queue_id: Exec queue ID */ __u32 exec_queue_id; /** @pad: MBZ */ __u32 pad; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_exec_queue_get_property - Input of &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY * * The @property can be: * - %DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN */ struct drm_xe_exec_queue_get_property { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @exec_queue_id: Exec queue ID */ __u32 exec_queue_id; #define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0 /** @property: property to get */ __u32 property; /** @value: property value */ __u64 value; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_sync - sync object * * The @type can be: * - %DRM_XE_SYNC_TYPE_SYNCOBJ * - %DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ * - %DRM_XE_SYNC_TYPE_USER_FENCE * * and the @flags can be: * - %DRM_XE_SYNC_FLAG_SIGNAL * * A minimal use of @drm_xe_sync looks like this: * * .. code-block:: C * * struct drm_xe_sync sync = { * .flags = DRM_XE_SYNC_FLAG_SIGNAL, * .type = DRM_XE_SYNC_TYPE_SYNCOBJ, * }; * struct drm_syncobj_create syncobj_create = { 0 }; * ioctl(fd, DRM_IOCTL_SYNCOBJ_CREATE, &syncobj_create); * sync.handle = syncobj_create.handle; * ... * use of &sync in drm_xe_exec or drm_xe_vm_bind * ... * struct drm_syncobj_wait wait = { * .handles = &sync.handle, * .timeout_nsec = INT64_MAX, * .count_handles = 1, * .flags = 0, * .first_signaled = 0, * .pad = 0, * }; * ioctl(fd, DRM_IOCTL_SYNCOBJ_WAIT, &wait); */ struct drm_xe_sync { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; #define DRM_XE_SYNC_TYPE_SYNCOBJ 0x0 #define DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ 0x1 #define DRM_XE_SYNC_TYPE_USER_FENCE 0x2 /** @type: Type of the this sync object */ __u32 type; #define DRM_XE_SYNC_FLAG_SIGNAL (1 << 0) /** @flags: Sync Flags */ __u32 flags; union { /** @handle: Handle for the object */ __u32 handle; /** * @addr: Address of user fence. When sync is passed in via exec * IOCTL this is a GPU address in the VM. When sync passed in via * VM bind IOCTL this is a user pointer. In either case, it is * the users responsibility that this address is present and * mapped when the user fence is signalled. Must be qword * aligned. */ __u64 addr; }; /** * @timeline_value: Input for the timeline sync object. Needs to be * different than 0 when used with %DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ. */ __u64 timeline_value; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC * * This is an example to use @drm_xe_exec for execution of the object * at BIND_ADDRESS (see example in @drm_xe_vm_bind) by an exec_queue * (see example in @drm_xe_exec_queue_create). It can be synchronized * by using the example provided for @drm_xe_sync. * * .. code-block:: C * * struct drm_xe_exec exec = { * .exec_queue_id = exec_queue, * .syncs = &sync, * .num_syncs = 1, * .address = BIND_ADDRESS, * .num_batch_buffer = 1, * }; * ioctl(fd, DRM_IOCTL_XE_EXEC, &exec); * */ struct drm_xe_exec { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @exec_queue_id: Exec queue ID for the batch buffer */ __u32 exec_queue_id; /** @num_syncs: Amount of struct drm_xe_sync in array. */ __u32 num_syncs; /** @syncs: Pointer to struct drm_xe_sync array. */ __u64 syncs; /** * @address: address of batch buffer if num_batch_buffer == 1 or an * array of batch buffer addresses */ __u64 address; /** * @num_batch_buffer: number of batch buffer in this exec, must match * the width of the engine */ __u16 num_batch_buffer; /** @pad: MBZ */ __u16 pad[3]; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * struct drm_xe_wait_user_fence - Input of &DRM_IOCTL_XE_WAIT_USER_FENCE * * Wait on user fence, XE will wake-up on every HW engine interrupt in the * instances list and check if user fence is complete:: * * (*addr & MASK) OP (VALUE & MASK) * * Returns to user on user fence completion or timeout. * * The @op can be: * - %DRM_XE_UFENCE_WAIT_OP_EQ * - %DRM_XE_UFENCE_WAIT_OP_NEQ * - %DRM_XE_UFENCE_WAIT_OP_GT * - %DRM_XE_UFENCE_WAIT_OP_GTE * - %DRM_XE_UFENCE_WAIT_OP_LT * - %DRM_XE_UFENCE_WAIT_OP_LTE * * and the @flags can be: * - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME * - %DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP * * The @mask values can be for example: * - 0xffu for u8 * - 0xffffu for u16 * - 0xffffffffu for u32 * - 0xffffffffffffffffu for u64 */ struct drm_xe_wait_user_fence { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** * @addr: user pointer address to wait on, must qword aligned */ __u64 addr; #define DRM_XE_UFENCE_WAIT_OP_EQ 0x0 #define DRM_XE_UFENCE_WAIT_OP_NEQ 0x1 #define DRM_XE_UFENCE_WAIT_OP_GT 0x2 #define DRM_XE_UFENCE_WAIT_OP_GTE 0x3 #define DRM_XE_UFENCE_WAIT_OP_LT 0x4 #define DRM_XE_UFENCE_WAIT_OP_LTE 0x5 /** @op: wait operation (type of comparison) */ __u16 op; #define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0) /** @flags: wait flags */ __u16 flags; /** @pad: MBZ */ __u32 pad; /** @value: compare value */ __u64 value; /** @mask: comparison mask */ __u64 mask; /** * @timeout: how long to wait before bailing, value in nanoseconds. * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout) * it contains timeout expressed in nanoseconds to wait (fence will * expire at now() + timeout). * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait * will end at timeout (uses system MONOTONIC_CLOCK). * Passing negative timeout leads to neverending wait. * * On relative timeout this value is updated with timeout left * (for restarting the call in case of signal delivery). * On absolute timeout this value stays intact (restarted call still * expire at the same point of time). */ __s64 timeout; /** @exec_queue_id: exec_queue_id returned from xe_exec_queue_create_ioctl */ __u32 exec_queue_id; /** @pad2: MBZ */ __u32 pad2; /** @reserved: Reserved */ __u64 reserved[2]; }; /** * enum drm_xe_observation_type - Observation stream types */ enum drm_xe_observation_type { /** @DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type */ DRM_XE_OBSERVATION_TYPE_OA, }; /** * enum drm_xe_observation_op - Observation stream ops */ enum drm_xe_observation_op { /** @DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream */ DRM_XE_OBSERVATION_OP_STREAM_OPEN, /** @DRM_XE_OBSERVATION_OP_ADD_CONFIG: Add observation stream config */ DRM_XE_OBSERVATION_OP_ADD_CONFIG, /** @DRM_XE_OBSERVATION_OP_REMOVE_CONFIG: Remove observation stream config */ DRM_XE_OBSERVATION_OP_REMOVE_CONFIG, }; /** * struct drm_xe_observation_param - Input of &DRM_XE_OBSERVATION * * The observation layer enables multiplexing observation streams of * multiple types. The actual params for a particular stream operation are * supplied via the @param pointer (use __copy_from_user to get these * params). */ struct drm_xe_observation_param { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @observation_type: observation stream type, of enum @drm_xe_observation_type */ __u64 observation_type; /** @observation_op: observation stream op, of enum @drm_xe_observation_op */ __u64 observation_op; /** @param: Pointer to actual stream params */ __u64 param; }; /** * enum drm_xe_observation_ioctls - Observation stream fd ioctl's * * Information exchanged between userspace and kernel for observation fd * ioctl's is stream type specific */ enum drm_xe_observation_ioctls { /** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */ DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x0), /** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for a observation stream */ DRM_XE_OBSERVATION_IOCTL_DISABLE = _IO('i', 0x1), /** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */ DRM_XE_OBSERVATION_IOCTL_CONFIG = _IO('i', 0x2), /** @DRM_XE_OBSERVATION_IOCTL_STATUS: Return observation stream status */ DRM_XE_OBSERVATION_IOCTL_STATUS = _IO('i', 0x3), /** @DRM_XE_OBSERVATION_IOCTL_INFO: Return observation stream info */ DRM_XE_OBSERVATION_IOCTL_INFO = _IO('i', 0x4), }; /** * enum drm_xe_oa_unit_type - OA unit types */ enum drm_xe_oa_unit_type { /** * @DRM_XE_OA_UNIT_TYPE_OAG: OAG OA unit. OAR/OAC are considered * sub-types of OAG. For OAR/OAC, use OAG. */ DRM_XE_OA_UNIT_TYPE_OAG, /** @DRM_XE_OA_UNIT_TYPE_OAM: OAM OA unit */ DRM_XE_OA_UNIT_TYPE_OAM, }; /** * struct drm_xe_oa_unit - describe OA unit */ struct drm_xe_oa_unit { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @oa_unit_id: OA unit ID */ __u32 oa_unit_id; /** @oa_unit_type: OA unit type of @drm_xe_oa_unit_type */ __u32 oa_unit_type; /** @capabilities: OA capabilities bit-mask */ __u64 capabilities; #define DRM_XE_OA_CAPS_BASE (1 << 0) /** @oa_timestamp_freq: OA timestamp freq */ __u64 oa_timestamp_freq; /** @reserved: MBZ */ __u64 reserved[4]; /** @num_engines: number of engines in @eci array */ __u64 num_engines; /** @eci: engines attached to this OA unit */ struct drm_xe_engine_class_instance eci[]; }; /** * struct drm_xe_query_oa_units - describe OA units * * If a query is made with a struct drm_xe_device_query where .query * is equal to DRM_XE_DEVICE_QUERY_OA_UNITS, then the reply uses struct * drm_xe_query_oa_units in .data. * * OA unit properties for all OA units can be accessed using a code block * such as the one below: * * .. code-block:: C * * struct drm_xe_query_oa_units *qoa; * struct drm_xe_oa_unit *oau; * u8 *poau; * * // malloc qoa and issue DRM_XE_DEVICE_QUERY_OA_UNITS. Then: * poau = (u8 *)&qoa->oa_units[0]; * for (int i = 0; i < qoa->num_oa_units; i++) { * oau = (struct drm_xe_oa_unit *)poau; * // Access 'struct drm_xe_oa_unit' fields here * poau += sizeof(*oau) + oau->num_engines * sizeof(oau->eci[0]); * } */ struct drm_xe_query_oa_units { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @num_oa_units: number of OA units returned in oau[] */ __u32 num_oa_units; /** @pad: MBZ */ __u32 pad; /** * @oa_units: struct @drm_xe_oa_unit array returned for this device. * Written below as a u64 array to avoid problems with nested flexible * arrays with some compilers */ __u64 oa_units[]; }; /** * enum drm_xe_oa_format_type - OA format types as specified in PRM/Bspec * 52198/60942 */ enum drm_xe_oa_format_type { /** @DRM_XE_OA_FMT_TYPE_OAG: OAG report format */ DRM_XE_OA_FMT_TYPE_OAG, /** @DRM_XE_OA_FMT_TYPE_OAR: OAR report format */ DRM_XE_OA_FMT_TYPE_OAR, /** @DRM_XE_OA_FMT_TYPE_OAM: OAM report format */ DRM_XE_OA_FMT_TYPE_OAM, /** @DRM_XE_OA_FMT_TYPE_OAC: OAC report format */ DRM_XE_OA_FMT_TYPE_OAC, /** @DRM_XE_OA_FMT_TYPE_OAM_MPEC: OAM SAMEDIA or OAM MPEC report format */ DRM_XE_OA_FMT_TYPE_OAM_MPEC, /** @DRM_XE_OA_FMT_TYPE_PEC: PEC report format */ DRM_XE_OA_FMT_TYPE_PEC, }; /** * enum drm_xe_oa_property_id - OA stream property id's * * Stream params are specified as a chain of @drm_xe_ext_set_property * struct's, with @property values from enum @drm_xe_oa_property_id and * @drm_xe_user_extension base.name set to @DRM_XE_OA_EXTENSION_SET_PROPERTY. * @param field in struct @drm_xe_observation_param points to the first * @drm_xe_ext_set_property struct. * * Exactly the same mechanism is also used for stream reconfiguration using the * @DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a * subset of properties below can be specified for stream reconfiguration. */ enum drm_xe_oa_property_id { #define DRM_XE_OA_EXTENSION_SET_PROPERTY 0 /** * @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open * the OA stream, see @oa_unit_id in 'struct * drm_xe_query_oa_units'. Defaults to 0 if not provided. */ DRM_XE_OA_PROPERTY_OA_UNIT_ID = 1, /** * @DRM_XE_OA_PROPERTY_SAMPLE_OA: A value of 1 requests inclusion of raw * OA unit reports or stream samples in a global buffer attached to an * OA unit. */ DRM_XE_OA_PROPERTY_SAMPLE_OA, /** * @DRM_XE_OA_PROPERTY_OA_METRIC_SET: OA metrics defining contents of OA * reports, previously added via @DRM_XE_OBSERVATION_OP_ADD_CONFIG. */ DRM_XE_OA_PROPERTY_OA_METRIC_SET, /** @DRM_XE_OA_PROPERTY_OA_FORMAT: OA counter report format */ DRM_XE_OA_PROPERTY_OA_FORMAT, /* * OA_FORMAT's are specified the same way as in PRM/Bspec 52198/60942, * in terms of the following quantities: a. enum @drm_xe_oa_format_type * b. Counter select c. Counter size and d. BC report. Also refer to the * oa_formats array in drivers/gpu/drm/xe/xe_oa.c. */ #define DRM_XE_OA_FORMAT_MASK_FMT_TYPE (0xffu << 0) #define DRM_XE_OA_FORMAT_MASK_COUNTER_SEL (0xffu << 8) #define DRM_XE_OA_FORMAT_MASK_COUNTER_SIZE (0xffu << 16) #define DRM_XE_OA_FORMAT_MASK_BC_REPORT (0xffu << 24) /** * @DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT: Requests periodic OA unit * sampling with sampling frequency proportional to 2^(period_exponent + 1) */ DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT, /** * @DRM_XE_OA_PROPERTY_OA_DISABLED: A value of 1 will open the OA * stream in a DISABLED state (see @DRM_XE_OBSERVATION_IOCTL_ENABLE). */ DRM_XE_OA_PROPERTY_OA_DISABLED, /** * @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific * @exec_queue_id. OA queries can be executed on this exec queue. */ DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID, /** * @DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE: Optional engine instance to * pass along with @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to 0. */ DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE, /** * @DRM_XE_OA_PROPERTY_NO_PREEMPT: Allow preemption and timeslicing * to be disabled for the stream exec queue. */ DRM_XE_OA_PROPERTY_NO_PREEMPT, }; /** * struct drm_xe_oa_config - OA metric configuration * * Multiple OA configs can be added using @DRM_XE_OBSERVATION_OP_ADD_CONFIG. A * particular config can be specified when opening an OA stream using * @DRM_XE_OA_PROPERTY_OA_METRIC_SET property. */ struct drm_xe_oa_config { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */ char uuid[36]; /** @n_regs: Number of regs in @regs_ptr */ __u32 n_regs; /** * @regs_ptr: Pointer to (register address, value) pairs for OA config * registers. Expected length of buffer is: (2 * sizeof(u32) * @n_regs). */ __u64 regs_ptr; }; /** * struct drm_xe_oa_stream_status - OA stream status returned from * @DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can * call the ioctl to query stream status in response to EIO errno from * observation fd read(). */ struct drm_xe_oa_stream_status { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @oa_status: OA stream status (see Bspec 46717/61226) */ __u64 oa_status; #define DRM_XE_OASTATUS_MMIO_TRG_Q_FULL (1 << 3) #define DRM_XE_OASTATUS_COUNTER_OVERFLOW (1 << 2) #define DRM_XE_OASTATUS_BUFFER_OVERFLOW (1 << 1) #define DRM_XE_OASTATUS_REPORT_LOST (1 << 0) /** @reserved: reserved for future use */ __u64 reserved[3]; }; /** * struct drm_xe_oa_stream_info - OA stream info returned from * @DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl */ struct drm_xe_oa_stream_info { /** @extensions: Pointer to the first extension struct, if any */ __u64 extensions; /** @oa_buf_size: OA buffer size */ __u64 oa_buf_size; /** @reserved: reserved for future use */ __u64 reserved[3]; }; #if defined(__cplusplus) } #endif #endif /* _UAPI_XE_DRM_H_ */ nvtop-3.2.0/include/list.h000066400000000000000000000153741477175131100154520ustar00rootroot00000000000000/* * Copyright (C) 2002 Free Software Foundation, Inc. * (originally part of the GNU C Library) * Contributed by Ulrich Drepper , 2002. * * Copyright (C) 2009 Pierre-Marc Fournier * Conversion to RCU list. * Copyright (C) 2010 Mathieu Desnoyers * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef _LIST_H #define _LIST_H 1 #include /* * container_of - Get the address of an object containing a field. * * @ptr: pointer to the field. * @type: type of the object. * @member: name of the field within the object. */ #define container_of(ptr, type, member) \ __extension__ \ ({ \ const __typeof__(((type *) NULL)->member) * __ptr = (ptr); \ (type *)((char *)__ptr - offsetof(type, member)); \ }) /* * The definitions of this file are adopted from those which can be * found in the Linux kernel headers to enable people familiar with the * latter find their way in these sources as well. */ /* Basic type for the double-link list. */ struct list_head { struct list_head *next, *prev; }; /* Define a variable with the head and tail of the list. */ #define LIST_HEAD(name) \ struct list_head name = { &(name), &(name) } /* Initialize a new list head. */ #define INIT_LIST_HEAD(ptr) \ (ptr)->next = (ptr)->prev = (ptr) #define LIST_HEAD_INIT(name) { .next = &(name), .prev = &(name) } /* Add new element at the head of the list. */ static inline void list_add(struct list_head *newp, struct list_head *head) { head->next->prev = newp; newp->next = head->next; newp->prev = head; head->next = newp; } /* Add new element at the tail of the list. */ static inline void list_add_tail(struct list_head *newp, struct list_head *head) { head->prev->next = newp; newp->next = head; newp->prev = head->prev; head->prev = newp; } /* Remove element from list. */ static inline void __list_del(struct list_head *prev, struct list_head *next) { next->prev = prev; prev->next = next; } /* Remove element from list. */ static inline void list_del(struct list_head *elem) { __list_del(elem->prev, elem->next); } /* Remove element from list, initializing the element's list pointers. */ static inline void list_del_init(struct list_head *elem) { list_del(elem); INIT_LIST_HEAD(elem); } /* Delete from list, add to another list as head. */ static inline void list_move(struct list_head *elem, struct list_head *head) { __list_del(elem->prev, elem->next); list_add(elem, head); } /* Delete from list, add to another list as tail. */ static inline void list_move_tail(struct list_head *elem, struct list_head *head) { __list_del(elem->prev, elem->next); list_add_tail(elem, head); } /* Replace an old entry. */ static inline void list_replace(struct list_head *old, struct list_head *_new) { _new->next = old->next; _new->prev = old->prev; _new->prev->next = _new; _new->next->prev = _new; } /* Join two lists. */ static inline void list_splice(struct list_head *add, struct list_head *head) { /* Do nothing if the list which gets added is empty. */ if (add != add->next) { add->next->prev = head; add->prev->next = head->next; head->next->prev = add->prev; head->next = add->next; } } /* Get typed element from list at a given position. */ #define list_entry(ptr, type, member) container_of(ptr, type, member) /* Get first entry from a list. */ #define list_first_entry(ptr, type, member) \ list_entry((ptr)->next, type, member) /* Iterate forward over the elements of the list. */ #define list_for_each(pos, head) \ for (pos = (head)->next; (pos) != (head); pos = (pos)->next) /* * Iterate forward over the elements list. The list elements can be * removed from the list while doing this. */ #define list_for_each_safe(pos, p, head) \ for (pos = (head)->next, p = (pos)->next; \ (pos) != (head); \ pos = (p), p = (pos)->next) /* Iterate backward over the elements of the list. */ #define list_for_each_prev(pos, head) \ for (pos = (head)->prev; (pos) != (head); pos = (pos)->prev) /* * Iterate backwards over the elements list. The list elements can be * removed from the list while doing this. */ #define list_for_each_prev_safe(pos, p, head) \ for (pos = (head)->prev, p = (pos)->prev; \ (pos) != (head); \ pos = (p), p = (pos)->prev) #define list_for_each_entry(pos, head, member) \ for (pos = list_entry((head)->next, __typeof__(*(pos)), member); \ &(pos)->member != (head); \ pos = list_entry((pos)->member.next, __typeof__(*(pos)), member)) #define list_for_each_entry_reverse(pos, head, member) \ for (pos = list_entry((head)->prev, __typeof__(*(pos)), member); \ &(pos)->member != (head); \ pos = list_entry((pos)->member.prev, __typeof__(*(pos)), member)) #define list_for_each_entry_safe(pos, p, head, member) \ for (pos = list_entry((head)->next, __typeof__(*(pos)), member), \ p = list_entry((pos)->member.next, __typeof__(*(pos)), member); \ &(pos)->member != (head); \ pos = (p), p = list_entry((pos)->member.next, __typeof__(*(pos)), member)) #define list_for_each_entry_reverse_safe(pos, p, head, member) \ for (pos = list_entry((head)->prev, __typeof__(*(pos)), member), \ p = list_entry((pos)->member.prev, __typeof__(*(pos)), member); \ &(pos)->member != (head); pos = (p), p = list_entry((pos)->member.prev, __typeof__(*(pos)), member)) /* * Same as list_for_each_entry_safe, but starts from "pos" which should * point to an entry within the list. */ #define list_for_each_entry_safe_from(pos, p, head, member) \ for (p = list_entry((pos)->member.next, __typeof__(*(pos)), member); \ &(pos)->member != (head); \ pos = (p), p = list_entry((pos)->member.next, __typeof__(*(pos)), member)) static inline int list_empty(struct list_head *head) { return head == head->next; } static inline void list_replace_init(struct list_head *old, struct list_head *_new) { struct list_head *head = old->next; list_del(old); list_add_tail(_new, head); INIT_LIST_HEAD(old); } #endif /* _LIST_H */ nvtop-3.2.0/include/nvtop/000077500000000000000000000000001477175131100154625ustar00rootroot00000000000000nvtop-3.2.0/include/nvtop/common.h000066400000000000000000000031651477175131100171300ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef NVTOP_COMMON_H__ #define NVTOP_COMMON_H__ #if !defined(HAS_REALLOCARRAY) #include #include #undef reallocarray // Reallocarray from musl libc (https://git.musl-libc.org/cgit/musl/tree/src/malloc/reallocarray.c) static void *nvtop_reallocarray__(void *ptr, size_t nmemb, size_t size) { if (size && nmemb > -1 / size) { errno = ENOMEM; return NULL; } return realloc(ptr, nmemb * size); } #define reallocarray(ptr, nmemb, size) nvtop_reallocarray__(ptr, nmemb, size) #endif // !defined(HAS_REALLOCARRAY) // Increment for the number of tracked processes // 16 has been experimentally selected for being small while avoiding multipe allocations in most common cases #define COMMON_PROCESS_LINEAR_REALLOC_INC 16 #define MAX_LINES_PER_PLOT 4 // Helper macro to stringify an integer #define QUOTE(x) #x #define EXPAND_AND_QUOTE(x) QUOTE(x) #endif // NVTOP_COMMON_H__ nvtop-3.2.0/include/nvtop/device_discovery.h000066400000000000000000000053231477175131100211640ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef NVTOP_DEVICE_DISCOVERY_H__ #define NVTOP_DEVICE_DISCOVERY_H__ // Devices typedef struct nvtop_device nvtop_device; nvtop_device *nvtop_device_ref(nvtop_device *device); nvtop_device *nvtop_device_unref(nvtop_device *device); int nvtop_device_new_from_syspath(nvtop_device **ret, const char *syspath); int nvtop_device_get_parent(nvtop_device *child, nvtop_device **parent); int nvtop_device_get_driver(nvtop_device *device, const char **driver); int nvtop_device_get_devname(nvtop_device *device, const char **devname); int nvtop_device_get_property_value(nvtop_device *device, const char *key, const char **value); int nvtop_device_get_sysattr_value(nvtop_device *device, const char *sysattr, const char **value); int nvtop_device_get_syspath(nvtop_device *device, const char **sysPath); // Devices enumerator typedef struct nvtop_device_enumerator nvtop_device_enumerator; int nvtop_enumerator_new(nvtop_device_enumerator **enumerator); nvtop_device_enumerator *nvtop_enumerator_ref(nvtop_device_enumerator *enumerator); nvtop_device_enumerator *nvtop_enumerator_unref(nvtop_device_enumerator *enumerator); int nvtop_device_enumerator_add_match_subsystem(nvtop_device_enumerator *enumerator, const char *subsystem, int match); int nvtop_device_enumerator_add_match_property(nvtop_device_enumerator *enumerator, const char *property, const char *value); int nvtop_device_enumerator_add_match_parent(nvtop_device_enumerator *enumerator, nvtop_device *parent); nvtop_device *nvtop_enumerator_get_device_first(nvtop_device_enumerator *enumerator); nvtop_device *nvtop_enumerator_get_device_next(nvtop_device_enumerator *enumerator); typedef struct { unsigned width; unsigned speed; } nvtop_pcie_link; int nvtop_device_maximum_pcie_link(nvtop_device *dev, nvtop_pcie_link *pcie_info); int nvtop_device_current_pcie_link(nvtop_device *dev, nvtop_pcie_link *pcie_info); nvtop_device *nvtop_device_get_hwmon(nvtop_device *dev); #endif // NVTOP_DEVICE_DISCOVERY_H__ nvtop-3.2.0/include/nvtop/extract_gpuinfo.h000066400000000000000000000026611477175131100210410ustar00rootroot00000000000000/* * * Copyright (C) 2017-2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef EXTRACT_GPUINFO_H_ #define EXTRACT_GPUINFO_H_ #include "nvtop/extract_gpuinfo_common.h" #include bool gpuinfo_init_info_extraction(unsigned *total_dev_count, struct list_head *devices); bool gpuinfo_shutdown_info_extraction(struct list_head *devices); bool gpuinfo_populate_static_infos(struct list_head *devices); bool gpuinfo_refresh_dynamic_info(struct list_head *devices); bool gpuinfo_fix_dynamic_info_from_process_info(struct list_head *devices); bool gpuinfo_refresh_processes(struct list_head *devices); bool gpuinfo_utilisation_rate(struct list_head *devices); void gpuinfo_clean(struct list_head *devices); void gpuinfo_clear_cache(void); #endif // EXTRACT_GPUINFO_H_ nvtop-3.2.0/include/nvtop/extract_gpuinfo_common.h000066400000000000000000000233721477175131100224130ustar00rootroot00000000000000/* * * Copyright (C) 2021-2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef EXTRACT_GPUINFO_COMMON_H__ #define EXTRACT_GPUINFO_COMMON_H__ #include #include #include #include #include "list.h" #define STRINGIFY(x) STRINGIFY_HELPER_(x) #define STRINGIFY_HELPER_(x) #x #define IS_VALID(x, y) ((y)[(x) / CHAR_BIT] & (1 << ((x) % CHAR_BIT))) #define SET_VALID(x, y) ((y)[(x) / CHAR_BIT] |= (1 << ((x) % CHAR_BIT))) #define RESET_VALID(x, y) ((y)[(x) / CHAR_BIT] &= ~(1 << ((x) % CHAR_BIT))) #define RESET_ALL(y) memset(y, 0, sizeof(y)) #define SET_VALUE(structPtr, field, value, prefix) \ do { \ (structPtr)->field = (value); \ SET_VALID(prefix##field##_valid, (structPtr)->valid); \ } while (0) #define INVALIDATE_VALUE(structPtr, field, prefix) \ do { \ RESET_VALID(prefix##field##_valid, (structPtr)->valid); \ } while (0) #define VALUE_IS_VALID(structPtr, field, prefix) IS_VALID(prefix##field##_valid, (structPtr)->valid) #define SET_GPUINFO_STATIC(structPtr, field, value) SET_VALUE(structPtr, field, value, gpuinfo_) #define RESET_GPUINFO_STATIC(structPtr, field) INVALIDATE_VALUE(structPtr, field, gpuinfo_) #define GPUINFO_STATIC_FIELD_VALID(structPtr, field) VALUE_IS_VALID(structPtr, field, gpuinfo_) enum gpuinfo_static_info_valid { gpuinfo_device_name_valid = 0, gpuinfo_max_pcie_gen_valid, gpuinfo_max_pcie_link_width_valid, gpuinfo_temperature_shutdown_threshold_valid, gpuinfo_temperature_slowdown_threshold_valid, gpuinfo_n_shared_cores_valid, gpuinfo_l2cache_size_valid, gpuinfo_n_exec_engines_valid, gpuinfo_static_info_count, }; #define MAX_DEVICE_NAME 128 struct gpuinfo_static_info { char device_name[MAX_DEVICE_NAME]; unsigned max_pcie_gen; unsigned max_pcie_link_width; unsigned temperature_shutdown_threshold; unsigned temperature_slowdown_threshold; unsigned n_shared_cores; unsigned l2cache_size; unsigned n_exec_engines; bool integrated_graphics; bool encode_decode_shared; unsigned char valid[(gpuinfo_static_info_count + CHAR_BIT - 1) / CHAR_BIT]; }; #define SET_GPUINFO_DYNAMIC(structPtr, field, value) SET_VALUE(structPtr, field, value, gpuinfo_) #define RESET_GPUINFO_DYNAMIC(structPtr, field) INVALIDATE_VALUE(structPtr, field, gpuinfo_) #define GPUINFO_DYNAMIC_FIELD_VALID(structPtr, field) VALUE_IS_VALID(structPtr, field, gpuinfo_) enum gpuinfo_dynamic_info_valid { gpuinfo_gpu_clock_speed_valid = 0, gpuinfo_gpu_clock_speed_max_valid, gpuinfo_mem_clock_speed_valid, gpuinfo_mem_clock_speed_max_valid, gpuinfo_gpu_util_rate_valid, gpuinfo_mem_util_rate_valid, gpuinfo_encoder_rate_valid, gpuinfo_decoder_rate_valid, gpuinfo_total_memory_valid, gpuinfo_free_memory_valid, gpuinfo_used_memory_valid, gpuinfo_pcie_link_gen_valid, gpuinfo_pcie_link_width_valid, gpuinfo_pcie_rx_valid, gpuinfo_pcie_tx_valid, gpuinfo_fan_speed_valid, gpuinfo_fan_rpm_valid, gpuinfo_gpu_temp_valid, gpuinfo_power_draw_valid, gpuinfo_power_draw_max_valid, gpuinfo_multi_instance_mode_valid, gpuinfo_dynamic_info_count, }; struct gpuinfo_dynamic_info { unsigned int gpu_clock_speed; // Device clock speed in MHz unsigned int gpu_clock_speed_max; // Maximum clock speed in MHz unsigned int mem_clock_speed; // Device clock speed in MHz unsigned int mem_clock_speed_max; // Maximum clock speed in MHz unsigned int gpu_util_rate; // GPU utilization rate in % unsigned int mem_util_rate; // MEM utilization rate in % unsigned int encoder_rate; // Encoder utilization rate in % unsigned int decoder_rate; // Decoder utilization rate in % unsigned long long total_memory; // Total memory (bytes) unsigned long long free_memory; // Unallocated memory (bytes) unsigned long long used_memory; // Allocated memory (bytes) unsigned int pcie_link_gen; // PCIe link generation used unsigned int pcie_link_width; // PCIe line width used unsigned int pcie_rx; // PCIe throughput in KB/s unsigned int pcie_tx; // PCIe throughput in KB/s unsigned int fan_speed; // Fan speed percentage unsigned int fan_rpm; // Fan speed RPM unsigned int gpu_temp; // GPU temperature °celsius unsigned int power_draw; // Power usage in milliwatts unsigned int power_draw_max; // Max power usage in milliwatts bool multi_instance_mode; // True if the GPU is in multi-instance mode unsigned char valid[(gpuinfo_dynamic_info_count + CHAR_BIT - 1) / CHAR_BIT]; }; enum gpu_process_type { gpu_process_unknown = 0, gpu_process_graphical = 1, gpu_process_compute = 2, gpu_process_graphical_compute = 3, gpu_process_type_count, }; #define SET_GPUINFO_PROCESS(structPtr, field, value) SET_VALUE(structPtr, field, value, gpuinfo_process_) #define RESET_GPUINFO_PROCESS(structPtr, field) INVALIDATE_VALUE(structPtr, field, gpuinfo_process_) #define GPUINFO_PROCESS_FIELD_VALID(structPtr, field) VALUE_IS_VALID(structPtr, field, gpuinfo_process_) enum gpuinfo_process_info_valid { gpuinfo_process_cmdline_valid, gpuinfo_process_user_name_valid, gpuinfo_process_gfx_engine_used_valid, gpuinfo_process_compute_engine_used_valid, gpuinfo_process_enc_engine_used_valid, gpuinfo_process_dec_engine_used_valid, gpuinfo_process_gpu_usage_valid, gpuinfo_process_encode_usage_valid, gpuinfo_process_decode_usage_valid, gpuinfo_process_gpu_memory_usage_valid, gpuinfo_process_gpu_memory_percentage_valid, gpuinfo_process_cpu_usage_valid, gpuinfo_process_cpu_memory_virt_valid, gpuinfo_process_cpu_memory_res_valid, gpuinfo_process_gpu_cycles_valid, gpuinfo_process_sample_delta_valid, gpuinfo_process_info_count }; struct gpu_process { enum gpu_process_type type; pid_t pid; // Process ID char *cmdline; // Process User Name char *user_name; // Process User Name uint64_t sample_delta; // Time spent between two successive samples uint64_t gfx_engine_used; // Time in nanoseconds this process spent using the GPU gfx uint64_t compute_engine_used; // Time in nanoseconds this process spent using the GPU compute uint64_t enc_engine_used; // Time in nanoseconds this process spent using the GPU encoder uint64_t dec_engine_used; // Time in nanoseconds this process spent using the GPU decoder uint64_t gpu_cycles; // Number of GPU cycles spent in the GPU gfx engine unsigned gpu_usage; // Percentage of GPU used by the process unsigned encode_usage; // Percentage of GPU encoder used by the process unsigned decode_usage; // Percentage of GPU decoder used by the process unsigned long long gpu_memory_usage; // Memory used by the process unsigned gpu_memory_percentage; // Percentage of the total device memory // consumed by the process unsigned cpu_usage; unsigned long cpu_memory_virt; unsigned long cpu_memory_res; unsigned char valid[(gpuinfo_process_info_count + CHAR_BIT - 1) / CHAR_BIT]; }; struct gpu_info; struct gpu_vendor { struct list_head list; bool (*init)(void); void (*shutdown)(void); const char *(*last_error_string)(void); bool (*get_device_handles)(struct list_head *devices, unsigned *count); void (*populate_static_info)(struct gpu_info *gpu_info); void (*refresh_dynamic_info)(struct gpu_info *gpu_info); void (*refresh_utilisation_rate)(struct gpu_info *gpu_info); void (*refresh_running_processes)(struct gpu_info *gpu_info); char *name; }; #define PDEV_LEN 16 struct gpu_info { struct list_head list; struct gpu_vendor *vendor; struct gpuinfo_static_info static_info; struct gpuinfo_dynamic_info dynamic_info; unsigned processes_count; struct gpu_process *processes; unsigned processes_array_size; char pdev[PDEV_LEN]; }; void register_gpu_vendor(struct gpu_vendor *vendor); bool extract_drm_fdinfo_key_value(char *buf, char **key, char **val); void gpuinfo_refresh_utilisation_rate(struct gpu_info *gpu_info); // fdinfo DRM interface names common to multiple drivers extern const char drm_pdev[]; extern const char drm_client_id[]; inline unsigned busy_usage_from_time_usage_round(uint64_t current_use_ns, uint64_t previous_use_ns, uint64_t time_between_measurement) { return ((current_use_ns - previous_use_ns) * UINT64_C(100) + time_between_measurement / UINT64_C(2)) / time_between_measurement; } unsigned nvtop_pcie_gen_from_link_speed(unsigned linkSpeed); #endif // EXTRACT_GPUINFO_COMMON_H__ nvtop-3.2.0/include/nvtop/extract_processinfo_fdinfo.h000066400000000000000000000045361477175131100232540ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef NVTOP_EXTRACT_PROCESSINFO_FDINFO__ #define NVTOP_EXTRACT_PROCESSINFO_FDINFO__ #include "nvtop/extract_gpuinfo_common.h" #include /** * @brief A callback function that populates the \p process_info structure from * the information gathered while parsing the fdinfo file \p fdinfo_file. Return true if the data in process_info is * valid, false otherwise. */ typedef bool (*processinfo_fdinfo_callback)(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info); /** * @brief Register a callback function to parse a fdinfo file opened to a DRM driver * * @param callback The callback function * @param info The struct gpu_info that will be updated when the callback succeeds. */ void processinfo_register_fdinfo_callback(processinfo_fdinfo_callback callback, struct gpu_info *info); /** * @brief Remove a previously registered callback. * * @param info The callback to this gpu_info will be removed */ void processinfo_drop_callback(const struct gpu_info *info); /** * @brief Enables or disables a fdinfo processing callback * * @param info Enabling/Disabling the callback to this gpu_info * @param enable True to enable the callback, false to disable */ void processinfo_enable_disable_callback_for(const struct gpu_info *info, bool enable); /** * @brief Scann all the processes in /proc. Call the registered callbacks on * each file descriptor to the DRM driver that can successfully be oppened. If a * callback succeeds, the gpu_info structure processes array will be updated * with the retrieved data. */ void processinfo_sweep_fdinfos(void); #endif // NVTOP_EXTRACT_PROCESSINFO_FDINFO__ nvtop-3.2.0/include/nvtop/get_process_info.h000066400000000000000000000024341477175131100211660ustar00rootroot00000000000000/* * * Copyright (C) 2017-2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef GET_PROCESS_INFO_H_ #define GET_PROCESS_INFO_H_ #include #include #include #include "nvtop/time.h" struct process_cpu_usage { double total_user_time; // Seconds double total_kernel_time; // Seconds size_t virtual_memory; // Bytes size_t resident_memory; // Bytes nvtop_time timestamp; }; void get_username_from_pid(pid_t pid, char **buffer); void get_command_from_pid(pid_t pid, char **buffer); bool get_process_info(pid_t pid, struct process_cpu_usage *usage); #endif // GET_PROCESS_INFO_H_ nvtop-3.2.0/include/nvtop/info_messages.h000066400000000000000000000016551477175131100204640ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef NVTOP_INFO_MESSAGES_H__ #define NVTOP_INFO_MESSAGES_H__ void get_info_messages(struct list_head *devices, unsigned *num_messages, const char ***messages); #endif // NVTOP_INFO_MESSAGES_H__ nvtop-3.2.0/include/nvtop/interface.h000066400000000000000000000042361477175131100176000ustar00rootroot00000000000000/* * * Copyright (C) 2017-2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef INTERFACE_H_ #define INTERFACE_H_ #include "nvtop/interface_options.h" #include struct nvtop_interface; struct nvtop_interface *initialize_curses(unsigned total_devices, unsigned num_devices, unsigned largest_device_name, nvtop_interface_option options); void clean_ncurses(struct nvtop_interface *interface); void interface_check_monitored_gpu_change(struct nvtop_interface **interface, unsigned allDevCount, unsigned *num_monitored_gpus, struct list_head *monitoredGpus, struct list_head *nonMonitoredGpus); unsigned interface_largest_gpu_name(struct list_head *devices); void draw_gpu_info_ncurses(unsigned monitored_dev_count, struct list_head *devices, struct nvtop_interface *interface); void save_current_data_to_ring(struct list_head *devices, struct nvtop_interface *interface); void update_window_size_to_terminal_size(struct nvtop_interface *inter); void interface_key(int keyId, struct nvtop_interface *inter); bool is_escape_for_quit(struct nvtop_interface *inter); bool interface_freeze_processes(struct nvtop_interface *interface); int interface_update_interval(const struct nvtop_interface *interface); bool show_information_messages(unsigned num_messages, const char **messages); void print_snapshot(struct list_head *devices, bool use_fahrenheit_option); #endif // INTERFACE_H_ nvtop-3.2.0/include/nvtop/interface_common.h000066400000000000000000000026131477175131100211450ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef INTERFACE_COMMON_H__ #define INTERFACE_COMMON_H__ enum plot_information { plot_gpu_rate = 0, plot_gpu_mem_rate, plot_encoder_rate, plot_decoder_rate, plot_gpu_temperature, plot_gpu_power_draw_rate, plot_fan_speed, plot_gpu_clock_rate, plot_gpu_mem_clock_rate, plot_information_count }; typedef int plot_info_to_draw; enum process_field { process_pid = 0, process_user, process_gpu_id, process_type, process_gpu_rate, process_enc_rate, process_dec_rate, process_memory, process_cpu_usage, process_cpu_mem_usage, process_command, process_field_count, }; typedef int process_field_displayed; #endif // INTERFACE_COMMON_H__ nvtop-3.2.0/include/nvtop/interface_internal_common.h000066400000000000000000000100271477175131100230370ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef INTERFACE_INTERNAL_COMMON_H__ #define INTERFACE_INTERNAL_COMMON_H__ #include "nvtop/common.h" #include "nvtop/interface_options.h" #include "nvtop/interface_ring_buffer.h" #include "nvtop/time.h" #include #include #define max(a, b) ((a) > (b) ? (a) : (b)) #define min(a, b) ((a) < (b) ? (a) : (b)) #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) enum nvtop_option_window_state { nvtop_option_state_hidden, nvtop_option_state_kill, nvtop_option_state_sort_by, }; enum interface_color { cyan_color = 1, yellow_color, magenta_color, green_color, red_color, blue_color, }; struct device_window { WINDOW *name_win; // Name of the GPU WINDOW *gpu_util_enc_dec; WINDOW *gpu_util_no_enc_or_dec; WINDOW *gpu_util_no_enc_and_dec; WINDOW *mem_util_enc_dec; WINDOW *mem_util_no_enc_or_dec; WINDOW *mem_util_no_enc_and_dec; WINDOW *encode_util; WINDOW *decode_util; WINDOW *encdec_util; WINDOW *fan_speed; WINDOW *temperature; WINDOW *power_info; WINDOW *gpu_clock_info; WINDOW *mem_clock_info; WINDOW *pcie_info; WINDOW *shader_cores; WINDOW *l2_cache_size; WINDOW *exec_engines; bool enc_was_visible; bool dec_was_visible; nvtop_time last_decode_seen; nvtop_time last_encode_seen; }; static const unsigned int option_window_size = 13; struct option_window { enum nvtop_option_window_state state; enum nvtop_option_window_state previous_state; unsigned int selected_row; unsigned int offset; WINDOW *option_win; }; struct process_window { unsigned offset; unsigned offset_column; WINDOW *process_win; WINDOW *process_with_option_win; unsigned selected_row; pid_t selected_pid; struct option_window option_window; }; struct plot_window { size_t num_data; double *data; WINDOW *win; WINDOW *plot_window; unsigned num_devices_to_plot; unsigned devices_ids[MAX_LINES_PER_PLOT]; }; enum setup_window_section { setup_general_selected, setup_header_selected, setup_chart_selected, setup_process_list_selected, setup_monitored_gpu_list_selected, setup_window_selection_count }; struct setup_window { unsigned indentation_level; enum setup_window_section selected_section; bool visible; WINDOW *clean_space; WINDOW *setup; WINDOW *single; WINDOW *split[2]; unsigned options_selected[2]; }; // Keep gpu information every 1 second for 10 minutes struct nvtop_interface { nvtop_interface_option options; unsigned total_dev_count; unsigned monitored_dev_count; struct device_window *devices_win; struct process_window process; WINDOW *shortcut_window; unsigned num_plots; struct plot_window *plots; interface_ring_buffer saved_data_ring; struct setup_window setup_win; }; enum device_field { device_name = 0, device_fan_speed, device_temperature, device_power, device_pcie, device_clock, device_shadercores, device_l2features, device_execengines, device_field_count, }; inline void set_attribute_between(WINDOW *win, int startY, int startX, int endX, attr_t attr, short pair) { int rows, cols; getmaxyx(win, rows, cols); (void)rows; if (startX >= cols || endX < 0) return; startX = startX < 0 ? 0 : startX; endX = endX > cols ? cols : endX; int size = endX - startX; mvwchgat(win, startY, startX, size, attr, pair, NULL); } #endif // INTERFACE_INTERNAL_COMMON_H__ nvtop-3.2.0/include/nvtop/interface_layout_selection.h000066400000000000000000000017501477175131100232400ustar00rootroot00000000000000#ifndef INTERFACE_LAYOUT_SELECTION_H__ #define INTERFACE_LAYOUT_SELECTION_H__ #include "nvtop/interface_common.h" #include "nvtop/interface_options.h" #include struct window_position { unsigned posX, posY, sizeX, sizeY; }; // Should be fine #define MAX_CHARTS 64 void compute_sizes_from_layout(unsigned monitored_dev_count, unsigned device_header_rows, unsigned device_header_cols, unsigned rows, unsigned cols, const nvtop_interface_gpu_opts *gpu_opts, process_field_displayed process_field_displayed, struct window_position *device_positions, unsigned *num_plots, struct window_position plot_positions[MAX_CHARTS], unsigned *map_device_to_plot, struct window_position *process_position, struct window_position *setup_position, bool process_win_hide); #endif // INTERFACE_LAYOUT_SELECTION_H__ nvtop-3.2.0/include/nvtop/interface_options.h000066400000000000000000000132761477175131100213570ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef INTERFACE_OPTIONS_H__ #define INTERFACE_OPTIONS_H__ #include "nvtop/common.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/interface_common.h" #include typedef struct { plot_info_to_draw to_draw; // The set of metrics to draw for this gpu bool doNotMonitor; // True if this GPU should not be monitored struct gpu_info *linkedGpu; // The gpu to which this option apply } nvtop_interface_gpu_opts; typedef struct nvtop_interface_option_struct { bool plot_left_to_right; // true to reverse the plot refresh direction defines inactivity (0 use rate) before hiding it bool temperature_in_fahrenheit; // Switch from celsius to fahrenheit temperature scale bool use_color; // Name self explanatory double encode_decode_hiding_timer; // Negative to always display, positive nvtop_interface_gpu_opts *gpu_specific_opts; // GPU specific options char *config_file_location; // Location of the config file enum process_field sort_processes_by; // Specify the field used to order the processes bool sort_descending_order; // Sort in descending order int update_interval; // Interval between interface update in milliseconds process_field_displayed process_fields_displayed; // Which columns of the // process list are displayed bool show_startup_messages; // True to show the startup messages bool filter_nvtop_pid; // Do not show nvtop pid in the processes list bool has_monitored_set_changed; // True if the set of monitored gpu was modified through the interface bool has_gpu_info_bar; // Show info bar with additional GPU parametres bool hide_processes_list; // Hide processes list } nvtop_interface_option; inline bool plot_isset_draw_info(enum plot_information check_info, plot_info_to_draw to_draw) { return (to_draw & (1 << check_info)) > 0; } inline unsigned plot_count_draw_info(plot_info_to_draw to_draw) { unsigned count = 0; for (int i = plot_gpu_rate; i < plot_information_count; ++i) { count += plot_isset_draw_info((enum plot_information)i, to_draw); } return count; } inline plot_info_to_draw plot_add_draw_info(enum plot_information set_info, plot_info_to_draw to_draw) { if (plot_count_draw_info(to_draw) < MAX_LINES_PER_PLOT) return to_draw | (1 << set_info); else return to_draw; } inline plot_info_to_draw plot_remove_draw_info(enum plot_information reset_info, plot_info_to_draw to_draw) { return to_draw & (~(1 << reset_info)); } inline plot_info_to_draw plot_default_draw_info(void) { return (1 << plot_gpu_rate) | (1 << plot_gpu_mem_rate); } void alloc_interface_options_internals(char *config_file_location, unsigned num_devices, struct list_head *devices, nvtop_interface_option *options); unsigned interface_check_and_fix_monitored_gpus(unsigned num_devices, struct list_head *monitoredGpus, struct list_head *nonMonitoredGpus, nvtop_interface_option *options); bool load_interface_options_from_config_file(unsigned num_devices, nvtop_interface_option *options); bool save_interface_options_to_config_file(unsigned total_dev_count, const nvtop_interface_option *options); inline bool process_is_field_displayed(enum process_field field, process_field_displayed fields_displayed) { return (fields_displayed & (1 << field)) > 0; } inline process_field_displayed process_remove_field_to_display(enum process_field field, process_field_displayed fields_displayed) { return fields_displayed & (~(1 << field)); } inline process_field_displayed process_add_field_to_display(enum process_field field, process_field_displayed fields_displayed) { return fields_displayed | (1 << field); } inline process_field_displayed process_default_displayed_field(void) { process_field_displayed to_display = 0; for (int field = process_pid; field < process_field_count; ++field) { to_display = process_add_field_to_display((enum process_field)field, to_display); } to_display = process_remove_field_to_display(process_enc_rate, to_display); to_display = process_remove_field_to_display(process_dec_rate, to_display); return to_display; } inline unsigned process_field_displayed_count(process_field_displayed fields_displayed) { unsigned displayed_count = 0; for (int field = process_pid; field < process_field_count; ++field) { if (process_is_field_displayed((enum process_field)field, fields_displayed)) displayed_count++; } return displayed_count; } enum process_field process_default_sort_by_from(process_field_displayed fields_displayed); #endif // INTERFACE_OPTIONS_H__ nvtop-3.2.0/include/nvtop/interface_ring_buffer.h000066400000000000000000000114541477175131100221500ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef INTERFACE_RING_BUFFER_H__ #define INTERFACE_RING_BUFFER_H__ #include typedef struct interface_ring_buffer_st { unsigned monitored_dev_count; unsigned per_device_data_saved; unsigned buffer_size; void *ring_buffer[2]; } interface_ring_buffer; #define INTERFACE_RING_BUFFER_DATA(ring_buffer_ptr, name) \ unsigned(*name)[ring_buffer_ptr->per_device_data_saved][ring_buffer_ptr->buffer_size] = \ (unsigned(*)[ring_buffer_ptr->per_device_data_saved][ring_buffer_ptr->buffer_size]) \ ring_buffer_ptr->ring_buffer[1]; #define INTERFACE_RING_BUFFER_INDICES(ring_buffer_ptr, name) \ unsigned(*name)[ring_buffer_ptr->per_device_data_saved][2] = \ (unsigned(*)[ring_buffer_ptr->per_device_data_saved][2])ring_buffer_ptr->ring_buffer[0]; void interface_alloc_ring_buffer(unsigned monitored_dev_count, unsigned per_device_data, unsigned buffer_size, interface_ring_buffer *ring_buffer); void interface_free_ring_buffer(interface_ring_buffer *buffer); inline unsigned interface_ring_buffer_data_stored(const interface_ring_buffer *buff, unsigned device, unsigned which_data) { INTERFACE_RING_BUFFER_INDICES(buff, indices); unsigned start = indices[device][which_data][0]; unsigned end = indices[device][which_data][1]; unsigned length = end - start; if (end < start) { // Has wrapped around the buffer length += buff->buffer_size; } return length; } inline unsigned interface_index_in_ring(const interface_ring_buffer *buff, unsigned device, unsigned which_data, unsigned index) { assert(interface_ring_buffer_data_stored(buff, device, which_data) > index); INTERFACE_RING_BUFFER_INDICES(buff, indices); unsigned start = indices[device][which_data][0]; unsigned location = start + index; if (location >= buff->buffer_size) location -= buff->buffer_size; return location; } inline unsigned interface_ring_buffer_get(const interface_ring_buffer *buff, unsigned device, unsigned which_data, unsigned index) { INTERFACE_RING_BUFFER_DATA(buff, data); unsigned index_in_ring = interface_index_in_ring(buff, device, which_data, index); return data[device][which_data][index_in_ring]; } inline void interface_ring_buffer_push(interface_ring_buffer *buff, unsigned device, unsigned which_data, unsigned value) { INTERFACE_RING_BUFFER_INDICES(buff, indices); INTERFACE_RING_BUFFER_DATA(buff, data); unsigned start = indices[device][which_data][0]; unsigned end = indices[device][which_data][1]; // If ring full, move start index data[device][which_data][end] = value; end++; if (end == buff->buffer_size) end -= buff->buffer_size; if (end == start) { start++; if (start == buff->buffer_size) start -= buff->buffer_size; } indices[device][which_data][0] = start; indices[device][which_data][1] = end; } inline void interface_ring_buffer_pop(interface_ring_buffer *buff, unsigned device, unsigned which_data) { INTERFACE_RING_BUFFER_INDICES(buff, indices); unsigned start = indices[device][which_data][0]; unsigned end = indices[device][which_data][1]; if (start != end) { start++; if (start == buff->buffer_size) start -= buff->buffer_size; indices[device][which_data][0] = start; } } inline void interface_ring_buffer_empty_select(interface_ring_buffer *buff, unsigned device, unsigned which_data) { INTERFACE_RING_BUFFER_INDICES(buff, indices); indices[device][which_data][0] = 0; indices[device][which_data][1] = 0; } inline void interface_ring_buffer_empty(interface_ring_buffer *buff, unsigned device) { for (unsigned i = 0; i < buff->per_device_data_saved; ++i) { interface_ring_buffer_empty_select(buff, device, i); } } #endif // INTERFACE_RING_BUFFER_H__ nvtop-3.2.0/include/nvtop/interface_setup_win.h000066400000000000000000000027371477175131100217010ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef INTERFACE_SETUP_WIN_H__ #define INTERFACE_SETUP_WIN_H__ #include "nvtop/extract_gpuinfo.h" #include "nvtop/interface_internal_common.h" #include "nvtop/interface_layout_selection.h" void alloc_setup_window(struct window_position *position, struct setup_window *setup_win); void free_setup_window(struct setup_window *setup_win); void show_setup_window(struct nvtop_interface *interface); void hide_setup_window(struct nvtop_interface *interface); void draw_setup_window(unsigned monitored_dev_count, struct list_head *devices, struct nvtop_interface *interface); void draw_setup_window_shortcuts(struct nvtop_interface *interface); void handle_setup_win_keypress(int keyId, struct nvtop_interface *interface); #endif // INTERFACE_SETUP_WIN_H__ nvtop-3.2.0/include/nvtop/plot.h000066400000000000000000000022721477175131100166140ustar00rootroot00000000000000/* * * Copyright (C) 2018 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef __PLOT_H_ #define __PLOT_H_ #include "nvtop/common.h" #include #include #include #define PLOT_MAX_LEGEND_SIZE 35 void nvtop_line_plot(WINDOW *win, size_t num_data, const double *data, unsigned num_plots, bool legend_left, char legend[MAX_LINES_PER_PLOT][PLOT_MAX_LEGEND_SIZE]); void draw_rectangle(WINDOW *win, unsigned startX, unsigned startY, unsigned sizeX, unsigned sizeY); #endif // __PLOT_H_ nvtop-3.2.0/include/nvtop/time.h000066400000000000000000000050451477175131100165750ustar00rootroot00000000000000/* * * Copyright (C) 2018-2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef NVTOP_TIME_H_ #define NVTOP_TIME_H_ #include #include #include #ifdef CLOCK_MONOTONIC_RAW #define NVTOP_CLOCK CLOCK_MONOTONIC_RAW #else #define NVTOP_CLOCK CLOCK_MONOTONIC #endif typedef struct timespec nvtop_time; inline void nvtop_get_current_time(nvtop_time *time) { clock_gettime(NVTOP_CLOCK, time); } inline double nvtop_difftime(nvtop_time t0, nvtop_time t1) { double secdiff = difftime(t1.tv_sec, t0.tv_sec); if (t1.tv_nsec < t0.tv_nsec) { long val = 1000000000l - t0.tv_nsec + t1.tv_nsec; secdiff += (double)val / 1e9 - 1.; } else { long val = t1.tv_nsec - t0.tv_nsec; secdiff += (double)val / 1e9; } return secdiff; } inline uint64_t nvtop_time_u64(nvtop_time t0) { return (uint64_t)(t0.tv_sec) * UINT64_C(1000000000) + t0.tv_nsec; } inline uint64_t nvtop_difftime_u64(nvtop_time t0, nvtop_time t1) { return (uint64_t)(t1.tv_sec - t0.tv_sec) * UINT64_C(1000000000) + (uint64_t)t1.tv_nsec - (uint64_t)t0.tv_nsec; } inline nvtop_time nvtop_hmns_to_time(unsigned hour, unsigned minutes, unsigned long nanosec) { nvtop_time t = {hour * 60 * 60 + 60 * minutes + nanosec / 1000000, nanosec % 1000000}; return t; } inline nvtop_time nvtop_substract_time(nvtop_time t0, nvtop_time t1) { nvtop_time t = t0.tv_nsec - t1.tv_nsec < 0 ? (nvtop_time){t0.tv_sec - t1.tv_sec - 1, t0.tv_nsec - t1.tv_nsec + 1000000} : (nvtop_time){t0.tv_sec - t1.tv_sec, t0.tv_nsec - t1.tv_nsec}; return t; } inline nvtop_time nvtop_add_time(nvtop_time t0, nvtop_time t1) { nvtop_time t = t0.tv_nsec + t1.tv_nsec > 1000000 ? (nvtop_time){t0.tv_sec + t1.tv_sec + 1, t0.tv_nsec + t1.tv_nsec - 1000000} : (nvtop_time){t0.tv_sec + t1.tv_sec, t0.tv_nsec + t1.tv_nsec}; return t; } #endif // NVTOP_TIME_H_ nvtop-3.2.0/include/nvtop/version.h.in000066400000000000000000000020631477175131100177260ustar00rootroot00000000000000/* * * Copyright (C) 2018 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #ifndef __NVTOP_VERSION_H_ #define __NVTOP_VERSION_H_ #define NVTOP_VERSION_MAJOR @nvtop_VERSION_MAJOR@ #define NVTOP_VERSION_MINOR @nvtop_VERSION_MINOR@ #define NVTOP_VERSION_PATCH @nvtop_VERSION_PATCH@ #define NVTOP_VERSION_STRING "@nvtop_VERSION_MAJOR@.@nvtop_VERSION_MINOR@.@nvtop_VERSION_PATCH@" #endif // __NVTOP_VERSION_H_ nvtop-3.2.0/include/uthash.h000066400000000000000000002200711477175131100157630ustar00rootroot00000000000000/* Copyright (c) 2003-2021, Troy D. Hanson http://troydhanson.github.io/uthash/ All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef UTHASH_H #define UTHASH_H #define UTHASH_VERSION 2.3.0 #include /* memcmp, memset, strlen */ #include /* ptrdiff_t */ #include /* exit */ #if defined(HASH_DEFINE_OWN_STDINT) && HASH_DEFINE_OWN_STDINT /* This codepath is provided for backward compatibility, but I plan to remove it. */ #warning "HASH_DEFINE_OWN_STDINT is deprecated; please use HASH_NO_STDINT instead" typedef unsigned int uint32_t; typedef unsigned char uint8_t; #elif defined(HASH_NO_STDINT) && HASH_NO_STDINT #else #include /* uint8_t, uint32_t */ #endif /* These macros use decltype or the earlier __typeof GNU extension. As decltype is only available in newer compilers (VS2010 or gcc 4.3+ when compiling c++ source) this code uses whatever method is needed or, for VS2008 where neither is available, uses casting workarounds. */ #if !defined(DECLTYPE) && !defined(NO_DECLTYPE) #if defined(_MSC_VER) /* MS compiler */ #if _MSC_VER >= 1600 && defined(__cplusplus) /* VS2010 or newer in C++ mode */ #define DECLTYPE(x) (decltype(x)) #else /* VS2008 or older (or VS2010 in C mode) */ #define NO_DECLTYPE #endif #elif defined(__BORLANDC__) || defined(__ICCARM__) || defined(__LCC__) || defined(__WATCOMC__) #define NO_DECLTYPE #else /* GNU, Sun and other compilers */ #define DECLTYPE(x) (__typeof(x)) #endif #endif #ifdef NO_DECLTYPE #define DECLTYPE(x) #define DECLTYPE_ASSIGN(dst,src) \ do { \ char **_da_dst = (char**)(&(dst)); \ *_da_dst = (char*)(src); \ } while (0) #else #define DECLTYPE_ASSIGN(dst,src) \ do { \ (dst) = DECLTYPE(dst)(src); \ } while (0) #endif #ifndef uthash_malloc #define uthash_malloc(sz) malloc(sz) /* malloc fcn */ #endif #ifndef uthash_free #define uthash_free(ptr,sz) free(ptr) /* free fcn */ #endif #ifndef uthash_bzero #define uthash_bzero(a,n) memset(a,'\0',n) #endif #ifndef uthash_strlen #define uthash_strlen(s) strlen(s) #endif #ifndef HASH_FUNCTION #define HASH_FUNCTION(keyptr,keylen,hashv) HASH_JEN(keyptr, keylen, hashv) #endif #ifndef HASH_KEYCMP #define HASH_KEYCMP(a,b,n) memcmp(a,b,n) #endif #ifndef uthash_noexpand_fyi #define uthash_noexpand_fyi(tbl) /* can be defined to log noexpand */ #endif #ifndef uthash_expand_fyi #define uthash_expand_fyi(tbl) /* can be defined to log expands */ #endif #ifndef HASH_NONFATAL_OOM #define HASH_NONFATAL_OOM 0 #endif #if HASH_NONFATAL_OOM /* malloc failures can be recovered from */ #ifndef uthash_nonfatal_oom #define uthash_nonfatal_oom(obj) do {} while (0) /* non-fatal OOM error */ #endif #define HASH_RECORD_OOM(oomed) do { (oomed) = 1; } while (0) #define IF_HASH_NONFATAL_OOM(x) x #else /* malloc failures result in lost memory, hash tables are unusable */ #ifndef uthash_fatal #define uthash_fatal(msg) exit(-1) /* fatal OOM error */ #endif #define HASH_RECORD_OOM(oomed) uthash_fatal("out of memory") #define IF_HASH_NONFATAL_OOM(x) #endif /* initial number of buckets */ #define HASH_INITIAL_NUM_BUCKETS 32U /* initial number of buckets */ #define HASH_INITIAL_NUM_BUCKETS_LOG2 5U /* lg2 of initial number of buckets */ #define HASH_BKT_CAPACITY_THRESH 10U /* expand when bucket count reaches */ /* calculate the element whose hash handle address is hhp */ #define ELMT_FROM_HH(tbl,hhp) ((void*)(((char*)(hhp)) - ((tbl)->hho))) /* calculate the hash handle from element address elp */ #define HH_FROM_ELMT(tbl,elp) ((UT_hash_handle*)(void*)(((char*)(elp)) + ((tbl)->hho))) #define HASH_ROLLBACK_BKT(hh, head, itemptrhh) \ do { \ struct UT_hash_handle *_hd_hh_item = (itemptrhh); \ unsigned _hd_bkt; \ HASH_TO_BKT(_hd_hh_item->hashv, (head)->hh.tbl->num_buckets, _hd_bkt); \ (head)->hh.tbl->buckets[_hd_bkt].count++; \ _hd_hh_item->hh_next = NULL; \ _hd_hh_item->hh_prev = NULL; \ } while (0) #define HASH_VALUE(keyptr,keylen,hashv) \ do { \ HASH_FUNCTION(keyptr, keylen, hashv); \ } while (0) #define HASH_FIND_BYHASHVALUE(hh,head,keyptr,keylen,hashval,out) \ do { \ (out) = NULL; \ if (head) { \ unsigned _hf_bkt; \ HASH_TO_BKT(hashval, (head)->hh.tbl->num_buckets, _hf_bkt); \ if (HASH_BLOOM_TEST((head)->hh.tbl, hashval) != 0) { \ HASH_FIND_IN_BKT((head)->hh.tbl, hh, (head)->hh.tbl->buckets[ _hf_bkt ], keyptr, keylen, hashval, out); \ } \ } \ } while (0) #define HASH_FIND(hh,head,keyptr,keylen,out) \ do { \ (out) = NULL; \ if (head) { \ unsigned _hf_hashv; \ HASH_VALUE(keyptr, keylen, _hf_hashv); \ HASH_FIND_BYHASHVALUE(hh, head, keyptr, keylen, _hf_hashv, out); \ } \ } while (0) #ifdef HASH_BLOOM #define HASH_BLOOM_BITLEN (1UL << HASH_BLOOM) #define HASH_BLOOM_BYTELEN (HASH_BLOOM_BITLEN/8UL) + (((HASH_BLOOM_BITLEN%8UL)!=0UL) ? 1UL : 0UL) #define HASH_BLOOM_MAKE(tbl,oomed) \ do { \ (tbl)->bloom_nbits = HASH_BLOOM; \ (tbl)->bloom_bv = (uint8_t*)uthash_malloc(HASH_BLOOM_BYTELEN); \ if (!(tbl)->bloom_bv) { \ HASH_RECORD_OOM(oomed); \ } else { \ uthash_bzero((tbl)->bloom_bv, HASH_BLOOM_BYTELEN); \ (tbl)->bloom_sig = HASH_BLOOM_SIGNATURE; \ } \ } while (0) #define HASH_BLOOM_FREE(tbl) \ do { \ uthash_free((tbl)->bloom_bv, HASH_BLOOM_BYTELEN); \ } while (0) #define HASH_BLOOM_BITSET(bv,idx) (bv[(idx)/8U] |= (1U << ((idx)%8U))) #define HASH_BLOOM_BITTEST(bv,idx) (bv[(idx)/8U] & (1U << ((idx)%8U))) #define HASH_BLOOM_ADD(tbl,hashv) \ HASH_BLOOM_BITSET((tbl)->bloom_bv, ((hashv) & (uint32_t)((1UL << (tbl)->bloom_nbits) - 1U))) #define HASH_BLOOM_TEST(tbl,hashv) \ HASH_BLOOM_BITTEST((tbl)->bloom_bv, ((hashv) & (uint32_t)((1UL << (tbl)->bloom_nbits) - 1U))) #else #define HASH_BLOOM_MAKE(tbl,oomed) #define HASH_BLOOM_FREE(tbl) #define HASH_BLOOM_ADD(tbl,hashv) #define HASH_BLOOM_TEST(tbl,hashv) (1) #define HASH_BLOOM_BYTELEN 0U #endif #define HASH_MAKE_TABLE(hh,head,oomed) \ do { \ (head)->hh.tbl = (UT_hash_table*)uthash_malloc(sizeof(UT_hash_table)); \ if (!(head)->hh.tbl) { \ HASH_RECORD_OOM(oomed); \ } else { \ uthash_bzero((head)->hh.tbl, sizeof(UT_hash_table)); \ (head)->hh.tbl->tail = &((head)->hh); \ (head)->hh.tbl->num_buckets = HASH_INITIAL_NUM_BUCKETS; \ (head)->hh.tbl->log2_num_buckets = HASH_INITIAL_NUM_BUCKETS_LOG2; \ (head)->hh.tbl->hho = (char*)(&(head)->hh) - (char*)(head); \ (head)->hh.tbl->buckets = (UT_hash_bucket*)uthash_malloc( \ HASH_INITIAL_NUM_BUCKETS * sizeof(struct UT_hash_bucket)); \ (head)->hh.tbl->signature = HASH_SIGNATURE; \ if (!(head)->hh.tbl->buckets) { \ HASH_RECORD_OOM(oomed); \ uthash_free((head)->hh.tbl, sizeof(UT_hash_table)); \ } else { \ uthash_bzero((head)->hh.tbl->buckets, \ HASH_INITIAL_NUM_BUCKETS * sizeof(struct UT_hash_bucket)); \ HASH_BLOOM_MAKE((head)->hh.tbl, oomed); \ IF_HASH_NONFATAL_OOM( \ if (oomed) { \ uthash_free((head)->hh.tbl->buckets, \ HASH_INITIAL_NUM_BUCKETS*sizeof(struct UT_hash_bucket)); \ uthash_free((head)->hh.tbl, sizeof(UT_hash_table)); \ } \ ) \ } \ } \ } while (0) #define HASH_REPLACE_BYHASHVALUE_INORDER(hh,head,fieldname,keylen_in,hashval,add,replaced,cmpfcn) \ do { \ (replaced) = NULL; \ HASH_FIND_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, replaced); \ if (replaced) { \ HASH_DELETE(hh, head, replaced); \ } \ HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh, head, &((add)->fieldname), keylen_in, hashval, add, cmpfcn); \ } while (0) #define HASH_REPLACE_BYHASHVALUE(hh,head,fieldname,keylen_in,hashval,add,replaced) \ do { \ (replaced) = NULL; \ HASH_FIND_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, replaced); \ if (replaced) { \ HASH_DELETE(hh, head, replaced); \ } \ HASH_ADD_KEYPTR_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, add); \ } while (0) #define HASH_REPLACE(hh,head,fieldname,keylen_in,add,replaced) \ do { \ unsigned _hr_hashv; \ HASH_VALUE(&((add)->fieldname), keylen_in, _hr_hashv); \ HASH_REPLACE_BYHASHVALUE(hh, head, fieldname, keylen_in, _hr_hashv, add, replaced); \ } while (0) #define HASH_REPLACE_INORDER(hh,head,fieldname,keylen_in,add,replaced,cmpfcn) \ do { \ unsigned _hr_hashv; \ HASH_VALUE(&((add)->fieldname), keylen_in, _hr_hashv); \ HASH_REPLACE_BYHASHVALUE_INORDER(hh, head, fieldname, keylen_in, _hr_hashv, add, replaced, cmpfcn); \ } while (0) #define HASH_APPEND_LIST(hh, head, add) \ do { \ (add)->hh.next = NULL; \ (add)->hh.prev = ELMT_FROM_HH((head)->hh.tbl, (head)->hh.tbl->tail); \ (head)->hh.tbl->tail->next = (add); \ (head)->hh.tbl->tail = &((add)->hh); \ } while (0) #define HASH_AKBI_INNER_LOOP(hh,head,add,cmpfcn) \ do { \ do { \ if (cmpfcn(DECLTYPE(head)(_hs_iter), add) > 0) { \ break; \ } \ } while ((_hs_iter = HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->next)); \ } while (0) #ifdef NO_DECLTYPE #undef HASH_AKBI_INNER_LOOP #define HASH_AKBI_INNER_LOOP(hh,head,add,cmpfcn) \ do { \ char *_hs_saved_head = (char*)(head); \ do { \ DECLTYPE_ASSIGN(head, _hs_iter); \ if (cmpfcn(head, add) > 0) { \ DECLTYPE_ASSIGN(head, _hs_saved_head); \ break; \ } \ DECLTYPE_ASSIGN(head, _hs_saved_head); \ } while ((_hs_iter = HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->next)); \ } while (0) #endif #if HASH_NONFATAL_OOM #define HASH_ADD_TO_TABLE(hh,head,keyptr,keylen_in,hashval,add,oomed) \ do { \ if (!(oomed)) { \ unsigned _ha_bkt; \ (head)->hh.tbl->num_items++; \ HASH_TO_BKT(hashval, (head)->hh.tbl->num_buckets, _ha_bkt); \ HASH_ADD_TO_BKT((head)->hh.tbl->buckets[_ha_bkt], hh, &(add)->hh, oomed); \ if (oomed) { \ HASH_ROLLBACK_BKT(hh, head, &(add)->hh); \ HASH_DELETE_HH(hh, head, &(add)->hh); \ (add)->hh.tbl = NULL; \ uthash_nonfatal_oom(add); \ } else { \ HASH_BLOOM_ADD((head)->hh.tbl, hashval); \ HASH_EMIT_KEY(hh, head, keyptr, keylen_in); \ } \ } else { \ (add)->hh.tbl = NULL; \ uthash_nonfatal_oom(add); \ } \ } while (0) #else #define HASH_ADD_TO_TABLE(hh,head,keyptr,keylen_in,hashval,add,oomed) \ do { \ unsigned _ha_bkt; \ (head)->hh.tbl->num_items++; \ HASH_TO_BKT(hashval, (head)->hh.tbl->num_buckets, _ha_bkt); \ HASH_ADD_TO_BKT((head)->hh.tbl->buckets[_ha_bkt], hh, &(add)->hh, oomed); \ HASH_BLOOM_ADD((head)->hh.tbl, hashval); \ HASH_EMIT_KEY(hh, head, keyptr, keylen_in); \ } while (0) #endif #define HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh,head,keyptr,keylen_in,hashval,add,cmpfcn) \ do { \ IF_HASH_NONFATAL_OOM( int _ha_oomed = 0; ) \ (add)->hh.hashv = (hashval); \ (add)->hh.key = (char*) (keyptr); \ (add)->hh.keylen = (unsigned) (keylen_in); \ if (!(head)) { \ (add)->hh.next = NULL; \ (add)->hh.prev = NULL; \ HASH_MAKE_TABLE(hh, add, _ha_oomed); \ IF_HASH_NONFATAL_OOM( if (!_ha_oomed) { ) \ (head) = (add); \ IF_HASH_NONFATAL_OOM( } ) \ } else { \ void *_hs_iter = (head); \ (add)->hh.tbl = (head)->hh.tbl; \ HASH_AKBI_INNER_LOOP(hh, head, add, cmpfcn); \ if (_hs_iter) { \ (add)->hh.next = _hs_iter; \ if (((add)->hh.prev = HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->prev)) { \ HH_FROM_ELMT((head)->hh.tbl, (add)->hh.prev)->next = (add); \ } else { \ (head) = (add); \ } \ HH_FROM_ELMT((head)->hh.tbl, _hs_iter)->prev = (add); \ } else { \ HASH_APPEND_LIST(hh, head, add); \ } \ } \ HASH_ADD_TO_TABLE(hh, head, keyptr, keylen_in, hashval, add, _ha_oomed); \ HASH_FSCK(hh, head, "HASH_ADD_KEYPTR_BYHASHVALUE_INORDER"); \ } while (0) #define HASH_ADD_KEYPTR_INORDER(hh,head,keyptr,keylen_in,add,cmpfcn) \ do { \ unsigned _hs_hashv; \ HASH_VALUE(keyptr, keylen_in, _hs_hashv); \ HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh, head, keyptr, keylen_in, _hs_hashv, add, cmpfcn); \ } while (0) #define HASH_ADD_BYHASHVALUE_INORDER(hh,head,fieldname,keylen_in,hashval,add,cmpfcn) \ HASH_ADD_KEYPTR_BYHASHVALUE_INORDER(hh, head, &((add)->fieldname), keylen_in, hashval, add, cmpfcn) #define HASH_ADD_INORDER(hh,head,fieldname,keylen_in,add,cmpfcn) \ HASH_ADD_KEYPTR_INORDER(hh, head, &((add)->fieldname), keylen_in, add, cmpfcn) #define HASH_ADD_KEYPTR_BYHASHVALUE(hh,head,keyptr,keylen_in,hashval,add) \ do { \ IF_HASH_NONFATAL_OOM( int _ha_oomed = 0; ) \ (add)->hh.hashv = (hashval); \ (add)->hh.key = (const void*) (keyptr); \ (add)->hh.keylen = (unsigned) (keylen_in); \ if (!(head)) { \ (add)->hh.next = NULL; \ (add)->hh.prev = NULL; \ HASH_MAKE_TABLE(hh, add, _ha_oomed); \ IF_HASH_NONFATAL_OOM( if (!_ha_oomed) { ) \ (head) = (add); \ IF_HASH_NONFATAL_OOM( } ) \ } else { \ (add)->hh.tbl = (head)->hh.tbl; \ HASH_APPEND_LIST(hh, head, add); \ } \ HASH_ADD_TO_TABLE(hh, head, keyptr, keylen_in, hashval, add, _ha_oomed); \ HASH_FSCK(hh, head, "HASH_ADD_KEYPTR_BYHASHVALUE"); \ } while (0) #define HASH_ADD_KEYPTR(hh,head,keyptr,keylen_in,add) \ do { \ unsigned _ha_hashv; \ HASH_VALUE(keyptr, keylen_in, _ha_hashv); \ HASH_ADD_KEYPTR_BYHASHVALUE(hh, head, keyptr, keylen_in, _ha_hashv, add); \ } while (0) #define HASH_ADD_BYHASHVALUE(hh,head,fieldname,keylen_in,hashval,add) \ HASH_ADD_KEYPTR_BYHASHVALUE(hh, head, &((add)->fieldname), keylen_in, hashval, add) #define HASH_ADD(hh,head,fieldname,keylen_in,add) \ HASH_ADD_KEYPTR(hh, head, &((add)->fieldname), keylen_in, add) #define HASH_TO_BKT(hashv,num_bkts,bkt) \ do { \ bkt = ((hashv) & ((num_bkts) - 1U)); \ } while (0) /* delete "delptr" from the hash table. * "the usual" patch-up process for the app-order doubly-linked-list. * The use of _hd_hh_del below deserves special explanation. * These used to be expressed using (delptr) but that led to a bug * if someone used the same symbol for the head and deletee, like * HASH_DELETE(hh,users,users); * We want that to work, but by changing the head (users) below * we were forfeiting our ability to further refer to the deletee (users) * in the patch-up process. Solution: use scratch space to * copy the deletee pointer, then the latter references are via that * scratch pointer rather than through the repointed (users) symbol. */ #define HASH_DELETE(hh,head,delptr) \ HASH_DELETE_HH(hh, head, &(delptr)->hh) #define HASH_DELETE_HH(hh,head,delptrhh) \ do { \ struct UT_hash_handle *_hd_hh_del = (delptrhh); \ if ((_hd_hh_del->prev == NULL) && (_hd_hh_del->next == NULL)) { \ HASH_BLOOM_FREE((head)->hh.tbl); \ uthash_free((head)->hh.tbl->buckets, \ (head)->hh.tbl->num_buckets * sizeof(struct UT_hash_bucket)); \ uthash_free((head)->hh.tbl, sizeof(UT_hash_table)); \ (head) = NULL; \ } else { \ unsigned _hd_bkt; \ if (_hd_hh_del == (head)->hh.tbl->tail) { \ (head)->hh.tbl->tail = HH_FROM_ELMT((head)->hh.tbl, _hd_hh_del->prev); \ } \ if (_hd_hh_del->prev != NULL) { \ HH_FROM_ELMT((head)->hh.tbl, _hd_hh_del->prev)->next = _hd_hh_del->next; \ } else { \ DECLTYPE_ASSIGN(head, _hd_hh_del->next); \ } \ if (_hd_hh_del->next != NULL) { \ HH_FROM_ELMT((head)->hh.tbl, _hd_hh_del->next)->prev = _hd_hh_del->prev; \ } \ HASH_TO_BKT(_hd_hh_del->hashv, (head)->hh.tbl->num_buckets, _hd_bkt); \ HASH_DEL_IN_BKT((head)->hh.tbl->buckets[_hd_bkt], _hd_hh_del); \ (head)->hh.tbl->num_items--; \ } \ HASH_FSCK(hh, head, "HASH_DELETE_HH"); \ } while (0) /* convenience forms of HASH_FIND/HASH_ADD/HASH_DEL */ #define HASH_FIND_STR(head,findstr,out) \ do { \ unsigned _uthash_hfstr_keylen = (unsigned)uthash_strlen(findstr); \ HASH_FIND(hh, head, findstr, _uthash_hfstr_keylen, out); \ } while (0) #define HASH_ADD_STR(head,strfield,add) \ do { \ unsigned _uthash_hastr_keylen = (unsigned)uthash_strlen((add)->strfield); \ HASH_ADD(hh, head, strfield[0], _uthash_hastr_keylen, add); \ } while (0) #define HASH_REPLACE_STR(head,strfield,add,replaced) \ do { \ unsigned _uthash_hrstr_keylen = (unsigned)uthash_strlen((add)->strfield); \ HASH_REPLACE(hh, head, strfield[0], _uthash_hrstr_keylen, add, replaced); \ } while (0) #define HASH_FIND_INT(head,findint,out) \ HASH_FIND(hh,head,findint,sizeof(int),out) #define HASH_ADD_INT(head,intfield,add) \ HASH_ADD(hh,head,intfield,sizeof(int),add) #define HASH_REPLACE_INT(head,intfield,add,replaced) \ HASH_REPLACE(hh,head,intfield,sizeof(int),add,replaced) #define HASH_FIND_PTR(head,findptr,out) \ HASH_FIND(hh,head,findptr,sizeof(void *),out) #define HASH_ADD_PTR(head,ptrfield,add) \ HASH_ADD(hh,head,ptrfield,sizeof(void *),add) #define HASH_REPLACE_PTR(head,ptrfield,add,replaced) \ HASH_REPLACE(hh,head,ptrfield,sizeof(void *),add,replaced) #define HASH_DEL(head,delptr) \ HASH_DELETE(hh,head,delptr) /* HASH_FSCK checks hash integrity on every add/delete when HASH_DEBUG is defined. * This is for uthash developer only; it compiles away if HASH_DEBUG isn't defined. */ #ifdef HASH_DEBUG #include /* fprintf, stderr */ #define HASH_OOPS(...) do { fprintf(stderr, __VA_ARGS__); exit(-1); } while (0) #define HASH_FSCK(hh,head,where) \ do { \ struct UT_hash_handle *_thh; \ if (head) { \ unsigned _bkt_i; \ unsigned _count = 0; \ char *_prev; \ for (_bkt_i = 0; _bkt_i < (head)->hh.tbl->num_buckets; ++_bkt_i) { \ unsigned _bkt_count = 0; \ _thh = (head)->hh.tbl->buckets[_bkt_i].hh_head; \ _prev = NULL; \ while (_thh) { \ if (_prev != (char*)(_thh->hh_prev)) { \ HASH_OOPS("%s: invalid hh_prev %p, actual %p\n", \ (where), (void*)_thh->hh_prev, (void*)_prev); \ } \ _bkt_count++; \ _prev = (char*)(_thh); \ _thh = _thh->hh_next; \ } \ _count += _bkt_count; \ if ((head)->hh.tbl->buckets[_bkt_i].count != _bkt_count) { \ HASH_OOPS("%s: invalid bucket count %u, actual %u\n", \ (where), (head)->hh.tbl->buckets[_bkt_i].count, _bkt_count); \ } \ } \ if (_count != (head)->hh.tbl->num_items) { \ HASH_OOPS("%s: invalid hh item count %u, actual %u\n", \ (where), (head)->hh.tbl->num_items, _count); \ } \ _count = 0; \ _prev = NULL; \ _thh = &(head)->hh; \ while (_thh) { \ _count++; \ if (_prev != (char*)_thh->prev) { \ HASH_OOPS("%s: invalid prev %p, actual %p\n", \ (where), (void*)_thh->prev, (void*)_prev); \ } \ _prev = (char*)ELMT_FROM_HH((head)->hh.tbl, _thh); \ _thh = (_thh->next ? HH_FROM_ELMT((head)->hh.tbl, _thh->next) : NULL); \ } \ if (_count != (head)->hh.tbl->num_items) { \ HASH_OOPS("%s: invalid app item count %u, actual %u\n", \ (where), (head)->hh.tbl->num_items, _count); \ } \ } \ } while (0) #else #define HASH_FSCK(hh,head,where) #endif /* When compiled with -DHASH_EMIT_KEYS, length-prefixed keys are emitted to * the descriptor to which this macro is defined for tuning the hash function. * The app can #include to get the prototype for write(2). */ #ifdef HASH_EMIT_KEYS #define HASH_EMIT_KEY(hh,head,keyptr,fieldlen) \ do { \ unsigned _klen = fieldlen; \ write(HASH_EMIT_KEYS, &_klen, sizeof(_klen)); \ write(HASH_EMIT_KEYS, keyptr, (unsigned long)fieldlen); \ } while (0) #else #define HASH_EMIT_KEY(hh,head,keyptr,fieldlen) #endif /* The Bernstein hash function, used in Perl prior to v5.6. Note (x<<5+x)=x*33. */ #define HASH_BER(key,keylen,hashv) \ do { \ unsigned _hb_keylen = (unsigned)keylen; \ const unsigned char *_hb_key = (const unsigned char*)(key); \ (hashv) = 0; \ while (_hb_keylen-- != 0U) { \ (hashv) = (((hashv) << 5) + (hashv)) + *_hb_key++; \ } \ } while (0) /* SAX/FNV/OAT/JEN hash functions are macro variants of those listed at * http://eternallyconfuzzled.com/tuts/algorithms/jsw_tut_hashing.aspx */ #define HASH_SAX(key,keylen,hashv) \ do { \ unsigned _sx_i; \ const unsigned char *_hs_key = (const unsigned char*)(key); \ hashv = 0; \ for (_sx_i=0; _sx_i < keylen; _sx_i++) { \ hashv ^= (hashv << 5) + (hashv >> 2) + _hs_key[_sx_i]; \ } \ } while (0) /* FNV-1a variation */ #define HASH_FNV(key,keylen,hashv) \ do { \ unsigned _fn_i; \ const unsigned char *_hf_key = (const unsigned char*)(key); \ (hashv) = 2166136261U; \ for (_fn_i=0; _fn_i < keylen; _fn_i++) { \ hashv = hashv ^ _hf_key[_fn_i]; \ hashv = hashv * 16777619U; \ } \ } while (0) #define HASH_OAT(key,keylen,hashv) \ do { \ unsigned _ho_i; \ const unsigned char *_ho_key=(const unsigned char*)(key); \ hashv = 0; \ for(_ho_i=0; _ho_i < keylen; _ho_i++) { \ hashv += _ho_key[_ho_i]; \ hashv += (hashv << 10); \ hashv ^= (hashv >> 6); \ } \ hashv += (hashv << 3); \ hashv ^= (hashv >> 11); \ hashv += (hashv << 15); \ } while (0) #define HASH_JEN_MIX(a,b,c) \ do { \ a -= b; a -= c; a ^= ( c >> 13 ); \ b -= c; b -= a; b ^= ( a << 8 ); \ c -= a; c -= b; c ^= ( b >> 13 ); \ a -= b; a -= c; a ^= ( c >> 12 ); \ b -= c; b -= a; b ^= ( a << 16 ); \ c -= a; c -= b; c ^= ( b >> 5 ); \ a -= b; a -= c; a ^= ( c >> 3 ); \ b -= c; b -= a; b ^= ( a << 10 ); \ c -= a; c -= b; c ^= ( b >> 15 ); \ } while (0) #define HASH_JEN(key,keylen,hashv) \ do { \ unsigned _hj_i,_hj_j,_hj_k; \ unsigned const char *_hj_key=(unsigned const char*)(key); \ hashv = 0xfeedbeefu; \ _hj_i = _hj_j = 0x9e3779b9u; \ _hj_k = (unsigned)(keylen); \ while (_hj_k >= 12U) { \ _hj_i += (_hj_key[0] + ( (unsigned)_hj_key[1] << 8 ) \ + ( (unsigned)_hj_key[2] << 16 ) \ + ( (unsigned)_hj_key[3] << 24 ) ); \ _hj_j += (_hj_key[4] + ( (unsigned)_hj_key[5] << 8 ) \ + ( (unsigned)_hj_key[6] << 16 ) \ + ( (unsigned)_hj_key[7] << 24 ) ); \ hashv += (_hj_key[8] + ( (unsigned)_hj_key[9] << 8 ) \ + ( (unsigned)_hj_key[10] << 16 ) \ + ( (unsigned)_hj_key[11] << 24 ) ); \ \ HASH_JEN_MIX(_hj_i, _hj_j, hashv); \ \ _hj_key += 12; \ _hj_k -= 12U; \ } \ hashv += (unsigned)(keylen); \ switch ( _hj_k ) { \ case 11: hashv += ( (unsigned)_hj_key[10] << 24 ); /* FALLTHROUGH */ \ case 10: hashv += ( (unsigned)_hj_key[9] << 16 ); /* FALLTHROUGH */ \ case 9: hashv += ( (unsigned)_hj_key[8] << 8 ); /* FALLTHROUGH */ \ case 8: _hj_j += ( (unsigned)_hj_key[7] << 24 ); /* FALLTHROUGH */ \ case 7: _hj_j += ( (unsigned)_hj_key[6] << 16 ); /* FALLTHROUGH */ \ case 6: _hj_j += ( (unsigned)_hj_key[5] << 8 ); /* FALLTHROUGH */ \ case 5: _hj_j += _hj_key[4]; /* FALLTHROUGH */ \ case 4: _hj_i += ( (unsigned)_hj_key[3] << 24 ); /* FALLTHROUGH */ \ case 3: _hj_i += ( (unsigned)_hj_key[2] << 16 ); /* FALLTHROUGH */ \ case 2: _hj_i += ( (unsigned)_hj_key[1] << 8 ); /* FALLTHROUGH */ \ case 1: _hj_i += _hj_key[0]; /* FALLTHROUGH */ \ default: ; \ } \ HASH_JEN_MIX(_hj_i, _hj_j, hashv); \ } while (0) /* The Paul Hsieh hash function */ #undef get16bits #if (defined(__GNUC__) && defined(__i386__)) || defined(__WATCOMC__) \ || defined(_MSC_VER) || defined (__BORLANDC__) || defined (__TURBOC__) #define get16bits(d) (*((const uint16_t *) (d))) #endif #if !defined (get16bits) #define get16bits(d) ((((uint32_t)(((const uint8_t *)(d))[1])) << 8) \ +(uint32_t)(((const uint8_t *)(d))[0]) ) #endif #define HASH_SFH(key,keylen,hashv) \ do { \ unsigned const char *_sfh_key=(unsigned const char*)(key); \ uint32_t _sfh_tmp, _sfh_len = (uint32_t)keylen; \ \ unsigned _sfh_rem = _sfh_len & 3U; \ _sfh_len >>= 2; \ hashv = 0xcafebabeu; \ \ /* Main loop */ \ for (;_sfh_len > 0U; _sfh_len--) { \ hashv += get16bits (_sfh_key); \ _sfh_tmp = ((uint32_t)(get16bits (_sfh_key+2)) << 11) ^ hashv; \ hashv = (hashv << 16) ^ _sfh_tmp; \ _sfh_key += 2U*sizeof (uint16_t); \ hashv += hashv >> 11; \ } \ \ /* Handle end cases */ \ switch (_sfh_rem) { \ case 3: hashv += get16bits (_sfh_key); \ hashv ^= hashv << 16; \ hashv ^= (uint32_t)(_sfh_key[sizeof (uint16_t)]) << 18; \ hashv += hashv >> 11; \ break; \ case 2: hashv += get16bits (_sfh_key); \ hashv ^= hashv << 11; \ hashv += hashv >> 17; \ break; \ case 1: hashv += *_sfh_key; \ hashv ^= hashv << 10; \ hashv += hashv >> 1; \ break; \ default: ; \ } \ \ /* Force "avalanching" of final 127 bits */ \ hashv ^= hashv << 3; \ hashv += hashv >> 5; \ hashv ^= hashv << 4; \ hashv += hashv >> 17; \ hashv ^= hashv << 25; \ hashv += hashv >> 6; \ } while (0) /* iterate over items in a known bucket to find desired item */ #define HASH_FIND_IN_BKT(tbl,hh,head,keyptr,keylen_in,hashval,out) \ do { \ if ((head).hh_head != NULL) { \ DECLTYPE_ASSIGN(out, ELMT_FROM_HH(tbl, (head).hh_head)); \ } else { \ (out) = NULL; \ } \ while ((out) != NULL) { \ if ((out)->hh.hashv == (hashval) && (out)->hh.keylen == (keylen_in)) { \ if (HASH_KEYCMP((out)->hh.key, keyptr, keylen_in) == 0) { \ break; \ } \ } \ if ((out)->hh.hh_next != NULL) { \ DECLTYPE_ASSIGN(out, ELMT_FROM_HH(tbl, (out)->hh.hh_next)); \ } else { \ (out) = NULL; \ } \ } \ } while (0) /* add an item to a bucket */ #define HASH_ADD_TO_BKT(head,hh,addhh,oomed) \ do { \ UT_hash_bucket *_ha_head = &(head); \ _ha_head->count++; \ (addhh)->hh_next = _ha_head->hh_head; \ (addhh)->hh_prev = NULL; \ if (_ha_head->hh_head != NULL) { \ _ha_head->hh_head->hh_prev = (addhh); \ } \ _ha_head->hh_head = (addhh); \ if ((_ha_head->count >= ((_ha_head->expand_mult + 1U) * HASH_BKT_CAPACITY_THRESH)) \ && !(addhh)->tbl->noexpand) { \ HASH_EXPAND_BUCKETS(addhh,(addhh)->tbl, oomed); \ IF_HASH_NONFATAL_OOM( \ if (oomed) { \ HASH_DEL_IN_BKT(head,addhh); \ } \ ) \ } \ } while (0) /* remove an item from a given bucket */ #define HASH_DEL_IN_BKT(head,delhh) \ do { \ UT_hash_bucket *_hd_head = &(head); \ _hd_head->count--; \ if (_hd_head->hh_head == (delhh)) { \ _hd_head->hh_head = (delhh)->hh_next; \ } \ if ((delhh)->hh_prev) { \ (delhh)->hh_prev->hh_next = (delhh)->hh_next; \ } \ if ((delhh)->hh_next) { \ (delhh)->hh_next->hh_prev = (delhh)->hh_prev; \ } \ } while (0) /* Bucket expansion has the effect of doubling the number of buckets * and redistributing the items into the new buckets. Ideally the * items will distribute more or less evenly into the new buckets * (the extent to which this is true is a measure of the quality of * the hash function as it applies to the key domain). * * With the items distributed into more buckets, the chain length * (item count) in each bucket is reduced. Thus by expanding buckets * the hash keeps a bound on the chain length. This bounded chain * length is the essence of how a hash provides constant time lookup. * * The calculation of tbl->ideal_chain_maxlen below deserves some * explanation. First, keep in mind that we're calculating the ideal * maximum chain length based on the *new* (doubled) bucket count. * In fractions this is just n/b (n=number of items,b=new num buckets). * Since the ideal chain length is an integer, we want to calculate * ceil(n/b). We don't depend on floating point arithmetic in this * hash, so to calculate ceil(n/b) with integers we could write * * ceil(n/b) = (n/b) + ((n%b)?1:0) * * and in fact a previous version of this hash did just that. * But now we have improved things a bit by recognizing that b is * always a power of two. We keep its base 2 log handy (call it lb), * so now we can write this with a bit shift and logical AND: * * ceil(n/b) = (n>>lb) + ( (n & (b-1)) ? 1:0) * */ #define HASH_EXPAND_BUCKETS(hh,tbl,oomed) \ do { \ unsigned _he_bkt; \ unsigned _he_bkt_i; \ struct UT_hash_handle *_he_thh, *_he_hh_nxt; \ UT_hash_bucket *_he_new_buckets, *_he_newbkt; \ _he_new_buckets = (UT_hash_bucket*)uthash_malloc( \ sizeof(struct UT_hash_bucket) * (tbl)->num_buckets * 2U); \ if (!_he_new_buckets) { \ HASH_RECORD_OOM(oomed); \ } else { \ uthash_bzero(_he_new_buckets, \ sizeof(struct UT_hash_bucket) * (tbl)->num_buckets * 2U); \ (tbl)->ideal_chain_maxlen = \ ((tbl)->num_items >> ((tbl)->log2_num_buckets+1U)) + \ ((((tbl)->num_items & (((tbl)->num_buckets*2U)-1U)) != 0U) ? 1U : 0U); \ (tbl)->nonideal_items = 0; \ for (_he_bkt_i = 0; _he_bkt_i < (tbl)->num_buckets; _he_bkt_i++) { \ _he_thh = (tbl)->buckets[ _he_bkt_i ].hh_head; \ while (_he_thh != NULL) { \ _he_hh_nxt = _he_thh->hh_next; \ HASH_TO_BKT(_he_thh->hashv, (tbl)->num_buckets * 2U, _he_bkt); \ _he_newbkt = &(_he_new_buckets[_he_bkt]); \ if (++(_he_newbkt->count) > (tbl)->ideal_chain_maxlen) { \ (tbl)->nonideal_items++; \ if (_he_newbkt->count > _he_newbkt->expand_mult * (tbl)->ideal_chain_maxlen) { \ _he_newbkt->expand_mult++; \ } \ } \ _he_thh->hh_prev = NULL; \ _he_thh->hh_next = _he_newbkt->hh_head; \ if (_he_newbkt->hh_head != NULL) { \ _he_newbkt->hh_head->hh_prev = _he_thh; \ } \ _he_newbkt->hh_head = _he_thh; \ _he_thh = _he_hh_nxt; \ } \ } \ uthash_free((tbl)->buckets, (tbl)->num_buckets * sizeof(struct UT_hash_bucket)); \ (tbl)->num_buckets *= 2U; \ (tbl)->log2_num_buckets++; \ (tbl)->buckets = _he_new_buckets; \ (tbl)->ineff_expands = ((tbl)->nonideal_items > ((tbl)->num_items >> 1)) ? \ ((tbl)->ineff_expands+1U) : 0U; \ if ((tbl)->ineff_expands > 1U) { \ (tbl)->noexpand = 1; \ uthash_noexpand_fyi(tbl); \ } \ uthash_expand_fyi(tbl); \ } \ } while (0) /* This is an adaptation of Simon Tatham's O(n log(n)) mergesort */ /* Note that HASH_SORT assumes the hash handle name to be hh. * HASH_SRT was added to allow the hash handle name to be passed in. */ #define HASH_SORT(head,cmpfcn) HASH_SRT(hh,head,cmpfcn) #define HASH_SRT(hh,head,cmpfcn) \ do { \ unsigned _hs_i; \ unsigned _hs_looping,_hs_nmerges,_hs_insize,_hs_psize,_hs_qsize; \ struct UT_hash_handle *_hs_p, *_hs_q, *_hs_e, *_hs_list, *_hs_tail; \ if (head != NULL) { \ _hs_insize = 1; \ _hs_looping = 1; \ _hs_list = &((head)->hh); \ while (_hs_looping != 0U) { \ _hs_p = _hs_list; \ _hs_list = NULL; \ _hs_tail = NULL; \ _hs_nmerges = 0; \ while (_hs_p != NULL) { \ _hs_nmerges++; \ _hs_q = _hs_p; \ _hs_psize = 0; \ for (_hs_i = 0; _hs_i < _hs_insize; ++_hs_i) { \ _hs_psize++; \ _hs_q = ((_hs_q->next != NULL) ? \ HH_FROM_ELMT((head)->hh.tbl, _hs_q->next) : NULL); \ if (_hs_q == NULL) { \ break; \ } \ } \ _hs_qsize = _hs_insize; \ while ((_hs_psize != 0U) || ((_hs_qsize != 0U) && (_hs_q != NULL))) { \ if (_hs_psize == 0U) { \ _hs_e = _hs_q; \ _hs_q = ((_hs_q->next != NULL) ? \ HH_FROM_ELMT((head)->hh.tbl, _hs_q->next) : NULL); \ _hs_qsize--; \ } else if ((_hs_qsize == 0U) || (_hs_q == NULL)) { \ _hs_e = _hs_p; \ if (_hs_p != NULL) { \ _hs_p = ((_hs_p->next != NULL) ? \ HH_FROM_ELMT((head)->hh.tbl, _hs_p->next) : NULL); \ } \ _hs_psize--; \ } else if ((cmpfcn( \ DECLTYPE(head)(ELMT_FROM_HH((head)->hh.tbl, _hs_p)), \ DECLTYPE(head)(ELMT_FROM_HH((head)->hh.tbl, _hs_q)) \ )) <= 0) { \ _hs_e = _hs_p; \ if (_hs_p != NULL) { \ _hs_p = ((_hs_p->next != NULL) ? \ HH_FROM_ELMT((head)->hh.tbl, _hs_p->next) : NULL); \ } \ _hs_psize--; \ } else { \ _hs_e = _hs_q; \ _hs_q = ((_hs_q->next != NULL) ? \ HH_FROM_ELMT((head)->hh.tbl, _hs_q->next) : NULL); \ _hs_qsize--; \ } \ if ( _hs_tail != NULL ) { \ _hs_tail->next = ((_hs_e != NULL) ? \ ELMT_FROM_HH((head)->hh.tbl, _hs_e) : NULL); \ } else { \ _hs_list = _hs_e; \ } \ if (_hs_e != NULL) { \ _hs_e->prev = ((_hs_tail != NULL) ? \ ELMT_FROM_HH((head)->hh.tbl, _hs_tail) : NULL); \ } \ _hs_tail = _hs_e; \ } \ _hs_p = _hs_q; \ } \ if (_hs_tail != NULL) { \ _hs_tail->next = NULL; \ } \ if (_hs_nmerges <= 1U) { \ _hs_looping = 0; \ (head)->hh.tbl->tail = _hs_tail; \ DECLTYPE_ASSIGN(head, ELMT_FROM_HH((head)->hh.tbl, _hs_list)); \ } \ _hs_insize *= 2U; \ } \ HASH_FSCK(hh, head, "HASH_SRT"); \ } \ } while (0) /* This function selects items from one hash into another hash. * The end result is that the selected items have dual presence * in both hashes. There is no copy of the items made; rather * they are added into the new hash through a secondary hash * hash handle that must be present in the structure. */ #define HASH_SELECT(hh_dst, dst, hh_src, src, cond) \ do { \ unsigned _src_bkt, _dst_bkt; \ void *_last_elt = NULL, *_elt; \ UT_hash_handle *_src_hh, *_dst_hh, *_last_elt_hh=NULL; \ ptrdiff_t _dst_hho = ((char*)(&(dst)->hh_dst) - (char*)(dst)); \ if ((src) != NULL) { \ for (_src_bkt=0; _src_bkt < (src)->hh_src.tbl->num_buckets; _src_bkt++) { \ for (_src_hh = (src)->hh_src.tbl->buckets[_src_bkt].hh_head; \ _src_hh != NULL; \ _src_hh = _src_hh->hh_next) { \ _elt = ELMT_FROM_HH((src)->hh_src.tbl, _src_hh); \ if (cond(_elt)) { \ IF_HASH_NONFATAL_OOM( int _hs_oomed = 0; ) \ _dst_hh = (UT_hash_handle*)(void*)(((char*)_elt) + _dst_hho); \ _dst_hh->key = _src_hh->key; \ _dst_hh->keylen = _src_hh->keylen; \ _dst_hh->hashv = _src_hh->hashv; \ _dst_hh->prev = _last_elt; \ _dst_hh->next = NULL; \ if (_last_elt_hh != NULL) { \ _last_elt_hh->next = _elt; \ } \ if ((dst) == NULL) { \ DECLTYPE_ASSIGN(dst, _elt); \ HASH_MAKE_TABLE(hh_dst, dst, _hs_oomed); \ IF_HASH_NONFATAL_OOM( \ if (_hs_oomed) { \ uthash_nonfatal_oom(_elt); \ (dst) = NULL; \ continue; \ } \ ) \ } else { \ _dst_hh->tbl = (dst)->hh_dst.tbl; \ } \ HASH_TO_BKT(_dst_hh->hashv, _dst_hh->tbl->num_buckets, _dst_bkt); \ HASH_ADD_TO_BKT(_dst_hh->tbl->buckets[_dst_bkt], hh_dst, _dst_hh, _hs_oomed); \ (dst)->hh_dst.tbl->num_items++; \ IF_HASH_NONFATAL_OOM( \ if (_hs_oomed) { \ HASH_ROLLBACK_BKT(hh_dst, dst, _dst_hh); \ HASH_DELETE_HH(hh_dst, dst, _dst_hh); \ _dst_hh->tbl = NULL; \ uthash_nonfatal_oom(_elt); \ continue; \ } \ ) \ HASH_BLOOM_ADD(_dst_hh->tbl, _dst_hh->hashv); \ _last_elt = _elt; \ _last_elt_hh = _dst_hh; \ } \ } \ } \ } \ HASH_FSCK(hh_dst, dst, "HASH_SELECT"); \ } while (0) #define HASH_CLEAR(hh,head) \ do { \ if ((head) != NULL) { \ HASH_BLOOM_FREE((head)->hh.tbl); \ uthash_free((head)->hh.tbl->buckets, \ (head)->hh.tbl->num_buckets*sizeof(struct UT_hash_bucket)); \ uthash_free((head)->hh.tbl, sizeof(UT_hash_table)); \ (head) = NULL; \ } \ } while (0) #define HASH_OVERHEAD(hh,head) \ (((head) != NULL) ? ( \ (size_t)(((head)->hh.tbl->num_items * sizeof(UT_hash_handle)) + \ ((head)->hh.tbl->num_buckets * sizeof(UT_hash_bucket)) + \ sizeof(UT_hash_table) + \ (HASH_BLOOM_BYTELEN))) : 0U) #ifdef NO_DECLTYPE #define HASH_ITER(hh,head,el,tmp) \ for(((el)=(head)), ((*(char**)(&(tmp)))=(char*)((head!=NULL)?(head)->hh.next:NULL)); \ (el) != NULL; ((el)=(tmp)), ((*(char**)(&(tmp)))=(char*)((tmp!=NULL)?(tmp)->hh.next:NULL))) #else #define HASH_ITER(hh,head,el,tmp) \ for(((el)=(head)), ((tmp)=DECLTYPE(el)((head!=NULL)?(head)->hh.next:NULL)); \ (el) != NULL; ((el)=(tmp)), ((tmp)=DECLTYPE(el)((tmp!=NULL)?(tmp)->hh.next:NULL))) #endif /* obtain a count of items in the hash */ #define HASH_COUNT(head) HASH_CNT(hh,head) #define HASH_CNT(hh,head) ((head != NULL)?((head)->hh.tbl->num_items):0U) typedef struct UT_hash_bucket { struct UT_hash_handle *hh_head; unsigned count; /* expand_mult is normally set to 0. In this situation, the max chain length * threshold is enforced at its default value, HASH_BKT_CAPACITY_THRESH. (If * the bucket's chain exceeds this length, bucket expansion is triggered). * However, setting expand_mult to a non-zero value delays bucket expansion * (that would be triggered by additions to this particular bucket) * until its chain length reaches a *multiple* of HASH_BKT_CAPACITY_THRESH. * (The multiplier is simply expand_mult+1). The whole idea of this * multiplier is to reduce bucket expansions, since they are expensive, in * situations where we know that a particular bucket tends to be overused. * It is better to let its chain length grow to a longer yet-still-bounded * value, than to do an O(n) bucket expansion too often. */ unsigned expand_mult; } UT_hash_bucket; /* random signature used only to find hash tables in external analysis */ #define HASH_SIGNATURE 0xa0111fe1u #define HASH_BLOOM_SIGNATURE 0xb12220f2u typedef struct UT_hash_table { UT_hash_bucket *buckets; unsigned num_buckets, log2_num_buckets; unsigned num_items; struct UT_hash_handle *tail; /* tail hh in app order, for fast append */ ptrdiff_t hho; /* hash handle offset (byte pos of hash handle in element */ /* in an ideal situation (all buckets used equally), no bucket would have * more than ceil(#items/#buckets) items. that's the ideal chain length. */ unsigned ideal_chain_maxlen; /* nonideal_items is the number of items in the hash whose chain position * exceeds the ideal chain maxlen. these items pay the penalty for an uneven * hash distribution; reaching them in a chain traversal takes >ideal steps */ unsigned nonideal_items; /* ineffective expands occur when a bucket doubling was performed, but * afterward, more than half the items in the hash had nonideal chain * positions. If this happens on two consecutive expansions we inhibit any * further expansion, as it's not helping; this happens when the hash * function isn't a good fit for the key domain. When expansion is inhibited * the hash will still work, albeit no longer in constant time. */ unsigned ineff_expands, noexpand; uint32_t signature; /* used only to find hash tables in external analysis */ #ifdef HASH_BLOOM uint32_t bloom_sig; /* used only to test bloom exists in external analysis */ uint8_t *bloom_bv; uint8_t bloom_nbits; #endif } UT_hash_table; typedef struct UT_hash_handle { struct UT_hash_table *tbl; void *prev; /* prev element in app order */ void *next; /* next element in app order */ struct UT_hash_handle *hh_prev; /* previous hh in bucket order */ struct UT_hash_handle *hh_next; /* next hh in bucket order */ const void *key; /* ptr to enclosing struct's key */ unsigned keylen; /* enclosing struct's key len */ unsigned hashv; /* result of hash-fcn(key) */ } UT_hash_handle; #endif /* UTHASH_H */ nvtop-3.2.0/manpage/000077500000000000000000000000001477175131100143015ustar00rootroot00000000000000nvtop-3.2.0/manpage/nvtop.in000066400000000000000000000075671477175131100160160ustar00rootroot00000000000000.\" Manpage for nvtop .\" Contact maxime.schmitt91@gmail.com .TH nvtop 1 "@TODAY_MANPAGE@" "Version @nvtop_VERSION_MAJOR@.@nvtop_VERSION_MINOR@.@nvtop_VERSION_PATCH@" "nvtop command" .SH NAME nvtop \- interactive GPU process viewer .SH SYNOPSIS .B nvtop \fR[\fB\-hv\fR] \fR[\fB\-d\fR \fIdelay\fR] .SH DESCRIPTION nvtop is a ncurses\-based GPU status viewer for AMD, Intel and NVIDIA GPUs. .SH COMMAND\-LINE OPTIONS .TP .BR \-d ", " \-\-delay =\fIdelay\fR Delay between updates, in tenths of seconds (\fIdelay\fR * 0.1s). .TP .BR \-h ", " \-\-help Print the help and exit. .TP .BR \-C ", " \-\-no\-color Monochrome mode. .TP .BR \-f ", " \-\-freedom\-unit Use fahrenheit as temperature scale. .TP .BR \-E ", " \-\-encode\-hide =\fIseconds\fR Modify the setting for the encode/decode auto-hide timer. Always visible if negative. Default to 30 seconds. .TP .BR \-r ", " \-\-reverse\-abs Reverse abscissa: switch the plot data order from "old --- recent" (default) to "recent --- old". .TP .BR \-p ", " \-\-no\-plot Show only one bar plot corresponding to the maximum of all GPUs. .TP .BR \-v ", " \-\-version Print the version and exit. .SH INTERACTIVE SETUP WINDOW .TP You can enter the setup utility by pressing \fBF2\fR to view and modify the following interface options: .TP .I General This section deals with general interface options. \fBColor support\fR and \fBinterface update interval\fR can be modified. .TP .I Devices This section deals with the devices display (top of the interface). You can \fBswitch the temperature scale to fahrenheit\fR and \fBset the encoder/decoder hiding timer\fR. .TP .I Chart This section deals with the line plots (middle of the interface). You can \fBreverse the plot direction\fR and \fBselect which metric is being shown in the plots\fR. .TP .I Processes This section deals with the process list (bottom of the interface). You can \fBselect the sort order\fR, \fBselect the metric by which to sort the processes by\fR and \fBselect which metric is displayed\fR. .SH INTERACTIVE COMMANDS .TP The following commands are available while in nvtop: .TP .BR Up Select (highlight) the previous process. .TP .BR Down Select (highlight) the next process. .TP .BR Left\ /\ Right Scroll in the process row. .TP .BR + Sort increasingly. .TP .BR - Sort decreasingly. .TP .BR F2 Enter the setup utility to modify the interface options. .TP .BR F12 Save the current interface options to persistent storage. See the \fBCONFIGURATION FILE\fR section. .TP .BR F9 "Kill" process: Select a signal to send to the highlighted process. .TP .BR F6 Sort: Select the field for sorting. The current sort field is highlighted inside the header bar. .TP .BR F10 ", " q ", " Esc Quit. .SH DYNAMIC METERS .TP When the video encoder (ENC) and decoder (DEC) of the GPU are in use, new percentage meters will appear next to the GPU utilization bar. They will disappear automatically after some time of inactivity (see option -E). .SH CONFIGURATION FILE .LP The configuration file follows the \fIXDG Base Directory Specification\fR and is stored at \fI$XDG_CONFIG_HOME/nvtop/interface.ini\fR. The location defaults to \fI$HOME/.config/nvtop/interface.ini\fR if the XDG location is not defined. .LP Do not edit this file. The file is automatically created or updated upon toggling the interface saving key \fBF12\fR. .LP The configuration is loaded during program initialization. If no configuration file is present, default options are used. .SH MEMORY SIZES .TP Memory sizes in nvtop are displayed as multiples of 1024 bytes or 1 KiB. .SH BUGS .TP .BR "Some fields are shown as N/A" Ask AMD or NVIDIA for better support of your hardware! If your card uses the AMDGPU driver, a more recent kernel might have improved support. .TP .BR "Compatibility issues" Does not work with nouveau driver stack and older NVIDIA GPU for the time being. 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WX^m#0@Um@*>.g| ̃ճw׌=wx-7UQ]nNJ9#o>qơ( gW~\ueٲetk_31S%3\o3>69`2aYzWtw7q\C=D޽ ڗ(>}#*@2Bi_3iEv6\fܞxB*Z;vPPPĉ}оD̝;W2P;_p})yQįt\[d2U؃%B܎קi!B!i;=|:PIENDB`nvtop-3.2.0/snap/000077500000000000000000000000001477175131100136325ustar00rootroot00000000000000nvtop-3.2.0/snap/snapcraft.yaml000066400000000000000000000041621477175131100165020ustar00rootroot00000000000000name: nvtop base: core22 adopt-info: nvtop summary: 'GPUs monitoring tool for AMD, Intel and NVIDIA' description: | Nvtop stands for Neat Videocard TOP, a (h)top like task monitor for AMD, Intel and NVIDIA GPUs. It can handle multiple GPUs and print information about them in a htop familiar way. license: GPL-3.0-or-later issues: https://github.com/Syllo/nvtop/issues icon: desktop/nvtop.svg grade: stable confinement: strict architectures: - build-on: amd64 - build-on: arm64 - build-on: armhf - build-on: ppc64el - build-on: s390x compression: lzo apps: nvtop: command: usr/bin/nvtop desktop: usr/share/applications/nvtop.desktop plugs: - opengl - home - hardware-observe - process-control - system-observe # - kubernetes-support # Temporarily required for nvtop to display AMD GPU processes. Once apparmor rule to allow access to @{PROC}/[0-9]*/fdinfo/ is added to system-observe, this can be removed. # layout: # /usr/share/libdrm: # symlink: $SNAP/usr/share/libdrm parts: libdrm: source: https://gitlab.freedesktop.org/mesa/drm.git source-tag: libdrm-2.4.113 plugin: meson meson-parameters: - --prefix=/usr - --sysconfdir=/etc - --libdir=lib/$CRAFT_ARCH_TRIPLET - -Dradeon=enabled - -Damdgpu=enabled - -Dudev=true - -Dnouveau=enabled - -Dintel=enabled build-packages: - meson - pkg-config - libudev-dev - libpciaccess-dev stage-packages: - libpciaccess0 prime: - -usr/include - -usr/lib/$CRAFT_ARCH_TRIPLET/pkgconfig nvtop: after: [ libdrm ] source: . plugin: cmake cmake-parameters: - -DCMAKE_INSTALL_PREFIX=/usr - -DNVIDIA_SUPPORT=ON - -DAMDGPU_SUPPORT=ON - -DINTEL_SUPPORT=ON override-pull: | set -eux craftctl default VERSION="$(git describe --tags $(git rev-list --tags --max-count=1))" craftctl set version=$VERSION git checkout $VERSION build-snaps: - cmake build-packages: - gcc - libncurses-dev - libsystemd-dev stage-packages: - libncurses6 - libncursesw6 - libsystemd0 prime: - -usr/share/doc nvtop-3.2.0/src/000077500000000000000000000000001477175131100134605ustar00rootroot00000000000000nvtop-3.2.0/src/CMakeLists.txt000066400000000000000000000114311477175131100162200ustar00rootroot00000000000000include(CheckCSourceCompiles) configure_file( "${PROJECT_SOURCE_DIR}/include/nvtop/version.h.in" "${PROJECT_BINARY_DIR}/include/nvtop/version.h" IMMEDIATE @ONLY) add_executable(nvtop nvtop.c interface.c interface_layout_selection.c interface_options.c interface_setup_win.c interface_ring_buffer.c extract_gpuinfo.c time.c plot.c ini.c ) check_c_source_compiles( " #include int main() { int *buf = NULL; buf = reallocarray(buf, 15, sizeof(*buf)); return EXIT_SUCCESS; } " HAS_REALLOCARRAY ) if(HAS_REALLOCARRAY) target_compile_definitions(nvtop PRIVATE HAS_REALLOCARRAY) endif() find_package(UDev) find_package(Systemd) option(USE_LIBUDEV_OVER_LIBSYSTEMD "Use libudev, even if libsystemd is present" OFF) if(UNIX AND NOT APPLE) target_sources(nvtop PRIVATE get_process_info_linux.c extract_processinfo_fdinfo.c info_messages_linux.c) elseif(APPLE) target_sources(nvtop PRIVATE get_process_info_mac.c extract_processinfo_mac.c info_messages_mac.c) endif() if(NVIDIA_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_nvidia.c) endif() if(ASCEND_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_ascend.c) set(DCMI_LIBRARY_PATH /usr/local/Ascend/driver/lib64/driver) target_link_libraries(nvtop PRIVATE "${DCMI_LIBRARY_PATH}/libdcmi.so") endif() if(AMDGPU_SUPPORT OR INTEL_SUPPORT OR V3D_SUPPORT) if((SYSTEMD_FOUND AND UDEV_FOUND AND USE_LIBUDEV_OVER_LIBSYSTEMD) OR(NOT SYSTEMD_FOUND AND UDEV_FOUND)) target_compile_definitions(nvtop PRIVATE USING_LIBUDEV) target_link_libraries(nvtop PRIVATE udev) elseif(SYSTEMD_FOUND) target_compile_definitions(nvtop PRIVATE USING_LIBSYSTEMD) target_link_libraries(nvtop PRIVATE systemd) else() message(FATAL_ERROR "Neither libsystemd nor libudev were found; These are required for AMDGPU, INTEL and V3D support") endif() target_sources(nvtop PRIVATE device_discovery_linux.c) endif() if(AMDGPU_SUPPORT OR INTEL_SUPPORT OR MSM_SUPPORT OR PANFROST_SUPPORT OR PANTHOR_SUPPORT) # Search for libdrm for AMDGPU support find_package(Libdrm) if(Libdrm_FOUND) message(STATUS "Found libdrm; Enabling support") target_include_directories(nvtop PRIVATE ${Libdrm_INCLUDE_DIRS}) else() message(FATAL_ERROR "libdrm not found; This library is required for AMDGPU, INTEL, MSM, PANFROST and PANTHOR support") # CMake will exit if libdrm is not found endif() endif() if (AMDGPU_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_amdgpu.c) target_sources(nvtop PRIVATE extract_gpuinfo_amdgpu_utils.c) endif() if (MSM_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_msm.c) target_sources(nvtop PRIVATE extract_gpuinfo_msm_utils.c) endif() if(INTEL_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_intel.c) target_sources(nvtop PRIVATE extract_gpuinfo_intel_i915.c) target_sources(nvtop PRIVATE extract_gpuinfo_intel_xe.c) endif() if(V3D_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_v3d.c) target_sources(nvtop PRIVATE extract_gpuinfo_v3d_utils.c) endif() if(APPLE_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_apple.m) target_link_libraries(nvtop PRIVATE "-framework Metal" "-framework AppKit" "-framework Foundation" "-framework QuartzCore" "-framework IOKit") endif() if (PANFROST_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_panfrost.c) target_sources(nvtop PRIVATE extract_gpuinfo_panfrost_utils.c) endif() if (PANTHOR_SUPPORT) target_sources(nvtop PRIVATE extract_gpuinfo_panthor.c) target_sources(nvtop PRIVATE extract_gpuinfo_panthor_utils.c) endif() if ((PANFROST_SUPPORT) OR (PANTHOR_SUPPORT)) target_sources(nvtop PRIVATE extract_gpuinfo_mali_common.c) endif() if(TPU_SUPPORT) find_library(LIBTPUINFO NAMES libtpuinfo.so PATHS /usr/lib /usr/lib64 /usr/local/lib /usr/local/lib64 HINTS ${CMAKE_INSTALL_PREFIX}/lib ${CMAKE_INSTALL_PREFIX}/lib64 lib lib64 ) if (NOT LIBTPUINFO) message(WARNING "TPU Support enabled, but libtpuinfo.so not found in ldconfig path, we will not be able to read TPU usage") set(TPU_SUPPORT_DEFAULT OFF) endif() target_sources(nvtop PRIVATE extract_gpuinfo_tpu.c) endif() target_include_directories(nvtop PRIVATE ${PROJECT_SOURCE_DIR}/include ${PROJECT_BINARY_DIR}/include) find_package(Sanitizers) add_sanitizers(nvtop) set_property(TARGET nvtop PROPERTY C_STANDARD 11) target_compile_definitions(nvtop PRIVATE _GNU_SOURCE) target_link_libraries(nvtop PRIVATE ncurses m ${CMAKE_DL_LIBS}) install(TARGETS nvtop RUNTIME DESTINATION bin) include(compile-flags-helpers) include(${PROJECT_SOURCE_DIR}/cmake/optimization_flags.cmake) add_compiler_option_to_target_type(nvtop Debug PRIVATE ${ADDITIONAL_DEBUG_COMPILE_OPTIONS}) add_linker_option_to_all_but_target_type(nvtop dummy PRIVATE ${ADDITIONAL_RELEASE_LINK_OPTIONS}) nvtop-3.2.0/src/amdgpu_ids.h000066400000000000000000000552221477175131100157530ustar00rootroot00000000000000 /* * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. * * This file is modified from libdrm. MIT License. * * URL: https://gitlab.freedesktop.org/mesa/drm/-/blob/main/data/amdgpu.ids * The amdgpu_ids has to be modified after new GPU release. * */ #ifndef AMDGPU_IDS_H #define AMDGPU_IDS_H struct amdgpu_id_struct { uint32_t asic_id; uint32_t pci_rev_id; const char *name; }; static struct amdgpu_id_struct amdgpu_ids[] = { {0x1309, 0x00, "AMD Radeon R7 Graphics"}, {0x130A, 0x00, "AMD Radeon R6 Graphics"}, {0x130B, 0x00, "AMD Radeon R4 Graphics"}, {0x130C, 0x00, "AMD Radeon R7 Graphics"}, {0x130D, 0x00, "AMD Radeon R6 Graphics"}, {0x130E, 0x00, "AMD Radeon R5 Graphics"}, {0x130F, 0x00, "AMD Radeon R7 Graphics"}, {0x130F, 0xD4, "AMD Radeon R7 Graphics"}, {0x130F, 0xD5, "AMD Radeon R7 Graphics"}, {0x130F, 0xD6, "AMD Radeon R7 Graphics"}, {0x130F, 0xD7, "AMD Radeon R7 Graphics"}, {0x1313, 0x00, "AMD Radeon R7 Graphics"}, {0x1313, 0xD4, "AMD Radeon R7 Graphics"}, {0x1313, 0xD5, "AMD Radeon R7 Graphics"}, {0x1313, 0xD6, "AMD Radeon R7 Graphics"}, {0x1315, 0x00, "AMD Radeon R5 Graphics"}, {0x1315, 0xD4, "AMD Radeon R5 Graphics"}, {0x1315, 0xD5, "AMD Radeon R5 Graphics"}, {0x1315, 0xD6, "AMD Radeon R5 Graphics"}, {0x1315, 0xD7, "AMD Radeon R5 Graphics"}, {0x1316, 0x00, "AMD Radeon R5 Graphics"}, {0x1318, 0x00, "AMD Radeon R5 Graphics"}, {0x131B, 0x00, "AMD Radeon R4 Graphics"}, {0x131C, 0x00, "AMD Radeon R7 Graphics"}, {0x131D, 0x00, "AMD Radeon R6 Graphics"}, {0x15D8, 0x00, "AMD Radeon RX Vega 8 Graphics WS"}, {0x15D8, 0x91, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0x91, "AMD Ryzen Embedded R1606G with Radeon Vega Gfx"}, {0x15D8, 0x92, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0x92, "AMD Ryzen Embedded R1505G with Radeon Vega Gfx"}, {0x15D8, 0x93, "AMD Radeon Vega 1 Graphics"}, {0x15D8, 0xA1, "AMD Radeon Vega 10 Graphics"}, {0x15D8, 0xA2, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xA3, "AMD Radeon Vega 6 Graphics"}, {0x15D8, 0xA4, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xB1, "AMD Radeon Vega 10 Graphics"}, {0x15D8, 0xB2, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xB3, "AMD Radeon Vega 6 Graphics"}, {0x15D8, 0xB4, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xC1, "AMD Radeon Vega 10 Graphics"}, {0x15D8, 0xC2, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xC3, "AMD Radeon Vega 6 Graphics"}, {0x15D8, 0xC4, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xC5, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xC8, "AMD Radeon Vega 11 Graphics"}, {0x15D8, 0xC9, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xCA, "AMD Radeon Vega 11 Graphics"}, {0x15D8, 0xCB, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xCC, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xCE, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xCF, "AMD Ryzen Embedded R1305G with Radeon Vega Gfx"}, {0x15D8, 0xD1, "AMD Radeon Vega 10 Graphics"}, {0x15D8, 0xD2, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xD3, "AMD Radeon Vega 6 Graphics"}, {0x15D8, 0xD4, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xD8, "AMD Radeon Vega 11 Graphics"}, {0x15D8, 0xD9, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xDA, "AMD Radeon Vega 11 Graphics"}, {0x15D8, 0xDB, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xDB, "AMD Radeon Vega 8 Graphics"}, {0x15D8, 0xDC, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xDD, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xDE, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xDF, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xE3, "AMD Radeon Vega 3 Graphics"}, {0x15D8, 0xE4, "AMD Ryzen Embedded R1102G with Radeon Vega Gfx"}, {0x15DD, 0x81, "AMD Ryzen Embedded V1807B with Radeon Vega Gfx"}, {0x15DD, 0x82, "AMD Ryzen Embedded V1756B with Radeon Vega Gfx"}, {0x15DD, 0x83, "AMD Ryzen Embedded V1605B with Radeon Vega Gfx"}, {0x15DD, 0x84, "AMD Radeon Vega 6 Graphics"}, {0x15DD, 0x85, "AMD Ryzen Embedded V1202B with Radeon Vega Gfx"}, {0x15DD, 0x86, "AMD Radeon Vega 11 Graphics"}, {0x15DD, 0x88, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xC1, "AMD Radeon Vega 11 Graphics"}, {0x15DD, 0xC2, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xC3, "AMD Radeon Vega 3 / 10 Graphics"}, {0x15DD, 0xC4, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xC5, "AMD Radeon Vega 3 Graphics"}, {0x15DD, 0xC6, "AMD Radeon Vega 11 Graphics"}, {0x15DD, 0xC8, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xC9, "AMD Radeon Vega 11 Graphics"}, {0x15DD, 0xCA, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xCB, "AMD Radeon Vega 3 Graphics"}, {0x15DD, 0xCC, "AMD Radeon Vega 6 Graphics"}, {0x15DD, 0xCE, "AMD Radeon Vega 3 Graphics"}, {0x15DD, 0xCF, "AMD Radeon Vega 3 Graphics"}, {0x15DD, 0xD0, "AMD Radeon Vega 10 Graphics"}, {0x15DD, 0xD1, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xD3, "AMD Radeon Vega 11 Graphics"}, {0x15DD, 0xD5, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xD6, "AMD Radeon Vega 11 Graphics"}, {0x15DD, 0xD7, "AMD Radeon Vega 8 Graphics"}, {0x15DD, 0xD8, "AMD Radeon Vega 3 Graphics"}, {0x15DD, 0xD9, "AMD Radeon Vega 6 Graphics"}, {0x15DD, 0xE1, "AMD Radeon Vega 3 Graphics"}, {0x15DD, 0xE2, "AMD Radeon Vega 3 Graphics"}, {0x163F, 0xAE, "AMD Custom GPU 0405"}, {0x6600, 0x00, "AMD Radeon HD 8600 / 8700M"}, {0x6600, 0x81, "AMD Radeon R7 M370"}, {0x6601, 0x00, "AMD Radeon HD 8500M / 8700M"}, {0x6604, 0x00, "AMD Radeon R7 M265 Series"}, {0x6604, 0x81, "AMD Radeon R7 M350"}, {0x6605, 0x00, "AMD Radeon R7 M260 Series"}, {0x6605, 0x81, "AMD Radeon R7 M340"}, {0x6606, 0x00, "AMD Radeon HD 8790M"}, {0x6607, 0x00, "AMD Radeon R5 M240"}, {0x6608, 0x00, "AMD FirePro W2100"}, {0x6610, 0x00, "AMD Radeon R7 200 Series"}, {0x6610, 0x81, "AMD Radeon R7 350"}, {0x6610, 0x83, "AMD Radeon R5 340"}, {0x6610, 0x87, "AMD Radeon R7 200 Series"}, {0x6611, 0x00, "AMD Radeon R7 200 Series"}, {0x6611, 0x87, "AMD Radeon R7 200 Series"}, {0x6613, 0x00, "AMD Radeon R7 200 Series"}, {0x6617, 0x00, "AMD Radeon R7 240 Series"}, {0x6617, 0x87, "AMD Radeon R7 200 Series"}, {0x6617, 0xC7, "AMD Radeon R7 240 Series"}, {0x6640, 0x00, "AMD Radeon HD 8950"}, {0x6640, 0x80, "AMD Radeon R9 M380"}, {0x6646, 0x00, "AMD Radeon R9 M280X"}, {0x6646, 0x80, "AMD Radeon R9 M385"}, {0x6646, 0x80, "AMD Radeon R9 M470X"}, {0x6647, 0x00, "AMD Radeon R9 M200X Series"}, {0x6647, 0x80, "AMD Radeon R9 M380"}, {0x6649, 0x00, "AMD FirePro W5100"}, {0x6658, 0x00, "AMD Radeon R7 200 Series"}, {0x665C, 0x00, "AMD Radeon HD 7700 Series"}, {0x665D, 0x00, "AMD Radeon R7 200 Series"}, {0x665F, 0x81, "AMD Radeon R7 360 Series"}, {0x6660, 0x00, "AMD Radeon HD 8600M Series"}, {0x6660, 0x81, "AMD Radeon R5 M335"}, {0x6660, 0x83, "AMD Radeon R5 M330"}, {0x6663, 0x00, "AMD Radeon HD 8500M Series"}, {0x6663, 0x83, "AMD Radeon R5 M320"}, {0x6664, 0x00, "AMD Radeon R5 M200 Series"}, {0x6665, 0x00, "AMD Radeon R5 M230 Series"}, {0x6665, 0x83, "AMD Radeon R5 M320"}, {0x6665, 0xC3, "AMD Radeon R5 M435"}, {0x6666, 0x00, "AMD Radeon R5 M200 Series"}, {0x6667, 0x00, "AMD Radeon R5 M200 Series"}, {0x666F, 0x00, "AMD Radeon HD 8500M"}, {0x66A1, 0x02, "AMD Instinct MI60 / MI50"}, {0x66A1, 0x06, "AMD Radeon Pro VII"}, {0x66AF, 0xC1, "AMD Radeon VII"}, {0x6780, 0x00, "AMD FirePro W9000"}, {0x6784, 0x00, "ATI FirePro V (FireGL V) Graphics Adapter"}, {0x6788, 0x00, "ATI FirePro V (FireGL V) Graphics Adapter"}, {0x678A, 0x00, "AMD FirePro W8000"}, {0x6798, 0x00, "AMD Radeon R9 200 / HD 7900 Series"}, {0x6799, 0x00, "AMD Radeon HD 7900 Series"}, {0x679A, 0x00, "AMD Radeon HD 7900 Series"}, {0x679B, 0x00, "AMD Radeon HD 7900 Series"}, {0x679E, 0x00, "AMD Radeon HD 7800 Series"}, {0x67A0, 0x00, "AMD Radeon FirePro W9100"}, {0x67A1, 0x00, "AMD Radeon FirePro W8100"}, {0x67B0, 0x00, "AMD Radeon R9 200 Series"}, {0x67B0, 0x80, "AMD Radeon R9 390 Series"}, {0x67B1, 0x00, "AMD Radeon R9 200 Series"}, {0x67B1, 0x80, "AMD Radeon R9 390 Series"}, {0x67B9, 0x00, "AMD Radeon R9 200 Series"}, {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"}, {0x67C0, 0x80, "AMD Radeon E9550"}, {0x67C2, 0x01, "AMD Radeon Pro V7350x2"}, {0x67C2, 0x02, "AMD Radeon Pro V7300X"}, {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"}, {0x67C4, 0x80, "AMD Radeon E9560 / E9565 Graphics"}, {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"}, {0x67C7, 0x80, "AMD Radeon E9390 Graphics"}, {0x67D0, 0x01, "AMD Radeon Pro V7350x2"}, {0x67D0, 0x02, "AMD Radeon Pro V7300X"}, {0x67DF, 0xC0, "AMD Radeon Pro 580X"}, {0x67DF, 0xC1, "AMD Radeon RX 580 Series"}, {0x67DF, 0xC2, "AMD Radeon RX 570 Series"}, {0x67DF, 0xC3, "AMD Radeon RX 580 Series"}, {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"}, {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"}, {0x67DF, 0xC6, "AMD Radeon RX 570 Series"}, {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"}, {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"}, {0x67DF, 0xD7, "AMD Radeon RX 470 Graphics"}, {0x67DF, 0xE0, "AMD Radeon RX 470 Series"}, {0x67DF, 0xE1, "AMD Radeon RX 590 Series"}, {0x67DF, 0xE3, "AMD Radeon RX Series"}, {0x67DF, 0xE7, "AMD Radeon RX 580 Series"}, {0x67DF, 0xEB, "AMD Radeon Pro 580X"}, {0x67DF, 0xEF, "AMD Radeon RX 570 Series"}, {0x67DF, 0xF7, "AMD Radeon RX P30PH"}, {0x67DF, 0xFF, "AMD Radeon RX 470 Series"}, {0x67E0, 0x00, "AMD Radeon Pro WX Series"}, {0x67E3, 0x00, "AMD Radeon Pro WX 4100"}, {0x67E8, 0x00, "AMD Radeon Pro WX Series"}, {0x67E8, 0x01, "AMD Radeon Pro WX Series"}, {0x67E8, 0x80, "AMD Radeon E9260 Graphics"}, {0x67EB, 0x00, "AMD Radeon Pro V5300X"}, {0x67EF, 0xC0, "AMD Radeon RX Graphics"}, {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"}, {0x67EF, 0xC2, "AMD Radeon Pro Series"}, {0x67EF, 0xC3, "AMD Radeon RX Series"}, {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"}, {0x67EF, 0xC7, "AMD Radeon RX Graphics"}, {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"}, {0x67EF, 0xE0, "AMD Radeon RX 560 Series"}, {0x67EF, 0xE1, "AMD Radeon RX Series"}, {0x67EF, 0xE2, "AMD Radeon RX 560X"}, {0x67EF, 0xE3, "AMD Radeon RX Series"}, {0x67EF, 0xE5, "AMD Radeon RX 560 Series"}, {0x67EF, 0xE7, "AMD Radeon RX 560 Series"}, {0x67EF, 0xEF, "AMD Radeon 550 Series"}, {0x67EF, 0xFF, "AMD Radeon RX 460 Graphics"}, {0x67FF, 0xC0, "AMD Radeon Pro 465"}, {0x67FF, 0xC1, "AMD Radeon RX 560 Series"}, {0x67FF, 0xCF, "AMD Radeon RX 560 Series"}, {0x67FF, 0xEF, "AMD Radeon RX 560 Series"}, {0x67FF, 0xFF, "AMD Radeon RX 550 Series"}, {0x6800, 0x00, "AMD Radeon HD 7970M"}, {0x6801, 0x00, "AMD Radeon HD 8970M"}, {0x6806, 0x00, "AMD Radeon R9 M290X"}, {0x6808, 0x00, "AMD FirePro W7000"}, {0x6808, 0x00, "ATI FirePro V (FireGL V) Graphics Adapter"}, {0x6809, 0x00, "ATI FirePro W5000"}, {0x6810, 0x00, "AMD Radeon R9 200 Series"}, {0x6810, 0x81, "AMD Radeon R9 370 Series"}, {0x6811, 0x00, "AMD Radeon R9 200 Series"}, {0x6811, 0x81, "AMD Radeon R7 370 Series"}, {0x6818, 0x00, "AMD Radeon HD 7800 Series"}, {0x6819, 0x00, "AMD Radeon HD 7800 Series"}, {0x6820, 0x00, "AMD Radeon R9 M275X"}, {0x6820, 0x81, "AMD Radeon R9 M375"}, {0x6820, 0x83, "AMD Radeon R9 M375X"}, {0x6821, 0x00, "AMD Radeon R9 M200X Series"}, {0x6821, 0x83, "AMD Radeon R9 M370X"}, {0x6821, 0x87, "AMD Radeon R7 M380"}, {0x6822, 0x00, "AMD Radeon E8860"}, {0x6823, 0x00, "AMD Radeon R9 M200X Series"}, {0x6825, 0x00, "AMD Radeon HD 7800M Series"}, {0x6826, 0x00, "AMD Radeon HD 7700M Series"}, {0x6827, 0x00, "AMD Radeon HD 7800M Series"}, {0x6828, 0x00, "AMD FirePro W600"}, {0x682B, 0x00, "AMD Radeon HD 8800M Series"}, {0x682B, 0x87, "AMD Radeon R9 M360"}, {0x682C, 0x00, "AMD FirePro W4100"}, {0x682D, 0x00, "AMD Radeon HD 7700M Series"}, {0x682F, 0x00, "AMD Radeon HD 7700M Series"}, {0x6830, 0x00, "AMD Radeon 7800M Series"}, {0x6831, 0x00, "AMD Radeon 7700M Series"}, {0x6835, 0x00, "AMD Radeon R7 Series / HD 9000 Series"}, {0x6837, 0x00, "AMD Radeon HD 7700 Series"}, {0x683D, 0x00, "AMD Radeon HD 7700 Series"}, {0x683F, 0x00, "AMD Radeon HD 7700 Series"}, {0x684C, 0x00, "ATI FirePro V (FireGL V) Graphics Adapter"}, {0x6860, 0x00, "AMD Radeon Instinct MI25"}, {0x6860, 0x01, "AMD Radeon Instinct MI25"}, {0x6860, 0x02, "AMD Radeon Instinct MI25"}, {0x6860, 0x03, "AMD Radeon Pro V340"}, {0x6860, 0x04, "AMD Radeon Instinct MI25x2"}, {0x6860, 0x07, "AMD Radeon Pro V320"}, {0x6861, 0x00, "AMD Radeon Pro WX 9100"}, {0x6862, 0x00, "AMD Radeon Pro SSG"}, {0x6863, 0x00, "AMD Radeon Vega Frontier Edition"}, {0x6864, 0x03, "AMD Radeon Pro V340"}, {0x6864, 0x04, "AMD Radeon Instinct MI25x2"}, {0x6864, 0x05, "AMD Radeon Pro V340"}, {0x6868, 0x00, "AMD Radeon Pro WX 8200"}, {0x686C, 0x00, "AMD Radeon Instinct MI25 MxGPU"}, {0x686C, 0x01, "AMD Radeon Instinct MI25 MxGPU"}, {0x686C, 0x02, "AMD Radeon Instinct MI25 MxGPU"}, {0x686C, 0x03, "AMD Radeon Pro V340 MxGPU"}, {0x686C, 0x04, "AMD Radeon Instinct MI25x2 MxGPU"}, {0x686C, 0x05, "AMD Radeon Pro V340L MxGPU"}, {0x686C, 0x06, "AMD Radeon Instinct MI25 MxGPU"}, {0x687F, 0x01, "AMD Radeon RX Vega"}, {0x687F, 0xC0, "AMD Radeon RX Vega"}, {0x687F, 0xC1, "AMD Radeon RX Vega"}, {0x687F, 0xC3, "AMD Radeon RX Vega"}, {0x687F, 0xC7, "AMD Radeon RX Vega"}, {0x6900, 0x00, "AMD Radeon R7 M260"}, {0x6900, 0x81, "AMD Radeon R7 M360"}, {0x6900, 0x83, "AMD Radeon R7 M340"}, {0x6900, 0xC1, "AMD Radeon R5 M465 Series"}, {0x6900, 0xC3, "AMD Radeon R5 M445 Series"}, {0x6900, 0xD1, "AMD Radeon 530 Series"}, {0x6900, 0xD3, "AMD Radeon 530 Series"}, {0x6901, 0x00, "AMD Radeon R5 M255"}, {0x6902, 0x00, "AMD Radeon Series"}, {0x6907, 0x00, "AMD Radeon R5 M255"}, {0x6907, 0x87, "AMD Radeon R5 M315"}, {0x6920, 0x00, "AMD Radeon R9 M395X"}, {0x6920, 0x01, "AMD Radeon R9 M390X"}, {0x6921, 0x00, "AMD Radeon R9 M390X"}, {0x6929, 0x00, "AMD FirePro S7150"}, {0x6929, 0x01, "AMD FirePro S7100X"}, {0x692B, 0x00, "AMD FirePro W7100"}, {0x6938, 0x00, "AMD Radeon R9 200 Series"}, {0x6938, 0xF0, "AMD Radeon R9 200 Series"}, {0x6938, 0xF1, "AMD Radeon R9 380 Series"}, {0x6939, 0x00, "AMD Radeon R9 200 Series"}, {0x6939, 0xF0, "AMD Radeon R9 200 Series"}, {0x6939, 0xF1, "AMD Radeon R9 380 Series"}, {0x694C, 0xC0, "AMD Radeon RX Vega M GH Graphics"}, {0x694E, 0xC0, "AMD Radeon RX Vega M GL Graphics"}, {0x6980, 0x00, "AMD Radeon Pro WX 3100"}, {0x6981, 0x00, "AMD Radeon Pro WX 3200 Series"}, {0x6981, 0x01, "AMD Radeon Pro WX 3200 Series"}, {0x6981, 0x10, "AMD Radeon Pro WX 3200 Series"}, {0x6985, 0x00, "AMD Radeon Pro WX 3100"}, {0x6986, 0x00, "AMD Radeon Pro WX 2100"}, {0x6987, 0x80, "AMD Embedded Radeon E9171"}, {0x6987, 0xC0, "AMD Radeon 550X Series"}, {0x6987, 0xC1, "AMD Radeon RX 640"}, {0x6987, 0xC3, "AMD Radeon 540X Series"}, {0x6987, 0xC7, "AMD Radeon 540"}, {0x6995, 0x00, "AMD Radeon Pro WX 2100"}, {0x6997, 0x00, "AMD Radeon Pro WX 2100"}, {0x699F, 0x81, "AMD Embedded Radeon E9170 Series"}, {0x699F, 0xC0, "AMD Radeon 500 Series"}, {0x699F, 0xC1, "AMD Radeon 540 Series"}, {0x699F, 0xC3, "AMD Radeon 500 Series"}, {0x699F, 0xC7, "AMD Radeon RX 550 / 550 Series"}, {0x699F, 0xC9, "AMD Radeon 540"}, {0x6FDF, 0xE7, "AMD Radeon RX 590 GME"}, {0x6FDF, 0xEF, "AMD Radeon RX 580 2048SP"}, {0x7300, 0xC1, "AMD FirePro S9300 x2"}, {0x7300, 0xC8, "AMD Radeon R9 Fury Series"}, {0x7300, 0xC9, "AMD Radeon Pro Duo"}, {0x7300, 0xCA, "AMD Radeon R9 Fury Series"}, {0x7300, 0xCB, "AMD Radeon R9 Fury Series"}, {0x7312, 0x00, "AMD Radeon Pro W5700"}, {0x731E, 0xC6, "AMD Radeon RX 5700XTB"}, {0x731E, 0xC7, "AMD Radeon RX 5700B"}, {0x731F, 0xC0, "AMD Radeon RX 5700 XT 50th Anniversary"}, {0x731F, 0xC1, "AMD Radeon RX 5700 XT"}, {0x731F, 0xC2, "AMD Radeon RX 5600M"}, {0x731F, 0xC3, "AMD Radeon RX 5700M"}, {0x731F, 0xC4, "AMD Radeon RX 5700"}, {0x731F, 0xC5, "AMD Radeon RX 5700 XT"}, {0x731F, 0xCA, "AMD Radeon RX 5600 XT"}, {0x731F, 0xCB, "AMD Radeon RX 5600 OEM"}, {0x7340, 0xC1, "AMD Radeon RX 5500M"}, {0x7340, 0xC3, "AMD Radeon RX 5300M"}, {0x7340, 0xC5, "AMD Radeon RX 5500 XT"}, {0x7340, 0xC7, "AMD Radeon RX 5500"}, {0x7340, 0xC9, "AMD Radeon RX 5500XTB"}, {0x7340, 0xCF, "AMD Radeon RX 5300"}, {0x7341, 0x00, "AMD Radeon Pro W5500"}, {0x7347, 0x00, "AMD Radeon Pro W5500M"}, {0x7360, 0x41, "AMD Radeon Pro 5600M"}, {0x7360, 0xC3, "AMD Radeon Pro V520"}, {0x738C, 0x01, "AMD Instinct MI100"}, {0x73A3, 0x00, "AMD Radeon Pro W6800"}, {0x73A5, 0xC0, "AMD Radeon RX 6950 XT"}, {0x73AF, 0xC0, "AMD Radeon RX 6900 XT"}, {0x73BF, 0xC0, "AMD Radeon RX 6900 XT"}, {0x73BF, 0xC1, "AMD Radeon RX 6800 XT"}, {0x73BF, 0xC3, "AMD Radeon RX 6800"}, {0x73DF, 0xC0, "AMD Radeon RX 6750 XT"}, {0x73DF, 0xC1, "AMD Radeon RX 6700 XT"}, {0x73DF, 0xC2, "AMD Radeon RX 6800M"}, {0x73DF, 0xC3, "AMD Radeon RX 6800M"}, {0x73DF, 0xC5, "AMD Radeon RX 6700 XT"}, {0x73DF, 0xCF, "AMD Radeon RX 6700M"}, {0x73DF, 0xD7, "AMD TDC-235"}, {0x73E1, 0x00, "AMD Radeon Pro W6600M"}, {0x73E3, 0x00, "AMD Radeon Pro W6600"}, {0x73EF, 0xC0, "AMD Radeon RX 6800S"}, {0x73EF, 0xC1, "AMD Radeon RX 6650 XT"}, {0x73EF, 0xC2, "AMD Radeon RX 6700S"}, {0x73EF, 0xC3, "AMD Radeon RX 6650M"}, {0x73EF, 0xC4, "AMD Radeon RX 6650M XT"}, {0x73FF, 0xC1, "AMD Radeon RX 6600 XT"}, {0x73FF, 0xC3, "AMD Radeon RX 6600M"}, {0x73FF, 0xC7, "AMD Radeon RX 6600"}, {0x73FF, 0xCB, "AMD Radeon RX 6600S"}, {0x7408, 0x00, "AMD Instinct MI250X"}, {0x740C, 0x01, "AMD Instinct MI250X / MI250"}, {0x740F, 0x02, "AMD Instinct MI210"}, {0x7421, 0x00, "AMD Radeon Pro W6500M"}, {0x7422, 0x00, "AMD Radeon Pro W6400"}, {0x7423, 0x00, "AMD Radeon Pro W6300M"}, {0x7423, 0x01, "AMD Radeon Pro W6300"}, {0x7424, 0x00, "AMD Radeon RX 6300"}, {0x743F, 0xC1, "AMD Radeon RX 6500 XT"}, {0x743F, 0xC3, "AMD Radeon RX 6500"}, {0x743F, 0xC3, "AMD Radeon RX 6500M"}, {0x743F, 0xC7, "AMD Radeon RX 6400"}, {0x743F, 0xCF, "AMD Radeon RX 6300M"}, {0x9830, 0x00, "AMD Radeon HD 8400 / R3 Series"}, {0x9831, 0x00, "AMD Radeon HD 8400E"}, {0x9832, 0x00, "AMD Radeon HD 8330"}, {0x9833, 0x00, "AMD Radeon HD 8330E"}, {0x9834, 0x00, "AMD Radeon HD 8210"}, {0x9835, 0x00, "AMD Radeon HD 8210E"}, {0x9836, 0x00, "AMD Radeon HD 8200 / R3 Series"}, {0x9837, 0x00, "AMD Radeon HD 8280E"}, {0x9838, 0x00, "AMD Radeon HD 8200 / R3 series"}, {0x9839, 0x00, "AMD Radeon HD 8180"}, {0x983D, 0x00, "AMD Radeon HD 8250"}, {0x9850, 0x00, "AMD Radeon R3 Graphics"}, {0x9850, 0x03, "AMD Radeon R3 Graphics"}, {0x9850, 0x40, "AMD Radeon R2 Graphics"}, {0x9850, 0x45, "AMD Radeon R3 Graphics"}, {0x9851, 0x00, "AMD Radeon R4 Graphics"}, {0x9851, 0x01, "AMD Radeon R5E Graphics"}, {0x9851, 0x05, "AMD Radeon R5 Graphics"}, {0x9851, 0x06, "AMD Radeon R5E Graphics"}, {0x9851, 0x40, "AMD Radeon R4 Graphics"}, {0x9851, 0x45, "AMD Radeon R5 Graphics"}, {0x9852, 0x00, "AMD Radeon R2 Graphics"}, {0x9852, 0x40, "AMD Radeon E1 Graphics"}, {0x9853, 0x00, "AMD Radeon R2 Graphics"}, {0x9853, 0x01, "AMD Radeon R4E Graphics"}, {0x9853, 0x03, "AMD Radeon R2 Graphics"}, {0x9853, 0x05, "AMD Radeon R1E Graphics"}, {0x9853, 0x06, "AMD Radeon R1E Graphics"}, {0x9853, 0x07, "AMD Radeon R1E Graphics"}, {0x9853, 0x08, "AMD Radeon R1E Graphics"}, {0x9853, 0x40, "AMD Radeon R2 Graphics"}, {0x9854, 0x00, "AMD Radeon R3 Graphics"}, {0x9854, 0x01, "AMD Radeon R3E Graphics"}, {0x9854, 0x02, "AMD Radeon R3 Graphics"}, {0x9854, 0x05, "AMD Radeon R2 Graphics"}, {0x9854, 0x06, "AMD Radeon R4 Graphics"}, {0x9854, 0x07, "AMD Radeon R3 Graphics"}, {0x9855, 0x02, "AMD Radeon R6 Graphics"}, {0x9855, 0x05, "AMD Radeon R4 Graphics"}, {0x9856, 0x00, "AMD Radeon R2 Graphics"}, {0x9856, 0x01, "AMD Radeon R2E Graphics"}, {0x9856, 0x02, "AMD Radeon R2 Graphics"}, {0x9856, 0x05, "AMD Radeon R1E Graphics"}, {0x9856, 0x06, "AMD Radeon R2 Graphics"}, {0x9856, 0x07, "AMD Radeon R1E Graphics"}, {0x9856, 0x08, "AMD Radeon R1E Graphics"}, {0x9856, 0x13, "AMD Radeon R1E Graphics"}, {0x9874, 0x81, "AMD Radeon R6 Graphics"}, {0x9874, 0x84, "AMD Radeon R7 Graphics"}, {0x9874, 0x85, "AMD Radeon R6 Graphics"}, {0x9874, 0x87, "AMD Radeon R5 Graphics"}, {0x9874, 0x88, "AMD Radeon R7E Graphics"}, {0x9874, 0x89, "AMD Radeon R6E Graphics"}, {0x9874, 0xC4, "AMD Radeon R7 Graphics"}, {0x9874, 0xC5, "AMD Radeon R6 Graphics"}, {0x9874, 0xC6, "AMD Radeon R6 Graphics"}, {0x9874, 0xC7, "AMD Radeon R5 Graphics"}, {0x9874, 0xC8, "AMD Radeon R7 Graphics"}, {0x9874, 0xC9, "AMD Radeon R7 Graphics"}, {0x9874, 0xCA, "AMD Radeon R5 Graphics"}, {0x9874, 0xCB, "AMD Radeon R5 Graphics"}, {0x9874, 0xCC, "AMD Radeon R7 Graphics"}, {0x9874, 0xCD, "AMD Radeon R7 Graphics"}, {0x9874, 0xCE, "AMD Radeon R5 Graphics"}, {0x9874, 0xE1, "AMD Radeon R7 Graphics"}, {0x9874, 0xE2, "AMD Radeon R7 Graphics"}, {0x9874, 0xE3, "AMD Radeon R7 Graphics"}, {0x9874, 0xE4, "AMD Radeon R7 Graphics"}, {0x9874, 0xE5, "AMD Radeon R5 Graphics"}, {0x9874, 0xE6, "AMD Radeon R5 Graphics"}, {0x98E4, 0x80, "AMD Radeon R5E Graphics"}, {0x98E4, 0x81, "AMD Radeon R4E Graphics"}, {0x98E4, 0x83, "AMD Radeon R2E Graphics"}, {0x98E4, 0x84, "AMD Radeon R2E Graphics"}, {0x98E4, 0x86, "AMD Radeon R1E Graphics"}, {0x98E4, 0xC0, "AMD Radeon R4 Graphics"}, {0x98E4, 0xC1, "AMD Radeon R5 Graphics"}, {0x98E4, 0xC2, "AMD Radeon R4 Graphics"}, {0x98E4, 0xC4, "AMD Radeon R5 Graphics"}, {0x98E4, 0xC6, "AMD Radeon R5 Graphics"}, {0x98E4, 0xC8, "AMD Radeon R4 Graphics"}, {0x98E4, 0xC9, "AMD Radeon R4 Graphics"}, {0x98E4, 0xCA, "AMD Radeon R5 Graphics"}, {0x98E4, 0xD0, "AMD Radeon R2 Graphics"}, {0x98E4, 0xD1, "AMD Radeon R2 Graphics"}, {0x98E4, 0xD2, "AMD Radeon R2 Graphics"}, {0x98E4, 0xD4, "AMD Radeon R2 Graphics"}, {0x98E4, 0xD9, "AMD Radeon R5 Graphics"}, {0x98E4, 0xDA, "AMD Radeon R5 Graphics"}, {0x98E4, 0xDB, "AMD Radeon R3 Graphics"}, {0x98E4, 0xE1, "AMD Radeon R3 Graphics"}, {0x98E4, 0xE2, "AMD Radeon R3 Graphics"}, {0x98E4, 0xE9, "AMD Radeon R4 Graphics"}, {0x98E4, 0xEA, "AMD Radeon R4 Graphics"}, {0x98E4, 0xEB, "AMD Radeon R3 Graphics"}, {0x98E4, 0xEC, "AMD Radeon R4 Graphics"}, }; #endif nvtop-3.2.0/src/device_discovery_linux.c000066400000000000000000000302431477175131100203730ustar00rootroot00000000000000/* * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop and adapted from radeontop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include #include #include #include #if defined(USING_LIBUDEV) && defined(USING_LIBSYSTEMD) #error Cannot use libudev and libsystemd at the same time #endif #if defined(USING_LIBUDEV) #include #include #include #include typedef struct nvtop_device_enumerator { unsigned refCount; struct udev *udev; struct udev_enumerate *enumerate; unsigned num_devices; unsigned current_device; struct udev_device **devices; } nvtop_device_enumerator; nvtop_device *nvtop_device_ref(nvtop_device *device) { udev_device_ref((struct udev_device *)device); return device; } nvtop_device *nvtop_device_unref(nvtop_device *device) { if (device) udev_device_unref((struct udev_device *)device); return NULL; } int nvtop_device_new_from_syspath(nvtop_device **dev, const char *syspath) { struct udev *udev = udev_new(); if (!udev) return -ENOMEM; *dev = (nvtop_device *)udev_device_new_from_syspath(udev, syspath); udev_unref(udev); return *dev ? 1 : -ENOENT; } int nvtop_device_get_parent(nvtop_device *child, nvtop_device **parent) { *parent = (nvtop_device *)udev_device_get_parent((struct udev_device *)child); return *parent ? 0 : -ENOENT; } int nvtop_device_get_driver(nvtop_device *device, const char **driver) { *driver = udev_device_get_driver((struct udev_device *)device); return *driver ? 0 : -ENOENT; } int nvtop_device_get_devname(nvtop_device *device, const char **devname) { *devname = udev_device_get_devnode((struct udev_device *)device); return *devname ? 0 : -ENOENT; } int nvtop_device_get_property_value(nvtop_device *device, const char *key, const char **value) { *value = udev_device_get_property_value((struct udev_device *)device, key); return *value ? 0 : -ENOENT; } int nvtop_device_get_sysattr_value(nvtop_device *device, const char *sysattr, const char **value) { *value = udev_device_get_sysattr_value((struct udev_device *)device, sysattr); return *value ? 0 : -ENOENT; } int nvtop_device_get_syspath(nvtop_device *device, const char **sysPath) { *sysPath = udev_device_get_syspath((struct udev_device *)device); return *sysPath ? 0 : -ENOENT; } int nvtop_enumerator_new(nvtop_device_enumerator **enumerator) { *enumerator = calloc(1, sizeof(**enumerator)); if (!enumerator) return -1; (*enumerator)->refCount = 1; (*enumerator)->udev = udev_new(); if (!(*enumerator)->udev) goto cleanAllocErr; (*enumerator)->enumerate = udev_enumerate_new((*enumerator)->udev); if (!(*enumerator)->enumerate) goto cleanAllErr; return 0; cleanAllErr: udev_unref((*enumerator)->udev); cleanAllocErr: free(*enumerator); return -1; } static void nvtop_free_enumerator_devices(nvtop_device_enumerator *enumerator) { if (enumerator->devices) { for (unsigned i = 0; enumerator->devices && i < enumerator->num_devices; ++i) { udev_device_unref(enumerator->devices[i]); } free(enumerator->devices); enumerator->devices = NULL; } } nvtop_device_enumerator *nvtop_enumerator_ref(nvtop_device_enumerator *enumerator) { enumerator->refCount++; udev_ref(enumerator->udev); udev_enumerate_ref(enumerator->enumerate); return enumerator; } nvtop_device_enumerator *nvtop_enumerator_unref(nvtop_device_enumerator *enumerator) { enumerator->refCount--; udev_enumerate_unref(enumerator->enumerate); udev_unref(enumerator->udev); if (!enumerator->refCount) { nvtop_free_enumerator_devices(enumerator); free(enumerator); return NULL; } else { return enumerator; } } int nvtop_device_enumerator_add_match_subsystem(nvtop_device_enumerator *enumerator, const char *subsystem, int match) { assert(enumerator->refCount && "Reference at zero"); nvtop_free_enumerator_devices(enumerator); int ret = 1; if (match) { ret = udev_enumerate_add_match_subsystem(enumerator->enumerate, subsystem); } else { ret = udev_enumerate_add_nomatch_subsystem(enumerator->enumerate, subsystem); } return ret; } int nvtop_device_enumerator_add_match_property(nvtop_device_enumerator *enumerator, const char *property, const char *value) { assert(enumerator->refCount && "Reference at zero"); nvtop_free_enumerator_devices(enumerator); return udev_enumerate_add_match_property(enumerator->enumerate, property, value); } int nvtop_device_enumerator_add_match_parent(nvtop_device_enumerator *enumerator, nvtop_device *parent) { assert(enumerator->refCount && "Reference at zero"); nvtop_free_enumerator_devices(enumerator); return udev_enumerate_add_match_parent(enumerator->enumerate, (struct udev_device *)parent); } static nvtop_device *nvtop_enumerator_get_current(nvtop_device_enumerator *enumerator) { if (!enumerator->devices || enumerator->current_device >= enumerator->num_devices) return NULL; return (nvtop_device *)enumerator->devices[enumerator->current_device]; } nvtop_device *nvtop_enumerator_get_device_first(nvtop_device_enumerator *enumerator) { if (!enumerator->devices) { int err = udev_enumerate_scan_devices(enumerator->enumerate); if (err < 0) return NULL; struct udev_list_entry *list = udev_enumerate_get_list_entry(enumerator->enumerate); struct udev_list_entry *curr; enumerator->num_devices = 0; udev_list_entry_foreach(curr, list) { enumerator->num_devices++; } enumerator->devices = calloc(enumerator->num_devices, sizeof(*enumerator->devices)); if (!enumerator->devices) return NULL; unsigned idx = 0; udev_list_entry_foreach(curr, list) { const char *path = udev_list_entry_get_name(curr); enumerator->devices[idx++] = udev_device_new_from_syspath(enumerator->udev, path); } } enumerator->current_device = 0; return nvtop_enumerator_get_current(enumerator); } nvtop_device *nvtop_enumerator_get_device_next(nvtop_device_enumerator *enumerator) { enumerator->current_device++; return nvtop_enumerator_get_current(enumerator); } #elif defined(USING_LIBSYSTEMD) #include #include #include #include nvtop_device *nvtop_device_ref(nvtop_device *device) { return (nvtop_device *)sd_device_ref((sd_device *)device); } nvtop_device *nvtop_device_unref(nvtop_device *device) { if (!device) return NULL; return (nvtop_device *)sd_device_unref((sd_device *)device); } int nvtop_device_new_from_syspath(nvtop_device **dev, const char *syspath) { return sd_device_new_from_syspath((sd_device **)dev, syspath); } int nvtop_device_get_parent(nvtop_device *child, nvtop_device **parent) { return sd_device_get_parent((sd_device *)child, (sd_device **)parent); } int nvtop_device_get_driver(nvtop_device *device, const char **driver) { return sd_device_get_driver((sd_device *)device, driver); } int nvtop_device_get_devname(nvtop_device *device, const char **devname) { return sd_device_get_devname((sd_device *)device, devname); } int nvtop_device_get_property_value(nvtop_device *device, const char *key, const char **value) { return sd_device_get_property_value((sd_device *)device, key, value); } int nvtop_device_get_sysattr_value(nvtop_device *device, const char *sysattr, const char **value) { return sd_device_get_sysattr_value((sd_device *)device, sysattr, value); } int nvtop_device_get_syspath(nvtop_device *device, const char **sysPath) { return sd_device_get_syspath((sd_device *)device, sysPath); } int nvtop_enumerator_new(nvtop_device_enumerator **enumerator) { return sd_device_enumerator_new((sd_device_enumerator **)enumerator); } nvtop_device_enumerator *nvtop_enumerator_ref(nvtop_device_enumerator *enumerator) { return (nvtop_device_enumerator *)sd_device_enumerator_ref((sd_device_enumerator *)enumerator); } nvtop_device_enumerator *nvtop_enumerator_unref(nvtop_device_enumerator *enumerator) { return (nvtop_device_enumerator *)sd_device_enumerator_unref((sd_device_enumerator *)enumerator); } int nvtop_device_enumerator_add_match_subsystem(nvtop_device_enumerator *enumerator, const char *subsystem, int match) { return sd_device_enumerator_add_match_subsystem((sd_device_enumerator *)enumerator, subsystem, match); } int nvtop_device_enumerator_add_match_property(nvtop_device_enumerator *enumerator, const char *property, const char *value) { return sd_device_enumerator_add_match_property((sd_device_enumerator *)enumerator, property, value); } int nvtop_device_enumerator_add_match_parent(nvtop_device_enumerator *enumerator, nvtop_device *parent) { return sd_device_enumerator_add_match_parent((sd_device_enumerator *)enumerator, (sd_device *)parent); } nvtop_device *nvtop_enumerator_get_device_first(nvtop_device_enumerator *enumerator) { return (nvtop_device *)sd_device_enumerator_get_device_first((sd_device_enumerator *)enumerator); } nvtop_device *nvtop_enumerator_get_device_next(nvtop_device_enumerator *enumerator) { return (nvtop_device *)sd_device_enumerator_get_device_next((sd_device_enumerator *)enumerator); } #endif // elif USE_LIBSYSTEMD static int pcie_walker_helper(nvtop_device *dev, nvtop_pcie_link *pcie_info, const char *link_speed_attr, const char *link_width_attr) { bool valid = false; const char *driver; int ret = nvtop_device_get_driver(dev, &driver); if (ret < 0) return ret; if (!strcmp(driver, "pcieport")) { const char *speed_str, *width_str; unsigned speed, width; ret = nvtop_device_get_sysattr_value(dev, link_speed_attr, &speed_str); if (ret < 0) return ret; ret = nvtop_device_get_sysattr_value(dev, link_width_attr, &width_str); if (ret < 0) return ret; ret = sscanf(speed_str, "%u", &speed); if (ret != 1) return -1; ret = sscanf(width_str, "%u", &width); if (ret != 1) return -1; pcie_info->speed = pcie_info->speed > speed ? speed : pcie_info->speed; pcie_info->width = pcie_info->width > width ? width : pcie_info->width; valid = true; } nvtop_device *parent; ret = nvtop_device_get_parent(dev, &parent); if (ret < 0) return valid; ret = pcie_walker_helper(parent, pcie_info, link_speed_attr, link_width_attr); return valid || ret >= 0; } int nvtop_device_maximum_pcie_link(nvtop_device *dev, nvtop_pcie_link *pcie_info) { pcie_info->speed = UINT_MAX; pcie_info->width = UINT_MAX; return pcie_walker_helper(dev, pcie_info, "max_link_speed", "max_link_width"); } int nvtop_device_current_pcie_link(nvtop_device *dev, nvtop_pcie_link *pcie_info) { // We open a new device to avoid cached values const char *path; nvtop_device_get_syspath(dev, &path); nvtop_device *dev_samepath; int ret = nvtop_device_new_from_syspath(&dev_samepath, path); if (ret < 0) return ret; pcie_info->speed = UINT_MAX; pcie_info->width = UINT_MAX; ret = pcie_walker_helper(dev_samepath, pcie_info, "current_link_speed", "current_link_width"); nvtop_device_unref(dev_samepath); return ret; } nvtop_device *nvtop_device_get_hwmon(nvtop_device *dev) { nvtop_device_enumerator *enumerator; int ret = nvtop_enumerator_new(&enumerator); if (ret < 0) return NULL; ret = nvtop_device_enumerator_add_match_subsystem(enumerator, "hwmon", true); if (ret < 0) return NULL; ret = nvtop_device_enumerator_add_match_parent(enumerator, dev); if (ret < 0) return NULL; nvtop_device *hwmon = nvtop_enumerator_get_device_first(enumerator); if (!hwmon) return NULL; nvtop_device_ref(hwmon); nvtop_enumerator_unref(enumerator); return hwmon; } nvtop-3.2.0/src/extract_gpuinfo.c000066400000000000000000000310361477175131100170300ustar00rootroot00000000000000/* * * Copyright (C) 2017-2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include #include #include #include #include "nvtop/extract_gpuinfo.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/get_process_info.h" #include "nvtop/time.h" #include "uthash.h" #define HASH_FIND_PID(head, key_ptr, out_ptr) HASH_FIND(hh, head, key_ptr, sizeof(*key_ptr), out_ptr) #define HASH_ADD_PID(head, in_ptr) HASH_ADD(hh, head, pid, sizeof(pid_t), in_ptr) const char drm_pdev[] = "drm-pdev"; const char drm_client_id[] = "drm-client-id"; struct process_info_cache { pid_t pid; char *cmdline; char *user_name; double last_total_consumed_cpu_time; nvtop_time last_measurement_timestamp; UT_hash_handle hh; }; struct process_info_cache *cached_process_info = NULL; struct process_info_cache *updated_process_info = NULL; static LIST_HEAD(gpu_vendors); void register_gpu_vendor(struct gpu_vendor *vendor) { list_add(&vendor->list, &gpu_vendors); } bool gpuinfo_init_info_extraction(unsigned *monitored_dev_count, struct list_head *devices) { struct gpu_vendor *vendor; *monitored_dev_count = 0; list_for_each_entry(vendor, &gpu_vendors, list) { unsigned vendor_devices_count = 0; if (vendor->init()) { bool retval = vendor->get_device_handles(devices, &vendor_devices_count); if (!retval || (retval && vendor_devices_count == 0)) { vendor->shutdown(); vendor_devices_count = 0; } } *monitored_dev_count += vendor_devices_count; } return true; } bool gpuinfo_shutdown_info_extraction(struct list_head *devices) { struct gpu_info *device, *tmp; struct gpu_vendor *vendor; list_for_each_entry_safe(device, tmp, devices, list) { free(device->processes); list_del(&device->list); } list_for_each_entry(vendor, &gpu_vendors, list) { vendor->shutdown(); } gpuinfo_clear_cache(); return true; } bool gpuinfo_populate_static_infos(struct list_head *devices) { struct gpu_info *device; list_for_each_entry(device, devices, list) { device->vendor->populate_static_info(device); } return true; } bool gpuinfo_refresh_dynamic_info(struct list_head *devices) { struct gpu_info *device; list_for_each_entry(device, devices, list) { device->vendor->refresh_dynamic_info(device); } return true; } #undef MYMIN #define MYMIN(a, b) (((a) < (b)) ? (a) : (b)) bool gpuinfo_fix_dynamic_info_from_process_info(struct list_head *devices) { struct gpu_info *device; list_for_each_entry(device, devices, list) { struct gpuinfo_dynamic_info *dynamic_info = &device->dynamic_info; // If the global GPU usage is not available, try computing it from the processes info // Some integrated AMDGPU report 100% usage while process usage is actually low bool needGpuRate = true; bool validReportedGpuRate = GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, gpu_util_rate); unsigned reportedGpuRate = dynamic_info->gpu_util_rate; RESET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate); // AMDGPU does not provide encode and decode utilization through the DRM sensor info. // Update them here since per-process sysfs exposes this information. bool needGpuEncode = !GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, encoder_rate); bool needGpuDecode = !GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, decoder_rate); if (needGpuRate || needGpuEncode || needGpuDecode) { for (unsigned processIdx = 0; processIdx < device->processes_count; ++processIdx) { struct gpu_process *process_info = &device->processes[processIdx]; if (needGpuRate && GPUINFO_PROCESS_FIELD_VALID(process_info, gpu_usage)) { if (GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, gpu_util_rate)) { dynamic_info->gpu_util_rate = MYMIN(100, dynamic_info->gpu_util_rate + process_info->gpu_usage); } else { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate, MYMIN(100, process_info->gpu_usage)); } } if (needGpuEncode && GPUINFO_PROCESS_FIELD_VALID(process_info, encode_usage)) { if (GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, encoder_rate)) { dynamic_info->encoder_rate = MYMIN(100, dynamic_info->encoder_rate + process_info->encode_usage); } else { SET_GPUINFO_DYNAMIC(dynamic_info, encoder_rate, MYMIN(100, process_info->encode_usage)); } } if (needGpuDecode && GPUINFO_PROCESS_FIELD_VALID(process_info, decode_usage)) { if (GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, decoder_rate)) { dynamic_info->decoder_rate = MYMIN(100, dynamic_info->decoder_rate + process_info->decode_usage); } else { SET_GPUINFO_DYNAMIC(dynamic_info, decoder_rate, MYMIN(100, process_info->decode_usage)); } } } } if (!GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, gpu_util_rate) && validReportedGpuRate) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate, reportedGpuRate); } else if (GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, gpu_util_rate) && validReportedGpuRate) { SET_GPUINFO_DYNAMIC( dynamic_info, gpu_util_rate, (dynamic_info->gpu_util_rate > reportedGpuRate ? dynamic_info->gpu_util_rate : reportedGpuRate)); } } return true; } #undef MYMIN static void gpuinfo_populate_process_info(struct gpu_info *device) { for (unsigned j = 0; j < device->processes_count; ++j) { pid_t current_pid = device->processes[j].pid; struct process_info_cache *cached_pid_info; HASH_FIND_PID(cached_process_info, ¤t_pid, cached_pid_info); if (!cached_pid_info) { HASH_FIND_PID(updated_process_info, ¤t_pid, cached_pid_info); if (!cached_pid_info) { // Newly encountered pid cached_pid_info = calloc(1, sizeof(*cached_pid_info)); cached_pid_info->pid = current_pid; get_username_from_pid(current_pid, &cached_pid_info->user_name); get_command_from_pid(current_pid, &cached_pid_info->cmdline); cached_pid_info->last_total_consumed_cpu_time = -1.; HASH_ADD_PID(updated_process_info, cached_pid_info); } } else { // Already encountered so delete from cached list to avoid freeing // memory at the end of this function HASH_DEL(cached_process_info, cached_pid_info); HASH_ADD_PID(updated_process_info, cached_pid_info); } if (cached_pid_info->cmdline) { SET_GPUINFO_PROCESS(&device->processes[j], cmdline, cached_pid_info->cmdline); } if (cached_pid_info->user_name) { SET_GPUINFO_PROCESS(&device->processes[j], user_name, cached_pid_info->user_name); } struct process_cpu_usage cpu_usage; if (get_process_info(current_pid, &cpu_usage)) { if (cached_pid_info->last_total_consumed_cpu_time > -1.) { double usage_percent = round( 100. * (cpu_usage.total_user_time + cpu_usage.total_kernel_time - cached_pid_info->last_total_consumed_cpu_time) / nvtop_difftime(cached_pid_info->last_measurement_timestamp, cpu_usage.timestamp)); SET_GPUINFO_PROCESS(&device->processes[j], cpu_usage, (unsigned)usage_percent); } else { SET_GPUINFO_PROCESS(&device->processes[j], cpu_usage, 0); } SET_GPUINFO_PROCESS(&device->processes[j], cpu_memory_res, cpu_usage.resident_memory); SET_GPUINFO_PROCESS(&device->processes[j], cpu_memory_virt, cpu_usage.virtual_memory); cached_pid_info->last_measurement_timestamp = cpu_usage.timestamp; cached_pid_info->last_total_consumed_cpu_time = cpu_usage.total_kernel_time + cpu_usage.total_user_time; } else { cached_pid_info->last_total_consumed_cpu_time = -1; } // Process memory usage percent of total device memory if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, total_memory) && GPUINFO_PROCESS_FIELD_VALID(&device->processes[j], gpu_memory_usage)) { double percentage = fmin( round(100. * ((double)device->processes[j].gpu_memory_usage / (double)device->dynamic_info.total_memory)), 100.); SET_GPUINFO_PROCESS(&device->processes[j], gpu_memory_percentage, (unsigned)percentage); } } } static void gpuinfo_clean_old_cache(void) { struct process_info_cache *pid_not_encountered, *tmp; HASH_ITER(hh, cached_process_info, pid_not_encountered, tmp) { HASH_DEL(cached_process_info, pid_not_encountered); free(pid_not_encountered->cmdline); free(pid_not_encountered->user_name); free(pid_not_encountered); } cached_process_info = updated_process_info; updated_process_info = NULL; } bool gpuinfo_refresh_processes(struct list_head *devices) { struct gpu_info *device; list_for_each_entry(device, devices, list) { device->processes_count = 0; } // Go through the /proc hierarchy once and populate the processes for all registered GPUs processinfo_sweep_fdinfos(); list_for_each_entry(device, devices, list) { device->vendor->refresh_running_processes(device); gpuinfo_populate_process_info(device); } gpuinfo_clean_old_cache(); return true; } bool gpuinfo_utilisation_rate(struct list_head *devices) { struct gpu_info *device; list_for_each_entry(device, devices, list) { if (device->vendor->refresh_utilisation_rate) device->vendor->refresh_utilisation_rate(device); } return true; } void gpuinfo_clear_cache(void) { if (cached_process_info) { struct process_info_cache *pid_cached, *tmp; HASH_ITER(hh, cached_process_info, pid_cached, tmp) { HASH_DEL(cached_process_info, pid_cached); free(pid_cached->cmdline); free(pid_cached->user_name); free(pid_cached); } } } bool extract_drm_fdinfo_key_value(char *buf, char **key, char **val) { char *p = buf; p = index(buf, ':'); if (!p || p == buf) return false; *p = '\0'; while (*++p && isspace(*p)) ; if (!*p) return false; *key = buf; *val = p; return true; } extern inline unsigned busy_usage_from_time_usage_round(uint64_t current_use_ns, uint64_t previous_use_ns, uint64_t time_between_measurement); unsigned nvtop_pcie_gen_from_link_speed(unsigned linkSpeed) { unsigned pcieGen = 0; switch (linkSpeed) { case 2: pcieGen = 1; break; case 5: pcieGen = 2; break; case 8: pcieGen = 3; break; case 16: pcieGen = 4; break; case 32: pcieGen = 5; break; case 64: pcieGen = 6; break; } return pcieGen; } void gpuinfo_refresh_utilisation_rate(struct gpu_info *gpu_info) { /* * kernel Documentation/gpu/drm-usage-stats.rst: * - drm-maxfreq-: [Hz|MHz|KHz] * Engine identifier string must be the same as the one specified in the * drm-engine- tag and shall contain the maximum frequency for the given * engine. Taken together with drm-cycles-, this can be used to calculate * percentage utilization of the engine, whereas drm-engine- only reflects * time active without considering what frequency the engine is operating as a * percentage of it's maximum frequency. * */ uint64_t gfx_total_process_cycles = 0; uint64_t total_delta = 0; unsigned int utilisation_rate; uint64_t max_freq_hz; double avg_delta_secs; for (unsigned processIdx = 0; processIdx < gpu_info->processes_count; ++processIdx) { struct gpu_process *process_info = &gpu_info->processes[processIdx]; gfx_total_process_cycles += process_info->gpu_cycles; total_delta += process_info->sample_delta; } if (!gfx_total_process_cycles) return; avg_delta_secs = ((double)total_delta / gpu_info->processes_count) / 1000000000.0; max_freq_hz = gpu_info->dynamic_info.gpu_clock_speed_max * 1000000; utilisation_rate = (unsigned int)((((double)gfx_total_process_cycles) / (((double)max_freq_hz) * avg_delta_secs * 2)) * 100); utilisation_rate = utilisation_rate > 100 ? 100 : utilisation_rate; SET_GPUINFO_DYNAMIC(&gpu_info->dynamic_info, gpu_util_rate, utilisation_rate); } nvtop-3.2.0/src/extract_gpuinfo_amdgpu.c000066400000000000000000001147701477175131100203740ustar00rootroot00000000000000/* * Copyright (C) 2012 Lauri Kasanen * Copyright (C) 2018 Genesis Cloud Ltd. * Copyright (C) 2022 YiFei Zhu * Copyright (C) 2022 Maxime Schmitt * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. * * This file is part of Nvtop and adapted from radeontop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/common.h" #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include // extern const char *amdgpu_parse_marketing_name(struct amdgpu_gpu_info *info); // Local function pointers to DRM interface static typeof(drmGetDevices) *_drmGetDevices; static typeof(drmGetDevices2) *_drmGetDevices2; static typeof(drmFreeDevices) *_drmFreeDevices; static typeof(drmGetVersion) *_drmGetVersion; static typeof(drmFreeVersion) *_drmFreeVersion; static typeof(drmGetMagic) *_drmGetMagic; static typeof(drmAuthMagic) *_drmAuthMagic; static typeof(drmDropMaster) *_drmDropMaster; // Local function pointers to amdgpu DRM interface static typeof(amdgpu_device_initialize) *_amdgpu_device_initialize; static typeof(amdgpu_device_deinitialize) *_amdgpu_device_deinitialize; static typeof(amdgpu_get_marketing_name) *_amdgpu_get_marketing_name; static typeof(amdgpu_query_hw_ip_info) *_amdgpu_query_hw_ip_info; static typeof(amdgpu_query_gpu_info) *_amdgpu_query_gpu_info; static typeof(amdgpu_query_info) *_amdgpu_query_info; static typeof(amdgpu_query_sensor_info) *_amdgpu_query_sensor_info; static void *libdrm_handle; static void *libdrm_amdgpu_handle; static int last_libdrm_return_status = 0; static char didnt_call_gpuinfo_init[] = "uninitialized"; static const char *local_error_string = didnt_call_gpuinfo_init; #define HASH_FIND_CLIENT(head, key_ptr, out_ptr) HASH_FIND(hh, head, key_ptr, sizeof(struct unique_cache_id), out_ptr) #define HASH_ADD_CLIENT(head, in_ptr) HASH_ADD(hh, head, client_id, sizeof(struct unique_cache_id), in_ptr) #define SET_AMDGPU_CACHE(cachePtr, field, value) SET_VALUE(cachePtr, field, value, amdgpu_cache_) #define RESET_AMDGPU_CACHE(cachePtr, field) INVALIDATE_VALUE(cachePtr, field, amdgpu_cache_) #define AMDGPU_CACHE_FIELD_VALID(cachePtr, field) VALUE_IS_VALID(cachePtr, field, amdgpu_cache_) enum amdgpu_process_info_cache_valid { amdgpu_cache_gfx_engine_used_valid = 0, amdgpu_cache_compute_engine_used_valid, amdgpu_cache_enc_engine_used_valid, amdgpu_cache_dec_engine_used_valid, amdgpu_cache_process_info_cache_valid_count }; struct __attribute__((__packed__)) unique_cache_id { unsigned client_id; pid_t pid; char *pdev; }; struct amdgpu_process_info_cache { struct unique_cache_id client_id; uint64_t gfx_engine_used; uint64_t compute_engine_used; uint64_t enc_engine_used; uint64_t dec_engine_used; nvtop_time last_measurement_tstamp; unsigned char valid[(amdgpu_cache_process_info_cache_valid_count + CHAR_BIT - 1) / CHAR_BIT]; UT_hash_handle hh; }; struct gpu_info_amdgpu { struct gpu_info base; drmVersionPtr drmVersion; int fd; amdgpu_device_handle amdgpu_device; // We poll the fan frequently enough and want to avoid the open/close overhead of the sysfs file FILE *fanSpeedFILE; // FILE* for this device current fan speed FILE *PCIeBW; // FILE* for this device PCIe bandwidth over one second FILE *powerCap; // FILE* for this device power cap nvtop_device *amdgpuDevice; // The AMDGPU driver device nvtop_device *hwmonDevice; // The AMDGPU driver hwmon device struct amdgpu_process_info_cache *last_update_process_cache, *current_update_process_cache; // Cached processes info // Used to compute the actual fan speed unsigned maxFanValue; }; unsigned amdgpu_count; static struct gpu_info_amdgpu *gpu_infos; static bool gpuinfo_amdgpu_init(void); static void gpuinfo_amdgpu_shutdown(void); static const char *gpuinfo_amdgpu_last_error_string(void); static bool gpuinfo_amdgpu_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_amdgpu_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_amdgpu_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_amdgpu_get_running_processes(struct gpu_info *_gpu_info); struct gpu_vendor gpu_vendor_amdgpu = { .init = gpuinfo_amdgpu_init, .shutdown = gpuinfo_amdgpu_shutdown, .last_error_string = gpuinfo_amdgpu_last_error_string, .get_device_handles = gpuinfo_amdgpu_get_device_handles, .populate_static_info = gpuinfo_amdgpu_populate_static_info, .refresh_dynamic_info = gpuinfo_amdgpu_refresh_dynamic_info, .refresh_running_processes = gpuinfo_amdgpu_get_running_processes, .name = "AMD", }; static int readAttributeFromDevice(nvtop_device *dev, const char *sysAttr, const char *format, ...); __attribute__((constructor)) static void init_extract_gpuinfo_amdgpu(void) { register_gpu_vendor(&gpu_vendor_amdgpu); } static int wrap_drmGetDevices(drmDevicePtr devices[], int max_devices) { assert(_drmGetDevices2 || _drmGetDevices); if (_drmGetDevices2) return _drmGetDevices2(0, devices, max_devices); return _drmGetDevices(devices, max_devices); } static bool parse_drm_fdinfo_amd(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info); static bool gpuinfo_amdgpu_init(void) { libdrm_handle = dlopen("libdrm.so", RTLD_LAZY); if (!libdrm_handle) libdrm_handle = dlopen("libdrm.so.2", RTLD_LAZY); if (!libdrm_handle) libdrm_handle = dlopen("libdrm.so.1", RTLD_LAZY); if (!libdrm_handle) { local_error_string = dlerror(); return false; } _drmGetDevices2 = dlsym(libdrm_handle, "drmGetDevices2"); if (!_drmGetDevices2) _drmGetDevices = dlsym(libdrm_handle, "drmGetDevices"); if (!_drmGetDevices2 && !_drmGetDevices) goto init_error_clean_exit; _drmFreeDevices = dlsym(libdrm_handle, "drmFreeDevices"); if (!_drmFreeDevices) goto init_error_clean_exit; _drmGetVersion = dlsym(libdrm_handle, "drmGetVersion"); if (!_drmGetVersion) goto init_error_clean_exit; _drmFreeVersion = dlsym(libdrm_handle, "drmFreeVersion"); if (!_drmFreeVersion) goto init_error_clean_exit; _drmGetMagic = dlsym(libdrm_handle, "drmGetMagic"); if (!_drmGetMagic) goto init_error_clean_exit; _drmAuthMagic = dlsym(libdrm_handle, "drmAuthMagic"); if (!_drmAuthMagic) goto init_error_clean_exit; _drmDropMaster = dlsym(libdrm_handle, "drmDropMaster"); if (!_drmDropMaster) goto init_error_clean_exit; libdrm_amdgpu_handle = dlopen("libdrm_amdgpu.so", RTLD_LAZY); if (!libdrm_amdgpu_handle) libdrm_amdgpu_handle = dlopen("libdrm_amdgpu.so.1", RTLD_LAZY); if (libdrm_amdgpu_handle) { _amdgpu_device_initialize = dlsym(libdrm_amdgpu_handle, "amdgpu_device_initialize"); _amdgpu_device_deinitialize = dlsym(libdrm_amdgpu_handle, "amdgpu_device_deinitialize"); _amdgpu_get_marketing_name = dlsym(libdrm_amdgpu_handle, "amdgpu_get_marketing_name"); _amdgpu_query_hw_ip_info = dlsym(libdrm_amdgpu_handle, "amdgpu_query_hw_ip_info"); _amdgpu_query_info = dlsym(libdrm_amdgpu_handle, "amdgpu_query_info"); _amdgpu_query_gpu_info = dlsym(libdrm_amdgpu_handle, "amdgpu_query_gpu_info"); _amdgpu_query_sensor_info = dlsym(libdrm_amdgpu_handle, "amdgpu_query_sensor_info"); } local_error_string = NULL; return true; init_error_clean_exit: dlclose(libdrm_handle); libdrm_handle = NULL; return false; } static void gpuinfo_amdgpu_shutdown(void) { for (unsigned i = 0; i < amdgpu_count; ++i) { struct gpu_info_amdgpu *gpu_info = &gpu_infos[i]; if (gpu_info->fanSpeedFILE) fclose(gpu_info->fanSpeedFILE); if (gpu_info->PCIeBW) fclose(gpu_info->PCIeBW); if (gpu_info->powerCap) fclose(gpu_info->powerCap); nvtop_device_unref(gpu_info->amdgpuDevice); nvtop_device_unref(gpu_info->hwmonDevice); _drmFreeVersion(gpu_info->drmVersion); _amdgpu_device_deinitialize(gpu_info->amdgpu_device); // Clean the process cache struct amdgpu_process_info_cache *cache_entry, *cache_tmp; HASH_ITER(hh, gpu_info->last_update_process_cache, cache_entry, cache_tmp) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); free(cache_entry); } } free(gpu_infos); gpu_infos = NULL; amdgpu_count = 0; if (libdrm_handle) { dlclose(libdrm_handle); libdrm_handle = NULL; local_error_string = didnt_call_gpuinfo_init; } if (libdrm_amdgpu_handle) { dlclose(libdrm_amdgpu_handle); libdrm_amdgpu_handle = NULL; } } static const char *gpuinfo_amdgpu_last_error_string(void) { if (local_error_string) { return local_error_string; } else if (last_libdrm_return_status < 0) { switch (last_libdrm_return_status) { case DRM_ERR_NO_DEVICE: return "no device\n"; case DRM_ERR_NO_ACCESS: return "no access\n"; case DRM_ERR_NOT_ROOT: return "not root\n"; case DRM_ERR_INVALID: return "invalid args\n"; case DRM_ERR_NO_FD: return "no fd\n"; default: return "unknown error\n"; } } else { return "An unanticipated error occurred while accessing AMDGPU " "information\n"; } } static void authenticate_drm(int fd) { drm_magic_t magic; if (_drmGetMagic(fd, &magic) < 0) { return; } if (_drmAuthMagic(fd, magic) == 0) { if (_drmDropMaster(fd)) { perror("Failed to drop DRM master"); fprintf( stderr, "\nWARNING: other DRM clients will crash on VT switch while nvtop is running!\npress ENTER to continue\n"); fgetc(stdin); } return; } // XXX: Ideally I'd implement this too, but I'd need to pull in libxcb and yet // more functions and structs that may break ABI compatibility. // See radeontop auth_xcb.c for what is involved here fprintf(stderr, "Failed to authenticate to DRM; XCB authentication unimplemented\n"); } static void initDeviceSysfsPaths(struct gpu_info_amdgpu *gpu_info) { // Open the device sys folder to gather information not available through the DRM driver char devicePath[22 + PDEV_LEN]; snprintf(devicePath, sizeof(devicePath), "/sys/bus/pci/devices/%s", gpu_info->base.pdev); nvtop_device_new_from_syspath(&gpu_info->amdgpuDevice, devicePath); assert(gpu_info->amdgpuDevice != NULL); gpu_info->hwmonDevice = nvtop_device_get_hwmon(gpu_info->amdgpuDevice); if (gpu_info->hwmonDevice) { // Open the device hwmon folder (Fan speed are available there) const char *hwmonPath; nvtop_device_get_syspath(gpu_info->hwmonDevice, &hwmonPath); int hwmonFD = open(hwmonPath, O_RDONLY); // Look for which fan to use (PWM or RPM) gpu_info->fanSpeedFILE = NULL; unsigned pwmIsEnabled; int NreadPatterns = readAttributeFromDevice(gpu_info->hwmonDevice, "pwm1_enable", "%u", &pwmIsEnabled); bool usePWMSensor = NreadPatterns == 1 && pwmIsEnabled > 0; bool useRPMSensor = false; if (!usePWMSensor) { unsigned rpmIsEnabled; NreadPatterns = readAttributeFromDevice(gpu_info->hwmonDevice, "fan1_enable", "%u", &rpmIsEnabled); useRPMSensor = NreadPatterns && rpmIsEnabled > 0; } // Either RPM or PWM or neither assert((useRPMSensor ^ usePWMSensor) || (!useRPMSensor && !usePWMSensor)); if (usePWMSensor || useRPMSensor) { char *maxFanSpeedFile = usePWMSensor ? "pwm1_max" : "fan1_max"; char *fanSensorFile = usePWMSensor ? "pwm1" : "fan1_input"; unsigned maxSpeedVal; NreadPatterns = readAttributeFromDevice(gpu_info->hwmonDevice, maxFanSpeedFile, "%u", &maxSpeedVal); if (NreadPatterns == 1) { gpu_info->maxFanValue = maxSpeedVal; // Open the fan file for dynamic info gathering int fanSpeedFD = openat(hwmonFD, fanSensorFile, O_RDONLY); if (fanSpeedFD >= 0) { gpu_info->fanSpeedFILE = fdopen(fanSpeedFD, "r"); if (!gpu_info->fanSpeedFILE) close(fanSpeedFD); } } } // Open the power cap file for dynamic info gathering gpu_info->powerCap = NULL; int powerCapFD = openat(hwmonFD, "power1_cap", O_RDONLY); if (powerCapFD) { gpu_info->powerCap = fdopen(powerCapFD, "r"); } close(hwmonFD); } int sysfsFD = open(devicePath, O_RDONLY); // Open the PCIe bandwidth file for dynamic info gathering gpu_info->PCIeBW = NULL; int pcieBWFD = openat(sysfsFD, "pcie_bw", O_RDONLY); if (pcieBWFD) { gpu_info->PCIeBW = fdopen(pcieBWFD, "r"); } close(sysfsFD); } #define VENDOR_AMD 0x1002 static bool gpuinfo_amdgpu_get_device_handles(struct list_head *devices, unsigned *count) { if (!libdrm_handle) return false; last_libdrm_return_status = wrap_drmGetDevices(NULL, 0); if (last_libdrm_return_status <= 0) return false; drmDevicePtr devs[last_libdrm_return_status]; last_libdrm_return_status = wrap_drmGetDevices(devs, last_libdrm_return_status); if (last_libdrm_return_status <= 0) return false; unsigned int libdrm_count = last_libdrm_return_status; gpu_infos = calloc(libdrm_count, sizeof(*gpu_infos)); if (!gpu_infos) { local_error_string = strerror(errno); return false; } for (unsigned int i = 0; i < libdrm_count; i++) { if (devs[i]->bustype != DRM_BUS_PCI || devs[i]->deviceinfo.pci->vendor_id != VENDOR_AMD) continue; int fd = -1; // Try render node first if (1 << DRM_NODE_RENDER & devs[i]->available_nodes) { fd = open(devs[i]->nodes[DRM_NODE_RENDER], O_RDWR); } if (fd < 0) { // Fallback to primary node (control nodes are unused according to the DRM documentation) if (1 << DRM_NODE_PRIMARY & devs[i]->available_nodes) { fd = open(devs[i]->nodes[DRM_NODE_PRIMARY], O_RDWR); } } if (fd < 0) continue; drmVersionPtr ver = _drmGetVersion(fd); if (!ver) { close(fd); continue; } bool is_radeon = false; // TODO: !strcmp(ver->name, "radeon"); bool is_amdgpu = !strcmp(ver->name, "amdgpu"); if (!is_amdgpu && !is_radeon) { _drmFreeVersion(ver); close(fd); continue; } authenticate_drm(fd); if (is_amdgpu) { if (!libdrm_amdgpu_handle || !_amdgpu_device_initialize) { _drmFreeVersion(ver); close(fd); continue; } uint32_t drm_major, drm_minor; last_libdrm_return_status = _amdgpu_device_initialize(fd, &drm_major, &drm_minor, &gpu_infos[amdgpu_count].amdgpu_device); } else { // TODO: radeon suppport here assert(false); } if (!last_libdrm_return_status) { gpu_infos[amdgpu_count].drmVersion = ver; gpu_infos[amdgpu_count].fd = fd; gpu_infos[amdgpu_count].base.vendor = &gpu_vendor_amdgpu; snprintf(gpu_infos[amdgpu_count].base.pdev, PDEV_LEN - 1, "%04x:%02x:%02x.%d", devs[i]->businfo.pci->domain, devs[i]->businfo.pci->bus, devs[i]->businfo.pci->dev, devs[i]->businfo.pci->func); initDeviceSysfsPaths(&gpu_infos[amdgpu_count]); list_add_tail(&gpu_infos[amdgpu_count].base.list, devices); // Register a fdinfo callback for this GPU processinfo_register_fdinfo_callback(parse_drm_fdinfo_amd, &gpu_infos[amdgpu_count].base); amdgpu_count++; } else { _drmFreeVersion(ver); close(fd); continue; } } _drmFreeDevices(devs, libdrm_count); *count = amdgpu_count; return true; } static int rewindAndReadPattern(FILE *file, const char *format, ...) { if (!file) return 0; va_list args; va_start(args, format); rewind(file); fflush(file); int matches = vfscanf(file, format, args); va_end(args); return matches; } static int readAttributeFromDevice(nvtop_device *dev, const char *sysAttr, const char *format, ...) { va_list args; va_start(args, format); const char *val; int ret = nvtop_device_get_sysattr_value(dev, sysAttr, &val); if (ret < 0) { va_end(args); return ret; } // Read the pattern int nread = vsscanf(val, format, args); va_end(args); return nread; } static void gpuinfo_amdgpu_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_amdgpu *gpu_info = container_of(_gpu_info, struct gpu_info_amdgpu, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; bool info_query_success = false; struct amdgpu_gpu_info info; const char *name = NULL; static_info->integrated_graphics = false; static_info->encode_decode_shared = false; RESET_ALL(static_info->valid); if (libdrm_amdgpu_handle && _amdgpu_get_marketing_name) name = _amdgpu_get_marketing_name(gpu_info->amdgpu_device); if (libdrm_amdgpu_handle && _amdgpu_query_gpu_info) info_query_success = !_amdgpu_query_gpu_info(gpu_info->amdgpu_device, &info); /* check name again. * the previous name is from libdrm, which may not be the latest version. * it may not contain latest AMD GPU types/names * * the libdrm is from vendor, Linux and a Linux distribution. * It may take long time for a Linux distribution to get latest GPU info. * here a GPU IDS is maintained, which allows to support GPU info faster. */ if (!name) { name = amdgpu_parse_marketing_name(&info); } static_info->device_name[MAX_DEVICE_NAME - 1] = '\0'; if (name && strlen(name)) { strncpy(static_info->device_name, name, MAX_DEVICE_NAME - 1); SET_VALID(gpuinfo_device_name_valid, static_info->valid); } else if (gpu_info->drmVersion->desc && strlen(gpu_info->drmVersion->desc)) { strncpy(static_info->device_name, gpu_info->drmVersion->desc, MAX_DEVICE_NAME - 1); SET_VALID(gpuinfo_device_name_valid, static_info->valid); if (info_query_success) { size_t len = strlen(static_info->device_name); assert(len < MAX_DEVICE_NAME); char *dst = static_info->device_name + len; size_t remaining_len = MAX_DEVICE_NAME - 1 - len; switch (info.family_id) { #ifdef AMDGPU_FAMILY_SI case AMDGPU_FAMILY_SI: strncpy(dst, " (Hainan / Oland / Verde / Pitcairn / Tahiti)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_CI case AMDGPU_FAMILY_CI: strncpy(dst, " (Bonaire / Hawaii)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_KV case AMDGPU_FAMILY_KV: strncpy(dst, " (Kaveri / Kabini / Mullins)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_VI case AMDGPU_FAMILY_VI: strncpy(dst, " (Iceland / Tonga)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_CZ case AMDGPU_FAMILY_CZ: strncpy(dst, " (Carrizo / Stoney)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_AI case AMDGPU_FAMILY_AI: strncpy(dst, " (Vega10)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_RV case AMDGPU_FAMILY_RV: strncpy(dst, " (Raven)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_NV case AMDGPU_FAMILY_NV: strncpy(dst, " (Navi10)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_VGH case AMDGPU_FAMILY_VGH: strncpy(dst, " (Van Gogh)", remaining_len); break; #endif #ifdef AMDGPU_FAMILY_YC case AMDGPU_FAMILY_YC: strncpy(dst, " (Yellow Carp)", remaining_len); break; #endif default: break; } } } // Retrieve infos from sysfs. // 1) Fan // If multiple fans are present, use the first one. Some hardware do not wire // the sensor for the second fan, or use the same value as the first fan. // Critical temparature // temp1_* files should always be the GPU die in millidegrees Celsius if (gpu_info->hwmonDevice) { unsigned criticalTemp; int NreadPatterns = readAttributeFromDevice(gpu_info->hwmonDevice, "temp1_crit", "%u", &criticalTemp); if (NreadPatterns == 1) { SET_GPUINFO_STATIC(static_info, temperature_slowdown_threshold, criticalTemp); } // Emergency/shutdown temparature unsigned emergemcyTemp; NreadPatterns = readAttributeFromDevice(gpu_info->hwmonDevice, "temp1_emergency", "%u", &emergemcyTemp); if (NreadPatterns == 1) { SET_GPUINFO_STATIC(static_info, temperature_shutdown_threshold, emergemcyTemp); } } nvtop_pcie_link max_link_characteristics; int ret = nvtop_device_maximum_pcie_link(gpu_info->amdgpuDevice, &max_link_characteristics); if (ret >= 0) { SET_GPUINFO_STATIC(static_info, max_pcie_link_width, max_link_characteristics.width); unsigned pcieGen = nvtop_pcie_gen_from_link_speed(max_link_characteristics.speed); SET_GPUINFO_STATIC(static_info, max_pcie_gen, pcieGen); } // Mark integrated graphics if (info_query_success && (info.ids_flags & AMDGPU_IDS_FLAGS_FUSION)) { static_info->integrated_graphics = true; } // Checking if Encode and Decode are unified:AMDGPU_INFO_HW_IP_INFO if (_amdgpu_query_hw_ip_info) { struct drm_amdgpu_info_hw_ip vcn_ip_info; if (_amdgpu_query_hw_ip_info(gpu_info->amdgpu_device, AMDGPU_HW_IP_VCN_ENC, 0, &vcn_ip_info) == 0) { static_info->encode_decode_shared = vcn_ip_info.hw_ip_version_major >= 4; } } } static void gpuinfo_amdgpu_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_amdgpu *gpu_info = container_of(_gpu_info, struct gpu_info_amdgpu, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; bool info_query_success = false; struct amdgpu_gpu_info info; uint32_t out32; RESET_ALL(dynamic_info->valid); if (libdrm_amdgpu_handle && _amdgpu_query_gpu_info) info_query_success = !_amdgpu_query_gpu_info(gpu_info->amdgpu_device, &info); // GPU current speed if (libdrm_amdgpu_handle && _amdgpu_query_sensor_info) last_libdrm_return_status = _amdgpu_query_sensor_info(gpu_info->amdgpu_device, AMDGPU_INFO_SENSOR_GFX_SCLK, sizeof(out32), &out32); else last_libdrm_return_status = 1; if (!last_libdrm_return_status) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, out32); } // GPU max speed if (info_query_success) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed_max, info.max_engine_clk / 1000); } // Memory current speed if (libdrm_amdgpu_handle && _amdgpu_query_sensor_info) last_libdrm_return_status = _amdgpu_query_sensor_info(gpu_info->amdgpu_device, AMDGPU_INFO_SENSOR_GFX_MCLK, sizeof(out32), &out32); else last_libdrm_return_status = 1; if (!last_libdrm_return_status) { SET_GPUINFO_DYNAMIC(dynamic_info, mem_clock_speed, out32); } // Memory max speed if (info_query_success) { SET_GPUINFO_DYNAMIC(dynamic_info, mem_clock_speed_max, info.max_memory_clk / 1000); } // Load if (libdrm_amdgpu_handle && _amdgpu_query_sensor_info) last_libdrm_return_status = _amdgpu_query_sensor_info(gpu_info->amdgpu_device, AMDGPU_INFO_SENSOR_GPU_LOAD, sizeof(out32), &out32); else last_libdrm_return_status = 1; if (!last_libdrm_return_status) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate, out32); } // Memory usage struct drm_amdgpu_memory_info memory_info; if (libdrm_amdgpu_handle && _amdgpu_query_info) last_libdrm_return_status = _amdgpu_query_info(gpu_info->amdgpu_device, AMDGPU_INFO_MEMORY, sizeof(memory_info), &memory_info); else last_libdrm_return_status = 1; if (!last_libdrm_return_status) { // TODO: Determine if we want to include GTT (GPU accessible system memory) SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, memory_info.vram.total_heap_size); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, memory_info.vram.heap_usage); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, memory_info.vram.total_heap_size - dynamic_info->used_memory); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, (dynamic_info->total_memory - dynamic_info->free_memory) * 100 / dynamic_info->total_memory); } // GPU temperature if (libdrm_amdgpu_handle && _amdgpu_query_sensor_info) last_libdrm_return_status = _amdgpu_query_sensor_info(gpu_info->amdgpu_device, AMDGPU_INFO_SENSOR_GPU_TEMP, sizeof(out32), &out32); else last_libdrm_return_status = 1; if (!last_libdrm_return_status) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_temp, out32 / 1000); } // Fan speed unsigned currentFanSpeed; int patternsMatched = rewindAndReadPattern(gpu_info->fanSpeedFILE, "%u", ¤tFanSpeed); if (patternsMatched == 1) { SET_GPUINFO_DYNAMIC(dynamic_info, fan_speed, currentFanSpeed * 100 / gpu_info->maxFanValue); } // Device power usage if (libdrm_amdgpu_handle && _amdgpu_query_sensor_info) last_libdrm_return_status = _amdgpu_query_sensor_info(gpu_info->amdgpu_device, AMDGPU_INFO_SENSOR_GPU_AVG_POWER, sizeof(out32), &out32); else last_libdrm_return_status = 1; if (!last_libdrm_return_status) { SET_GPUINFO_DYNAMIC(dynamic_info, power_draw, out32 * 1000); } nvtop_pcie_link curr_link_characteristics; int ret = nvtop_device_current_pcie_link(gpu_info->amdgpuDevice, &curr_link_characteristics); if (ret >= 0) { SET_GPUINFO_DYNAMIC(dynamic_info, pcie_link_width, curr_link_characteristics.width); unsigned pcieGen = nvtop_pcie_gen_from_link_speed(curr_link_characteristics.speed); SET_GPUINFO_DYNAMIC(dynamic_info, pcie_link_gen, pcieGen); } // PCIe bandwidth if (gpu_info->PCIeBW) { // According to https://github.com/torvalds/linux/blob/master/drivers/gpu/drm/amd/pm/amdgpu_pm.c, under the pcie_bw // section, we should be able to read the number of packets received and sent by the GPU and get the maximum payload // size during the last second. This is untested but should work when the file is populated by the driver. uint64_t received, transmitted; int maxPayloadSize; int NreadPatterns = rewindAndReadPattern(gpu_info->PCIeBW, "%" SCNu64 " %" SCNu64 " %i", &received, &transmitted, &maxPayloadSize); if (NreadPatterns == 3) { received *= maxPayloadSize; transmitted *= maxPayloadSize; // Set in KiB received /= 1024; transmitted /= 1024; SET_GPUINFO_DYNAMIC(dynamic_info, pcie_rx, received); SET_GPUINFO_DYNAMIC(dynamic_info, pcie_tx, transmitted); } } if (gpu_info->powerCap) { // The power cap in microwatts unsigned powerCap; int NreadPatterns = rewindAndReadPattern(gpu_info->powerCap, "%u", &powerCap); if (NreadPatterns == 1) { SET_GPUINFO_DYNAMIC(dynamic_info, power_draw_max, powerCap / 1000); } } } static const char drm_amdgpu_pdev_old[] = "pdev"; static const char drm_amdgpu_vram_old[] = "vram mem"; static const char drm_amdgpu_vram[] = "drm-memory-vram"; static const char drm_amdgpu_gfx_old[] = "gfx"; static const char drm_amdgpu_gfx[] = "drm-engine-gfx"; static const char drm_amdgpu_compute_old[] = "compute"; static const char drm_amdgpu_compute[] = "drm-engine-compute"; static const char drm_amdgpu_dec_old[] = "dec"; static const char drm_amdgpu_dec[] = "drm-engine-dec"; static const char drm_amdgpu_enc_old[] = "enc"; static const char drm_amdgpu_enc[] = "drm-engine-enc"; static bool parse_drm_fdinfo_amd(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_amdgpu *gpu_info = container_of(info, struct gpu_info_amdgpu, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; bool client_id_set = false; unsigned cid; nvtop_time current_time; nvtop_get_current_time(¤t_time); while ((count = getline(&line, &line_buf_size, fdinfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; // see drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c amdgpu_show_fdinfo() if (!strcmp(key, drm_amdgpu_pdev_old) || !strcmp(key, drm_pdev)) { if (strcmp(val, gpu_info->base.pdev)) { return false; } } else if (!strcmp(key, drm_client_id)) { // Client id is a unique identifier. From the DRM documentation "Unique value relating to the open DRM // file descriptor used to distinguish duplicated and shared file descriptors. Conceptually the value should map // 1:1 to the in kernel representation of struct drm_file instances." char *endptr; cid = strtoul(val, &endptr, 10); if (*endptr) continue; client_id_set = true; } else if (!strcmp(key, drm_amdgpu_vram_old) || !strcmp(key, drm_amdgpu_vram)) { // TODO: do we count "gtt mem" too? unsigned long mem_int; char *endptr; mem_int = strtoul(val, &endptr, 10); if (endptr == val || (strcmp(endptr, " kB") && strcmp(endptr, " KiB"))) continue; SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, mem_int * 1024); } else { bool is_gfx_old = !strncmp(key, drm_amdgpu_gfx_old, sizeof(drm_amdgpu_gfx_old) - 1); bool is_compute_old = !strncmp(key, drm_amdgpu_compute_old, sizeof(drm_amdgpu_compute_old) - 1); bool is_dec_old = !strncmp(key, drm_amdgpu_dec_old, sizeof(drm_amdgpu_dec_old) - 1); bool is_enc_old = !strncmp(key, drm_amdgpu_enc_old, sizeof(drm_amdgpu_enc_old) - 1); bool is_gfx_new = !strncmp(key, drm_amdgpu_gfx, sizeof(drm_amdgpu_gfx) - 1); bool is_dec_new = !strncmp(key, drm_amdgpu_dec, sizeof(drm_amdgpu_dec) - 1); bool is_enc_new = !strncmp(key, drm_amdgpu_enc, sizeof(drm_amdgpu_enc) - 1); bool is_compute_new = !strncmp(key, drm_amdgpu_compute, sizeof(drm_amdgpu_compute) - 1); if (is_gfx_old || is_compute_old || is_dec_old || is_enc_old) { // The old interface exposes a usage percentage with an unknown update interval unsigned int usage_percent_int; char *key_off, *endptr; double usage_percent; if (is_gfx_old) key_off = key + sizeof(drm_amdgpu_gfx_old) - 1; else if (is_compute_old) key_off = key + sizeof(drm_amdgpu_compute_old) - 1; else if (is_dec_old) key_off = key + sizeof(drm_amdgpu_dec_old) - 1; else if (is_enc_old) key_off = key + sizeof(drm_amdgpu_enc_old) - 1; else continue; // The prefix should be followed by a number and only a number if (!*key_off) continue; strtoul(key_off, &endptr, 10); if (*endptr) continue; usage_percent_int = (unsigned int)(usage_percent = round(strtod(val, &endptr))); if (endptr == val || strcmp(endptr, "%")) continue; if (is_gfx_old) { process_info->type |= gpu_process_graphical; SET_GPUINFO_PROCESS(process_info, gpu_usage, process_info->gpu_usage + usage_percent_int); } else if (is_compute_old) { process_info->type |= gpu_process_compute; SET_GPUINFO_PROCESS(process_info, gpu_usage, process_info->gpu_usage + usage_percent_int); } else if (is_dec_old) { SET_GPUINFO_PROCESS(process_info, decode_usage, process_info->decode_usage + usage_percent_int); } else if (is_enc_old) { SET_GPUINFO_PROCESS(process_info, encode_usage, process_info->encode_usage + usage_percent_int); } } else if (is_gfx_new || is_compute_new || is_dec_new || is_enc_new) { char *endptr; uint64_t time_spent = strtoull(val, &endptr, 10); if (endptr == val || strcmp(endptr, " ns")) continue; if (is_gfx_new) { process_info->type |= gpu_process_graphical; SET_GPUINFO_PROCESS(process_info, gfx_engine_used, time_spent); } else if (is_compute_new) { process_info->type |= gpu_process_compute; SET_GPUINFO_PROCESS(process_info, compute_engine_used, time_spent); } else if (is_enc_new) { SET_GPUINFO_PROCESS(process_info, enc_engine_used, time_spent); } else if (is_dec_new) { SET_GPUINFO_PROCESS(process_info, dec_engine_used, time_spent); } } } } // The AMDGPU fdinfo interface in kernels >=5.19 is way nicer; it provides the // cumulative GPU engines (e.g., gfx, enc, dec) usage in nanoseconds. // Previously, we displayed the usage provided in fdinfo by the kernel/driver // which uses an internal update interval. Now, we can compute an accurate // busy percentage since the last measurement. if (client_id_set) { struct amdgpu_process_info_cache *cache_entry; struct unique_cache_id ucid = {.client_id = cid, .pid = process_info->pid, .pdev = gpu_info->base.pdev}; HASH_FIND_CLIENT(gpu_info->last_update_process_cache, &ucid, cache_entry); if (cache_entry) { uint64_t time_elapsed = nvtop_difftime_u64(cache_entry->last_measurement_tstamp, current_time); HASH_DEL(gpu_info->last_update_process_cache, cache_entry); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used) && AMDGPU_CACHE_FIELD_VALID(cache_entry, gfx_engine_used) && // In some rare occasions, the gfx engine usage reported by the driver is lowering (might be a driver bug) process_info->gfx_engine_used >= cache_entry->gfx_engine_used && process_info->gfx_engine_used - cache_entry->gfx_engine_used <= time_elapsed) { SET_GPUINFO_PROCESS(process_info, gpu_usage, busy_usage_from_time_usage_round(process_info->gfx_engine_used, cache_entry->gfx_engine_used, time_elapsed)); } if (GPUINFO_PROCESS_FIELD_VALID(process_info, compute_engine_used) && AMDGPU_CACHE_FIELD_VALID(cache_entry, compute_engine_used) && process_info->compute_engine_used >= cache_entry->compute_engine_used && process_info->compute_engine_used - cache_entry->compute_engine_used <= time_elapsed) { unsigned gfx_usage = GPUINFO_PROCESS_FIELD_VALID(process_info, gpu_usage) ? process_info->gpu_usage : 0; SET_GPUINFO_PROCESS(process_info, gpu_usage, gfx_usage + busy_usage_from_time_usage_round(process_info->compute_engine_used, cache_entry->compute_engine_used, time_elapsed)); } if (GPUINFO_PROCESS_FIELD_VALID(process_info, dec_engine_used) && AMDGPU_CACHE_FIELD_VALID(cache_entry, dec_engine_used) && process_info->dec_engine_used >= cache_entry->dec_engine_used && process_info->dec_engine_used - cache_entry->dec_engine_used <= time_elapsed) { SET_GPUINFO_PROCESS(process_info, decode_usage, busy_usage_from_time_usage_round(process_info->dec_engine_used, cache_entry->dec_engine_used, time_elapsed)); } if (GPUINFO_PROCESS_FIELD_VALID(process_info, enc_engine_used) && AMDGPU_CACHE_FIELD_VALID(cache_entry, enc_engine_used) && process_info->enc_engine_used >= cache_entry->enc_engine_used && process_info->enc_engine_used - cache_entry->enc_engine_used <= time_elapsed) { SET_GPUINFO_PROCESS(process_info, encode_usage, busy_usage_from_time_usage_round(process_info->enc_engine_used, cache_entry->enc_engine_used, time_elapsed)); } } else { cache_entry = calloc(1, sizeof(*cache_entry)); if (!cache_entry) goto parse_fdinfo_exit; cache_entry->client_id.client_id = cid; cache_entry->client_id.pid = process_info->pid; cache_entry->client_id.pdev = gpu_info->base.pdev; } // The UI only shows the decode usage when `encode_decode_shared` is true // but amdgpu should only use the encode usage field when it is shared. // Lets add both together for good measure. if (static_info->encode_decode_shared) SET_GPUINFO_PROCESS(process_info, decode_usage, process_info->decode_usage + process_info->encode_usage); #ifndef NDEBUG // We should only process one fdinfo entry per client id per update struct amdgpu_process_info_cache *cache_entry_check; HASH_FIND_CLIENT(gpu_info->current_update_process_cache, &cache_entry->client_id, cache_entry_check); assert(!cache_entry_check && "We should not be processing a client id twice per update"); #endif // Store this measurement data RESET_ALL(cache_entry->valid); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used)) SET_AMDGPU_CACHE(cache_entry, gfx_engine_used, process_info->gfx_engine_used); if (GPUINFO_PROCESS_FIELD_VALID(process_info, compute_engine_used)) SET_AMDGPU_CACHE(cache_entry, compute_engine_used, process_info->compute_engine_used); if (GPUINFO_PROCESS_FIELD_VALID(process_info, dec_engine_used)) SET_AMDGPU_CACHE(cache_entry, dec_engine_used, process_info->dec_engine_used); if (GPUINFO_PROCESS_FIELD_VALID(process_info, enc_engine_used)) SET_AMDGPU_CACHE(cache_entry, enc_engine_used, process_info->enc_engine_used); cache_entry->last_measurement_tstamp = current_time; HASH_ADD_CLIENT(gpu_info->current_update_process_cache, cache_entry); } parse_fdinfo_exit: return true; } static void swap_process_cache_for_next_update(struct gpu_info_amdgpu *gpu_info) { // Free old cache data and set the cache for the next update if (gpu_info->last_update_process_cache) { struct amdgpu_process_info_cache *cache_entry, *tmp; HASH_ITER(hh, gpu_info->last_update_process_cache, cache_entry, tmp) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); free(cache_entry); } } gpu_info->last_update_process_cache = gpu_info->current_update_process_cache; gpu_info->current_update_process_cache = NULL; } static void gpuinfo_amdgpu_get_running_processes(struct gpu_info *_gpu_info) { // For AMDGPU, we register a fdinfo callback that will fill the gpu_process datastructure of the gpu_info structure // for us. This avoids going through /proc multiple times per update for multiple GPUs. struct gpu_info_amdgpu *gpu_info = container_of(_gpu_info, struct gpu_info_amdgpu, base); swap_process_cache_for_next_update(gpu_info); } nvtop-3.2.0/src/extract_gpuinfo_amdgpu_utils.c000066400000000000000000000015511477175131100216040ustar00rootroot00000000000000/* * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. * * MIT License. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "amdgpu_ids.h" const char *amdgpu_parse_marketing_name(struct amdgpu_gpu_info *info); const char * amdgpu_parse_marketing_name(struct amdgpu_gpu_info *info) { int i; int ntypes = sizeof(amdgpu_ids) / sizeof(amdgpu_ids[0]); if (!info) return NULL; for (i = 0; i < ntypes; i++) { if (info->asic_id == amdgpu_ids[i].asic_id && info->pci_rev_id == amdgpu_ids[i].pci_rev_id) { return amdgpu_ids[i].name; } } return NULL; } nvtop-3.2.0/src/extract_gpuinfo_apple.m000066400000000000000000000220701477175131100202210ustar00rootroot00000000000000/* * Copyright (C) 2023 Robin Voetter * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/common.h" #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/time.h" #include #include #include #include struct gpu_info_apple { struct gpu_info base; id device; io_service_t gpu_service; }; static bool gpuinfo_apple_init(void); static void gpuinfo_apple_shutdown(void); static const char *gpuinfo_apple_last_error_string(void); static bool gpuinfo_apple_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_apple_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_apple_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_apple_get_running_processes(struct gpu_info *_gpu_info); static struct gpu_vendor gpu_vendor_apple = { .init = gpuinfo_apple_init, .shutdown = gpuinfo_apple_shutdown, .last_error_string = gpuinfo_apple_last_error_string, .get_device_handles = gpuinfo_apple_get_device_handles, .populate_static_info = gpuinfo_apple_populate_static_info, .refresh_dynamic_info = gpuinfo_apple_refresh_dynamic_info, .refresh_running_processes = gpuinfo_apple_get_running_processes, .name = "apple", }; static unsigned apple_gpu_count; static struct gpu_info_apple *gpu_infos; __attribute__((constructor)) static void init_extract_gpuinfo_apple(void) { register_gpu_vendor(&gpu_vendor_apple); } static bool gpuinfo_apple_init(void) { apple_gpu_count = 0; gpu_infos = NULL; return true; } static void gpuinfo_apple_shutdown(void) { for (unsigned i = 0; i < apple_gpu_count; ++i) { struct gpu_info_apple *gpu_info = &gpu_infos[i]; [gpu_info->device release]; IOObjectRelease(gpu_info->gpu_service); } free(gpu_infos); gpu_infos = NULL; apple_gpu_count = 0; } static const char *gpuinfo_apple_last_error_string(void) { return "An unanticipated error occurred while accessing Apple " "information\n"; } static bool gpuinfo_apple_get_device_handles(struct list_head *devices, unsigned *count) { NSArray> *mtl_devices = MTLCopyAllDevices(); const unsigned mtl_count = [mtl_devices count]; gpu_infos = calloc(mtl_count, sizeof(*gpu_infos)); for (unsigned int i = 0; i < mtl_count; ++i) { id dev = mtl_devices[i]; const uint64_t registry_id = [dev registryID]; const io_service_t gpu_service = IOServiceGetMatchingService(kIOMainPortDefault, IORegistryEntryIDMatching(registry_id)); assert(MACH_PORT_VALID(gpu_service)); gpu_infos[apple_gpu_count].base.vendor = &gpu_vendor_apple; gpu_infos[apple_gpu_count].device = dev; gpu_infos[i].gpu_service = gpu_service; list_add_tail(&gpu_infos[apple_gpu_count].base.list, devices); ++apple_gpu_count; } *count = apple_gpu_count; [mtl_devices release]; return true; } static void gpuinfo_apple_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_apple *gpu_info = container_of(_gpu_info, struct gpu_info_apple, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; RESET_ALL(static_info->valid); const char *name = [[gpu_info->device name] UTF8String]; strncpy(static_info->device_name, name, sizeof(static_info->device_name)); SET_VALID(gpuinfo_device_name_valid, static_info->valid); static_info->integrated_graphics = [gpu_info->device location] == MTLDeviceLocationBuiltIn; static_info->encode_decode_shared = true; } static void gpuinfo_apple_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_apple *gpu_info = container_of(_gpu_info, struct gpu_info_apple, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; RESET_ALL(dynamic_info->valid); CFMutableDictionaryRef cf_props; if (IORegistryEntryCreateCFProperties(gpu_info->gpu_service, &cf_props, kCFAllocatorDefault, kNilOptions) != kIOReturnSuccess) { return; } NSDictionary *props = (__bridge NSDictionary*) cf_props; NSDictionary *performance_statistics = [props objectForKey:@"PerformanceStatistics"]; if (!performance_statistics) { return; } id device_utilization_info = [performance_statistics objectForKey:@"Device Utilization %"]; if (device_utilization_info != nil) { const uint64_t gpu_util_rate = [device_utilization_info integerValue]; SET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate, gpu_util_rate); } if ([gpu_info->device hasUnifiedMemory]) { // [gpu_info->device currentAllocatedSize] returns the amount of memory allocated by this process, not // as allocated on the GPU globally. The performance statistics dictionary has the real value that we // are interested in, the amount of system memory allocated by the GPU. id system_memory_info = [performance_statistics objectForKey:@"Alloc system memory"]; if (system_memory_info != nil) { const uint64_t mem_used = [system_memory_info integerValue]; SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, mem_used); } // Memory is unified, so query the amount of system memory instead. mach_msg_type_number_t host_size = HOST_BASIC_INFO_COUNT; host_basic_info_data_t info; if (host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t) &info, &host_size) == KERN_SUCCESS) { SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, info.max_mem); } } else { // TODO: Figure out how to get used memory for this case. // It does not really seem to be possible to get the amount of memory of a particular GPU. // In this case, just get the recommended working set size. This is what MoltenVK also does. const uint64_t mem_total = [gpu_info->device recommendedMaxWorkingSetSize]; SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, mem_total); } CFRelease(props); if (GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, used_memory) && GPUINFO_DYNAMIC_FIELD_VALID(dynamic_info, total_memory)) { SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, dynamic_info->total_memory - dynamic_info->used_memory); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, (dynamic_info->total_memory - dynamic_info->free_memory) * 100 / dynamic_info->total_memory); } } static bool gpuinfo_apple_get_process_info(struct gpu_process* process, io_object_t user_client) { RESET_ALL(process->valid); process->type = gpu_process_graphical_compute; CFMutableDictionaryRef cf_props; if (IORegistryEntryCreateCFProperties(user_client, &cf_props, kCFAllocatorDefault, kNilOptions) != kIOReturnSuccess) { return false; } NSDictionary* user_client_info = (__bridge NSDictionary*) cf_props; id client_creator_info = [user_client_info objectForKey:@"IOUserClientCreator"]; if (client_creator_info == nil) { return false; } const char* client_creator = [client_creator_info UTF8String]; // Client creator is in form: pid , if (sscanf(client_creator, "pid %u,", &process->pid) < 1) { return false; } CFRelease(cf_props); return true; } static void gpuinfo_apple_get_running_processes(struct gpu_info *_gpu_info) { struct gpu_info_apple *gpu_info = container_of(_gpu_info, struct gpu_info_apple, base); _gpu_info->processes_count = 0; // We can find out which processes are running on a particular GPU using the IO Registry. The // IOService associated to the MTLDevice has "AGXDeviceUserClient" child nodes, which hold some // basic information about processes that are running on the GPU. io_iterator_t iterator; if (IORegistryEntryGetChildIterator(gpu_info->gpu_service, kIOServicePlane, &iterator) != kIOReturnSuccess) { return; } unsigned int count = 0; for (io_object_t child = IOIteratorNext(iterator); child; child = IOIteratorNext(iterator)) { io_name_t class_name; if (IOObjectGetClass(child, class_name) != kIOReturnSuccess) { continue; } else if (strncmp(class_name, "AGXDeviceUserClient", sizeof(class_name)) != 0) { continue; } if (_gpu_info->processes_array_size < count + 1) { _gpu_info->processes_array_size += COMMON_PROCESS_LINEAR_REALLOC_INC; _gpu_info->processes = reallocarray(_gpu_info->processes, _gpu_info->processes_array_size, sizeof(*_gpu_info->processes)); if (!_gpu_info->processes) { perror("Could not allocate memory: "); exit(EXIT_FAILURE); } } if (gpuinfo_apple_get_process_info(&_gpu_info->processes[count], child)) { ++count; } IOObjectRelease(child); } _gpu_info->processes_count = count; } nvtop-3.2.0/src/extract_gpuinfo_ascend.c000066400000000000000000000233311477175131100203440ustar00rootroot00000000000000/* * Copyright (C) 2023 klayer * * This file is part of Nvtop and adapted from Ascend DCMI from Huawei Technologies Co., Ltd. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include #include #include #include #include "ascend/dcmi_interface_api.h" #include "list.h" #include "nvtop/common.h" #include "nvtop/extract_gpuinfo_common.h" #define KB_TO_GB (1024 * 1024) #define DCMI_SUCCESS 0 #define MAX_DEVICE_NUM 64 #define MAX_PROC_NUM 32 #define PROC_ALLOC_INC 16 static int last_dcmi_return_status = DCMI_SUCCESS; static const char *unknown_error = "unknown Ascend DCMI error"; static const char *local_error_string = ""; struct gpu_info_ascend { struct gpu_info base; struct list_head allocate_list; }; static LIST_HEAD(allocations); static bool gpuinfo_ascend_init(void); static void gpuinfo_ascend_shutdown(void); static const char *gpuinfo_ascend_last_error_string(void); static bool gpuinfo_ascend_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_ascend_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_ascend_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_ascend_get_running_processes(struct gpu_info *_gpu_info); static void _encode_card_device_id_to_pdev(char *pdev, int card_id, int device_id); static void _decode_card_device_id_from_pdev(const char *pdev, int *card_id, int *device_id); struct gpu_vendor gpu_vendor_ascend = { .init = gpuinfo_ascend_init, .shutdown = gpuinfo_ascend_shutdown, .last_error_string = gpuinfo_ascend_last_error_string, .get_device_handles = gpuinfo_ascend_get_device_handles, .populate_static_info = gpuinfo_ascend_populate_static_info, .refresh_dynamic_info = gpuinfo_ascend_refresh_dynamic_info, .refresh_running_processes = gpuinfo_ascend_get_running_processes, .name = "Ascend", }; __attribute__((constructor)) static void init_extract_gpuinfo_ascend(void) { register_gpu_vendor(&gpu_vendor_ascend); } static bool gpuinfo_ascend_init(void) { last_dcmi_return_status = dcmi_init(); return last_dcmi_return_status == DCMI_SUCCESS; } static void gpuinfo_ascend_shutdown(void) { local_error_string = ""; struct gpu_info_ascend *allocated, *tmp; list_for_each_entry_safe(allocated, tmp, &allocations, allocate_list) { list_del(&allocated->allocate_list); free(allocated); } } static const char *gpuinfo_ascend_last_error_string(void) { return local_error_string; } static bool gpuinfo_ascend_get_device_handles(struct list_head *devices, unsigned *count) { int num_cards; int card_list[MAX_CARD_NUM] = {0}; last_dcmi_return_status = dcmi_get_card_list(&num_cards, card_list, MAX_DEVICE_NUM); if (last_dcmi_return_status != DCMI_SUCCESS) { local_error_string = "Failed to get card num"; return false; } else if (num_cards == 0) { local_error_string = "Not found NPU(s)"; return false; } int num_devices = 0; int card_device_list[num_cards]; for (int i = 0; i < num_cards; ++i) { int num_card_devices; last_dcmi_return_status = dcmi_get_device_num_in_card(card_list[i], &num_card_devices); if (last_dcmi_return_status != DCMI_SUCCESS) { local_error_string = "Failed to get device num of card"; return false; } num_devices += num_card_devices; card_device_list[i] = num_card_devices; } struct gpu_info_ascend *gpu_infos = calloc(num_devices, sizeof(*gpu_infos)); if (!gpu_infos) { local_error_string = strerror(errno); return false; } // todo: for free gpu_infos when shutting down, rewrite to direct free? list_add(&gpu_infos[0].allocate_list, &allocations); *count = 0; for (int i = 0; i < num_cards; ++i) { for (int j = 0; j < card_device_list[i]; ++j) { gpu_infos[*count].base.vendor = &gpu_vendor_ascend; _encode_card_device_id_to_pdev(gpu_infos[*count].base.pdev, i, j); list_add_tail(&gpu_infos[*count].base.list, devices); *count += 1; } } return true; } static void _encode_card_device_id_to_pdev(char *pdev, int card_id, int device_id) { sprintf(pdev, "%d-%d", (short)card_id, (short)device_id); } static void _decode_card_device_id_from_pdev(const char *pdev, int *card_id, int *device_id) { sscanf(pdev, "%d-%d", card_id, device_id); } static void gpuinfo_ascend_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_ascend *gpu_info = container_of(_gpu_info, struct gpu_info_ascend, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; static_info->integrated_graphics = false; static_info->encode_decode_shared = true; RESET_ALL(static_info->valid); int card_id, device_id; _decode_card_device_id_from_pdev(_gpu_info->pdev, &card_id, &device_id); struct dcmi_chip_info *chip_info = malloc(sizeof(struct dcmi_chip_info)); last_dcmi_return_status = dcmi_get_device_chip_info(card_id, device_id, chip_info); if (last_dcmi_return_status == DCMI_SUCCESS) { // assume Ascend only use ASCII code for chip name static_info->device_name[MAX_DEVICE_NAME - 1] = '\0'; strncpy(static_info->device_name, (char*) chip_info->chip_name, MAX_DEVICE_NAME - 1); SET_VALID(gpuinfo_device_name_valid, static_info->valid); } free(chip_info); // todo: it seems that other static infos are not supported by Ascend DCMI for now, will add if possible in future } static void gpuinfo_ascend_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_ascend *gpu_info = container_of(_gpu_info, struct gpu_info_ascend, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; RESET_ALL(dynamic_info->valid); int card_id, device_id; _decode_card_device_id_from_pdev(_gpu_info->pdev, &card_id, &device_id); unsigned aicore_freq; last_dcmi_return_status = dcmi_get_device_frequency(card_id, device_id, DCMI_FREQ_AICORE_CURRENT_, &aicore_freq); if (last_dcmi_return_status == DCMI_SUCCESS) { dynamic_info->gpu_clock_speed = aicore_freq; SET_VALID(gpuinfo_gpu_clock_speed_valid, dynamic_info->valid); } unsigned aicore_max_freq; last_dcmi_return_status = dcmi_get_device_frequency(card_id, device_id, DCMI_FREQ_AICORE_MAX, &aicore_max_freq); if (last_dcmi_return_status == DCMI_SUCCESS) { dynamic_info->gpu_clock_speed_max = aicore_max_freq; SET_VALID(gpuinfo_gpu_clock_speed_max_valid, dynamic_info->valid); } unsigned hbm_freq; last_dcmi_return_status = dcmi_get_device_frequency(card_id, device_id, DCMI_FREQ_HBM, &hbm_freq); if (last_dcmi_return_status == DCMI_SUCCESS) { dynamic_info->mem_clock_speed = hbm_freq; SET_VALID(gpuinfo_mem_clock_speed_valid, dynamic_info->valid); } unsigned aicore_util_rate; last_dcmi_return_status = dcmi_get_device_utilization_rate(card_id, device_id, DCMI_UTILIZATION_RATE_AICORE, &aicore_util_rate); if (last_dcmi_return_status == DCMI_SUCCESS) { dynamic_info->gpu_util_rate = aicore_util_rate; SET_VALID(gpuinfo_gpu_util_rate_valid, dynamic_info->valid); } struct dsmi_hbm_info_stru hbm_info; last_dcmi_return_status = dcmi_get_hbm_info(card_id, device_id, &hbm_info); if (last_dcmi_return_status == DCMI_SUCCESS) { SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, hbm_info.memory_size * KB_TO_GB); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, hbm_info.memory_usage * KB_TO_GB); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, (hbm_info.memory_size - hbm_info.memory_usage) * KB_TO_GB); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, hbm_info.memory_usage * 100 / hbm_info.memory_size); } int device_temperature; last_dcmi_return_status = dcmi_get_device_temperature(card_id, device_id, &device_temperature); if (last_dcmi_return_status == DCMI_SUCCESS) { dynamic_info->gpu_temp = device_temperature; SET_VALID(gpuinfo_gpu_temp_valid, dynamic_info->valid); } int power_usage; last_dcmi_return_status = dcmi_get_device_power_info(card_id, device_id, &power_usage); if (last_dcmi_return_status == DCMI_SUCCESS) { dynamic_info->power_draw = power_usage * 100; SET_VALID(gpuinfo_power_draw_valid, dynamic_info->valid); } } static void gpuinfo_ascend_get_running_processes(struct gpu_info *_gpu_info) { int card_id, device_id; _decode_card_device_id_from_pdev(_gpu_info->pdev, &card_id, &device_id); struct dcmi_proc_mem_info *proc_info = malloc(MAX_PROC_NUM * sizeof(struct dcmi_proc_mem_info)); int proc_num = 0; last_dcmi_return_status = dcmi_get_device_resource_info(card_id, device_id, proc_info, &proc_num); if (last_dcmi_return_status == DCMI_SUCCESS) { _gpu_info->processes_count = proc_num; _gpu_info->processes_array_size = proc_num + PROC_ALLOC_INC; _gpu_info->processes = reallocarray(_gpu_info->processes, _gpu_info->processes_array_size, sizeof(*_gpu_info->processes)); if (!_gpu_info->processes) { perror("Could not allocate memory: "); exit(EXIT_FAILURE); } for (int i = 0; i < proc_num; i++) { _gpu_info->processes[i].type = gpu_process_compute; _gpu_info->processes[i].pid = proc_info[i].proc_id; _gpu_info->processes[i].gpu_memory_usage = proc_info[i].proc_mem_usage; SET_VALID(gpuinfo_process_gpu_memory_usage_valid, _gpu_info->processes[i].valid); } } free(proc_info); }nvtop-3.2.0/src/extract_gpuinfo_intel.c000066400000000000000000000345411477175131100202270ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop and adapted from igt-gpu-tools from Intel Corporation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include "extract_gpuinfo_intel.h" #include #include #include #include #include #include static bool gpuinfo_intel_init(void); static void gpuinfo_intel_shutdown(void); static const char *gpuinfo_intel_last_error_string(void); static bool gpuinfo_intel_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_intel_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_intel_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_intel_get_running_processes(struct gpu_info *_gpu_info); struct gpu_vendor gpu_vendor_intel = { .init = gpuinfo_intel_init, .shutdown = gpuinfo_intel_shutdown, .last_error_string = gpuinfo_intel_last_error_string, .get_device_handles = gpuinfo_intel_get_device_handles, .populate_static_info = gpuinfo_intel_populate_static_info, .refresh_dynamic_info = gpuinfo_intel_refresh_dynamic_info, .refresh_running_processes = gpuinfo_intel_get_running_processes, .name = "Intel", }; unsigned intel_gpu_count; static struct gpu_info_intel *gpu_infos; #define STRINGIFY(x) STRINGIFY_HELPER_(x) #define STRINGIFY_HELPER_(x) #x #define VENDOR_INTEL 0x8086 #define VENDOR_INTEL_STR STRINGIFY(VENDOR_INTEL) // The integrated Intel GPU is always this device // Discrete GPU are others #define INTEGRATED_I915_GPU_PCI_ID "0000:00:02.0" __attribute__((constructor)) static void init_extract_gpuinfo_intel(void) { register_gpu_vendor(&gpu_vendor_intel); } bool gpuinfo_intel_init(void) { return true; } void gpuinfo_intel_shutdown(void) { for (unsigned i = 0; i < intel_gpu_count; ++i) { struct gpu_info_intel *current = &gpu_infos[i]; if (current->card_fd) close(current->card_fd); nvtop_device_unref(current->card_device); nvtop_device_unref(current->driver_device); } } const char *gpuinfo_intel_last_error_string(void) { return "Err"; } static bool parse_drm_fdinfo_intel(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_intel *gpu_info = container_of(info, struct gpu_info_intel, base); switch (gpu_info->driver) { case DRIVER_I915: return parse_drm_fdinfo_intel_i915(info, fdinfo_file, process_info); case DRIVER_XE: return parse_drm_fdinfo_intel_xe(info, fdinfo_file, process_info); } return false; } static void add_intel_cards(struct nvtop_device *dev, struct list_head *devices, unsigned *count) { struct nvtop_device *parent; if (nvtop_device_get_parent(dev, &parent) < 0) return; // Consider enabled Intel cards using the i915 or xe driver const char *vendor, *driver, *enabled; if (nvtop_device_get_sysattr_value(parent, "vendor", &vendor) < 0 || strcmp(vendor, VENDOR_INTEL_STR)) return; if (nvtop_device_get_driver(parent, &driver) < 0 || (strcmp(driver, "i915") && strcmp(driver, "xe"))) return; if (nvtop_device_get_sysattr_value(parent, "enable", &enabled) < 0 || strcmp(enabled, "1")) return; struct gpu_info_intel *thisGPU = &gpu_infos[intel_gpu_count++]; thisGPU->base.vendor = &gpu_vendor_intel; thisGPU->driver = !strcmp(driver, "xe") ? DRIVER_XE : DRIVER_I915; thisGPU->card_device = nvtop_device_ref(dev); thisGPU->driver_device = nvtop_device_ref(parent); thisGPU->hwmon_device = nvtop_device_get_hwmon(thisGPU->driver_device); const char *devname; if (nvtop_device_get_devname(thisGPU->card_device, &devname) >= 0) thisGPU->card_fd = open(devname, O_WRONLY); const char *pdev_val; int retval = nvtop_device_get_property_value(thisGPU->driver_device, "PCI_SLOT_NAME", &pdev_val); assert(retval >= 0 && pdev_val != NULL && "Could not retrieve device PCI slot name"); strncpy(thisGPU->base.pdev, pdev_val, PDEV_LEN); list_add_tail(&thisGPU->base.list, devices); // Register a fdinfo callback for this GPU processinfo_register_fdinfo_callback(parse_drm_fdinfo_intel, &thisGPU->base); (*count)++; } bool gpuinfo_intel_get_device_handles(struct list_head *devices_list, unsigned *count) { *count = 0; nvtop_device_enumerator *enumerator; if (nvtop_enumerator_new(&enumerator) < 0) return false; if (nvtop_device_enumerator_add_match_subsystem(enumerator, "drm", true) < 0) return false; if (nvtop_device_enumerator_add_match_property(enumerator, "DEVNAME", "/dev/dri/*") < 0) return false; unsigned num_devices = 0; for (nvtop_device *device = nvtop_enumerator_get_device_first(enumerator); device; device = nvtop_enumerator_get_device_next(enumerator)) { num_devices++; } gpu_infos = calloc(num_devices, sizeof(*gpu_infos)); if (!gpu_infos) return false; for (nvtop_device *device = nvtop_enumerator_get_device_first(enumerator); device; device = nvtop_enumerator_get_device_next(enumerator)) { num_devices++; const char *devname; if (nvtop_device_get_devname(device, &devname) < 0) continue; if (strstr(devname, "/dev/dri/card")) { add_intel_cards(device, devices_list, count); } } nvtop_enumerator_unref(enumerator); return true; } void gpuinfo_intel_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_intel *gpu_info = container_of(_gpu_info, struct gpu_info_intel, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; const char *dev_name; static_info->integrated_graphics = false; static_info->encode_decode_shared = true; RESET_ALL(static_info->valid); if (nvtop_device_get_property_value(gpu_info->driver_device, "ID_MODEL_FROM_DATABASE", &dev_name) >= 0) { snprintf(static_info->device_name, sizeof(static_info->device_name), "%s", dev_name); SET_VALID(gpuinfo_device_name_valid, static_info->valid); for (size_t idx = 0; idx < sizeof(static_info->device_name) && static_info->device_name[idx] != '\0'; ++idx) { if (static_info->device_name[idx] == '[') static_info->device_name[idx] = '('; if (static_info->device_name[idx] == ']') static_info->device_name[idx] = ')'; } } // Mark integrated GPUs if (strcmp(gpu_info->base.pdev, INTEGRATED_I915_GPU_PCI_ID) == 0) { static_info->integrated_graphics = true; } nvtop_pcie_link max_link_characteristics; int ret = nvtop_device_maximum_pcie_link(gpu_info->driver_device, &max_link_characteristics); if (ret >= 0) { // Some cards report PCIe GEN 1@ 1x, attempt to detect this and get the card's bridge link speeds gpu_info->bridge_device = gpu_info->driver_device; struct nvtop_device *parent; const char *vendor, *class; unsigned attempts = 0; while (ret >= 0 && static_info->integrated_graphics == false && // check likely incorrect speed max_link_characteristics.width == 1 && max_link_characteristics.speed == 2 && // check vendor nvtop_device_get_sysattr_value(gpu_info->bridge_device, "vendor", &vendor) == 0 && strcmp(vendor, VENDOR_INTEL_STR) == 0 && // check class is either VGA or (non-host) PCI Bridge nvtop_device_get_sysattr_value(gpu_info->bridge_device, "class", &class) == 0 && (strcmp(class, "0x030000") == 0 || strcmp(class, "0x060400") == 0) && // don't go more than 2 levels up attempts++ < 2) { ret = nvtop_device_get_parent(gpu_info->bridge_device, &parent); if (ret >= 0 && nvtop_device_maximum_pcie_link(parent, &max_link_characteristics) >= 0) { gpu_info->bridge_device = parent; } } SET_GPUINFO_STATIC(static_info, max_pcie_link_width, max_link_characteristics.width); unsigned pcieGen = nvtop_pcie_gen_from_link_speed(max_link_characteristics.speed); SET_GPUINFO_STATIC(static_info, max_pcie_gen, pcieGen); } } void gpuinfo_intel_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_intel *gpu_info = container_of(_gpu_info, struct gpu_info_intel, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; RESET_ALL(dynamic_info->valid); // We are creating new devices because the device_get_sysattr_value caches its querries const char *syspath; nvtop_device *card_dev_noncached = NULL; if (nvtop_device_get_syspath(gpu_info->card_device, &syspath) >= 0) nvtop_device_new_from_syspath(&card_dev_noncached, syspath); nvtop_device *driver_dev_noncached = NULL; if (nvtop_device_get_syspath(gpu_info->driver_device, &syspath) >= 0) nvtop_device_new_from_syspath(&driver_dev_noncached, syspath); nvtop_device *hwmon_dev_noncached = NULL; if (gpu_info->hwmon_device) { if (nvtop_device_get_syspath(gpu_info->hwmon_device, &syspath) >= 0) nvtop_device_new_from_syspath(&hwmon_dev_noncached, syspath); } nvtop_device *bridge_dev_noncached = NULL; if (gpu_info->bridge_device) { if (nvtop_device_get_syspath(gpu_info->bridge_device, &syspath) >= 0) nvtop_device_new_from_syspath(&bridge_dev_noncached, syspath); } else { bridge_dev_noncached = driver_dev_noncached; } nvtop_device *clock_device = gpu_info->driver == DRIVER_XE ? driver_dev_noncached : card_dev_noncached; // GPU clock const char *gt_cur_freq; const char *gt_cur_freq_sysattr = gpu_info->driver == DRIVER_XE ? "tile0/gt0/freq0/cur_freq" : "gt_cur_freq_mhz"; if (nvtop_device_get_sysattr_value(clock_device, gt_cur_freq_sysattr, >_cur_freq) >= 0) { unsigned val = strtoul(gt_cur_freq, NULL, 10); SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, val); } const char *gt_max_freq; const char *gt_max_freq_sysattr = gpu_info->driver == DRIVER_XE ? "tile0/gt0/freq0/max_freq" : "gt_max_freq_mhz"; if (nvtop_device_get_sysattr_value(clock_device, gt_max_freq_sysattr, >_max_freq) >= 0) { unsigned val = strtoul(gt_max_freq, NULL, 10); SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed_max, val); } if (!static_info->integrated_graphics) { nvtop_pcie_link curr_link_characteristics; int ret = nvtop_device_current_pcie_link(bridge_dev_noncached, &curr_link_characteristics); if (ret >= 0) { SET_GPUINFO_DYNAMIC(dynamic_info, pcie_link_width, curr_link_characteristics.width); unsigned pcieGen = nvtop_pcie_gen_from_link_speed(curr_link_characteristics.speed); SET_GPUINFO_DYNAMIC(dynamic_info, pcie_link_gen, pcieGen); } } if (hwmon_dev_noncached) { const char *hwmon_fan; if (nvtop_device_get_sysattr_value(hwmon_dev_noncached, "fan1_input", &hwmon_fan) >= 0) { unsigned val = strtoul(hwmon_fan, NULL, 10); SET_GPUINFO_DYNAMIC(dynamic_info, fan_rpm, val); } const char *hwmon_temp; // temp1 is for i915, power2 is for `pkg` on xe if (nvtop_device_get_sysattr_value(hwmon_dev_noncached, "temp1_input", &hwmon_temp) >= 0 || nvtop_device_get_sysattr_value(hwmon_dev_noncached, "temp2_input", &hwmon_temp) >= 0) { unsigned val = strtoul(hwmon_temp, NULL, 10); SET_GPUINFO_DYNAMIC(dynamic_info, gpu_temp, val / 1000); } const char *hwmon_power_max; // power1 is for i915 and `card` on supported cards on xe, power2 is `pkg` on xe if (nvtop_device_get_sysattr_value(hwmon_dev_noncached, "power1_max", &hwmon_power_max) >= 0 || nvtop_device_get_sysattr_value(hwmon_dev_noncached, "power2_max", &hwmon_power_max) >= 0) { unsigned val = strtoul(hwmon_power_max, NULL, 10); SET_GPUINFO_DYNAMIC(dynamic_info, power_draw_max, val / 1000); } const char *hwmon_energy; // energy1 is for i915 and `card` on supported cards on xe, energy2 is `pkg` on xe if (nvtop_device_get_sysattr_value(hwmon_dev_noncached, "energy1_input", &hwmon_energy) >= 0 || nvtop_device_get_sysattr_value(hwmon_dev_noncached, "energy2_input", &hwmon_energy) >= 0) { nvtop_time ts; nvtop_get_current_time(&ts); unsigned val = strtoul(hwmon_energy, NULL, 10); unsigned old = gpu_info->energy.energy_uj; uint64_t time = nvtop_difftime_u64(gpu_info->energy.time, ts); // Skip the first update so we have a time delta if (gpu_info->energy.time.tv_sec != 0) { unsigned power = ((val - old) * 1000000000LL) / time; SET_GPUINFO_DYNAMIC(dynamic_info, power_draw, power / 1000); } gpu_info->energy.energy_uj = val; gpu_info->energy.time = ts; } } switch (gpu_info->driver) { case DRIVER_I915: gpuinfo_intel_i915_refresh_dynamic_info(_gpu_info); break; case DRIVER_XE: gpuinfo_intel_xe_refresh_dynamic_info(_gpu_info); break; } // Let the temporary devices be garbage collected nvtop_device_unref(card_dev_noncached); nvtop_device_unref(driver_dev_noncached); if (hwmon_dev_noncached) nvtop_device_unref(hwmon_dev_noncached); } static void swap_process_cache_for_next_update(struct gpu_info_intel *gpu_info) { // Free old cache data and set the cache for the next update if (gpu_info->last_update_process_cache) { struct intel_process_info_cache *cache_entry, *tmp; HASH_ITER(hh, gpu_info->last_update_process_cache, cache_entry, tmp) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); free(cache_entry); } } gpu_info->last_update_process_cache = gpu_info->current_update_process_cache; gpu_info->current_update_process_cache = NULL; } void gpuinfo_intel_get_running_processes(struct gpu_info *_gpu_info) { // For Intel, we register a fdinfo callback that will fill the gpu_process datastructure of the gpu_info structure // for us. This avoids going through /proc multiple times per update for multiple GPUs. struct gpu_info_intel *gpu_info = container_of(_gpu_info, struct gpu_info_intel, base); swap_process_cache_for_next_update(gpu_info); } nvtop-3.2.0/src/extract_gpuinfo_intel.h000066400000000000000000000045731477175131100202360ustar00rootroot00000000000000#include #include #define HASH_FIND_CLIENT(head, key_ptr, out_ptr) HASH_FIND(hh, head, key_ptr, sizeof(struct unique_cache_id), out_ptr) #define HASH_ADD_CLIENT(head, in_ptr) HASH_ADD(hh, head, client_id, sizeof(struct unique_cache_id), in_ptr) #define SET_INTEL_CACHE(cachePtr, field, value) SET_VALUE(cachePtr, field, value, intel_cache_) #define RESET_INTEL_CACHE(cachePtr, field) INVALIDATE_VALUE(cachePtr, field, intel_cache_) #define INTEL_CACHE_FIELD_VALID(cachePtr, field) VALUE_IS_VALID(cachePtr, field, intel_cache_) enum intel_process_info_cache_valid { intel_cache_engine_render_valid = 0, intel_cache_engine_copy_valid, intel_cache_engine_video_valid, intel_cache_engine_video_enhance_valid, intel_cache_engine_compute_valid, intel_cache_gpu_cycles_valid, intel_cache_total_cycles_valid, intel_cache_process_info_cache_valid_count }; struct __attribute__((__packed__)) unique_cache_id { unsigned client_id; pid_t pid; char *pdev; }; union intel_cycles { struct { uint64_t rcs; uint64_t vcs; uint64_t vecs; uint64_t bcs; uint64_t ccs; }; uint64_t array[5]; }; struct intel_process_info_cache { struct unique_cache_id client_id; uint64_t engine_render; uint64_t engine_copy; uint64_t engine_video; uint64_t engine_video_enhance; uint64_t engine_compute; union intel_cycles gpu_cycles; union intel_cycles total_cycles; nvtop_time last_measurement_tstamp; unsigned char valid[(intel_cache_process_info_cache_valid_count + CHAR_BIT - 1) / CHAR_BIT]; UT_hash_handle hh; }; struct gpu_info_intel { struct gpu_info base; enum { DRIVER_I915, DRIVER_XE } driver; struct nvtop_device *card_device; int card_fd; struct nvtop_device *driver_device; struct nvtop_device *hwmon_device; struct intel_process_info_cache *last_update_process_cache, *current_update_process_cache; // Cached processes info struct nvtop_device *bridge_device; struct { unsigned energy_uj; struct timespec time; } energy; }; extern void gpuinfo_intel_i915_refresh_dynamic_info(struct gpu_info *_gpu_info); extern void gpuinfo_intel_xe_refresh_dynamic_info(struct gpu_info *_gpu_info); extern bool parse_drm_fdinfo_intel_i915(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info); extern bool parse_drm_fdinfo_intel_xe(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info); nvtop-3.2.0/src/extract_gpuinfo_intel_i915.c000066400000000000000000000311341477175131100207710ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop and adapted from igt-gpu-tools from Intel Corporation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include "extract_gpuinfo_intel.h" #include #include #include #include #include #include #include #include #include #ifndef DRM_I915_QUERY_MEMORY_REGIONS // The versions of libdrm < 2.4.114 don't provide // DRM_I915_QUERY_MEMORY_REGIONS. // Copied from more recent libdrm/i915_drm.h #define DRM_I915_QUERY_MEMORY_REGIONS 4 #define I915_MEMORY_CLASS_DEVICE 1 struct drm_i915_memory_region_info { struct { __u16 memory_class; __u16 memory_instance; } region; __u32 rsvd0; __u64 probed_size; __u64 unallocated_size; union { __u64 rsvd1[8]; struct { __u64 probed_cpu_visible_size; __u64 unallocated_cpu_visible_size; }; }; }; struct drm_i915_query_memory_regions { __u32 num_regions; __u32 rsvd[3]; struct drm_i915_memory_region_info regions[]; }; #endif // not defined(DRM_I915_QUERY_MEMORY_REGIONS) // Copied from https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/intel/common/intel_gem.h static inline int intel_ioctl(int fd, unsigned long request, void *arg) { int ret; do { ret = ioctl(fd, request, arg); } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); return ret; } // End Copy // Copied from https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/intel/common/i915/intel_gem.h static inline int intel_i915_query(int fd, uint64_t query_id, void *buffer, int32_t *buffer_len) { struct drm_i915_query_item item = { .query_id = query_id, .length = *buffer_len, .flags = 0, .data_ptr = (uintptr_t)buffer, }; struct drm_i915_query args = { .num_items = 1, .flags = 0, .items_ptr = (uintptr_t)&item, }; int ret = intel_ioctl(fd, DRM_IOCTL_I915_QUERY, &args); if (ret != 0) return -errno; else if (item.length < 0) return item.length; *buffer_len = item.length; return 0; } static inline void *intel_i915_query_alloc_fetch(int fd, uint64_t query_id, int32_t *query_length) { if (query_length) *query_length = 0; int32_t length = 0; int ret = intel_i915_query(fd, query_id, NULL, &length); if (ret < 0) return NULL; void *data = calloc(1, length); assert(data != NULL); /* This shouldn't happen in practice */ if (data == NULL) return NULL; ret = intel_i915_query(fd, query_id, data, &length); assert(ret == 0); /* We should have caught the error above */ if (ret < 0) { free(data); return NULL; } if (query_length) *query_length = length; return data; } // End Copy void gpuinfo_intel_i915_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_intel *gpu_info = container_of(_gpu_info, struct gpu_info_intel, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; if (gpu_info->card_fd) { int32_t length = 0; struct drm_i915_query_memory_regions *regions = intel_i915_query_alloc_fetch(gpu_info->card_fd, DRM_I915_QUERY_MEMORY_REGIONS, &length); if (regions) { for (unsigned i = 0; i < regions->num_regions; i++) { struct drm_i915_memory_region_info mr = regions->regions[i]; // ARC will have device memory and system memory, integrated graphics will have only one system region if (mr.region.memory_class == I915_MEMORY_CLASS_DEVICE || regions->num_regions == 1) { SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, mr.probed_size); // i915 will report the total memory as the unallocated size if we don't have CAP_PERFMON if (mr.unallocated_size != mr.probed_size) { SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, mr.unallocated_size); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, dynamic_info->total_memory - dynamic_info->free_memory); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, dynamic_info->used_memory * 100 / dynamic_info->total_memory); } break; } } free(regions); } } } static const char i915_drm_intel_render[] = "drm-engine-render"; static const char i915_drm_intel_copy[] = "drm-engine-copy"; static const char i915_drm_intel_video[] = "drm-engine-video"; static const char i915_drm_intel_video_enhance[] = "drm-engine-video-enhance"; static const char i915_drm_intel_compute[] = "drm-engine-compute"; static const char i915_drm_intel_vram[] = "drm-total-local0"; static const char i915_drm_intel_gtt[] = "drm-total-system0"; bool parse_drm_fdinfo_intel_i915(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_intel *gpu_info = container_of(info, struct gpu_info_intel, base); static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; bool client_id_set = false; unsigned cid; nvtop_time current_time; nvtop_get_current_time(¤t_time); while ((count = getline(&line, &line_buf_size, fdinfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; if (!strcmp(key, drm_pdev)) { if (strcmp(val, gpu_info->base.pdev)) { return false; } } else if (!strcmp(key, drm_client_id)) { char *endptr; cid = strtoul(val, &endptr, 10); if (*endptr) continue; client_id_set = true; } else { bool is_render = !strcmp(key, i915_drm_intel_render); bool is_copy = !strcmp(key, i915_drm_intel_copy); bool is_video = !strcmp(key, i915_drm_intel_video); bool is_video_enhance = !strcmp(key, i915_drm_intel_video_enhance); bool is_compute = !strcmp(key, i915_drm_intel_compute); if (!strcmp(key, i915_drm_intel_vram) || !strcmp(key, i915_drm_intel_gtt)) { unsigned long mem_int; char *endptr; mem_int = strtoul(val, &endptr, 10); if (endptr == val || (strcmp(endptr, " kB") && strcmp(endptr, " KiB"))) continue; if GPUINFO_PROCESS_FIELD_VALID (process_info, gpu_memory_usage) SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, process_info->gpu_memory_usage + (mem_int * 1024)); else SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, mem_int * 1024); } else if (is_render || is_copy || is_video || is_video_enhance || is_compute) { char *endptr; uint64_t time_spent = strtoull(val, &endptr, 10); if (endptr == val || strcmp(endptr, " ns")) continue; if (is_render) { SET_GPUINFO_PROCESS(process_info, gfx_engine_used, time_spent); } if (is_copy) { // TODO: what is copy? } if (is_video) { // Video represents encode and decode SET_GPUINFO_PROCESS(process_info, dec_engine_used, time_spent); SET_GPUINFO_PROCESS(process_info, enc_engine_used, time_spent); } if (is_video_enhance) { // TODO: what is this } if (is_compute) { SET_GPUINFO_PROCESS(process_info, compute_engine_used, time_spent); } } } } if (!client_id_set) return false; process_info->type = gpu_process_unknown; if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used) && process_info->gfx_engine_used > 0) process_info->type |= gpu_process_graphical; if (GPUINFO_PROCESS_FIELD_VALID(process_info, compute_engine_used) && process_info->compute_engine_used > 0) process_info->type |= gpu_process_compute; struct intel_process_info_cache *cache_entry; struct unique_cache_id ucid = {.client_id = cid, .pid = process_info->pid, .pdev = gpu_info->base.pdev}; HASH_FIND_CLIENT(gpu_info->last_update_process_cache, &ucid, cache_entry); // TODO: find how to extract global utilization // gpu util will be computed as the sum of all the processes utilization for now if (cache_entry) { uint64_t time_elapsed = nvtop_difftime_u64(cache_entry->last_measurement_tstamp, current_time); HASH_DEL(gpu_info->last_update_process_cache, cache_entry); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used) && INTEL_CACHE_FIELD_VALID(cache_entry, engine_render) && // In some rare occasions, the gfx engine usage reported by the driver is lowering (might be a driver bug) process_info->gfx_engine_used >= cache_entry->engine_render && process_info->gfx_engine_used - cache_entry->engine_render <= time_elapsed) { SET_GPUINFO_PROCESS( process_info, gpu_usage, busy_usage_from_time_usage_round(process_info->gfx_engine_used, cache_entry->engine_render, time_elapsed)); } if (GPUINFO_PROCESS_FIELD_VALID(process_info, dec_engine_used) && INTEL_CACHE_FIELD_VALID(cache_entry, engine_video) && process_info->dec_engine_used >= cache_entry->engine_video && process_info->dec_engine_used - cache_entry->engine_video <= time_elapsed) { SET_GPUINFO_PROCESS( process_info, decode_usage, busy_usage_from_time_usage_round(process_info->dec_engine_used, cache_entry->engine_video, time_elapsed)); } if (GPUINFO_PROCESS_FIELD_VALID(process_info, enc_engine_used) && INTEL_CACHE_FIELD_VALID(cache_entry, engine_video_enhance) && process_info->enc_engine_used >= cache_entry->engine_video_enhance && process_info->enc_engine_used - cache_entry->engine_video_enhance <= time_elapsed) { SET_GPUINFO_PROCESS(process_info, encode_usage, busy_usage_from_time_usage_round(process_info->enc_engine_used, cache_entry->engine_video_enhance, time_elapsed)); } if (GPUINFO_PROCESS_FIELD_VALID(process_info, compute_engine_used) && GPUINFO_PROCESS_FIELD_VALID(process_info, gpu_usage) && INTEL_CACHE_FIELD_VALID(cache_entry, engine_compute) && process_info->compute_engine_used >= cache_entry->engine_compute && process_info->compute_engine_used - cache_entry->engine_compute <= time_elapsed) { SET_GPUINFO_PROCESS(process_info, gpu_usage, process_info->gpu_usage + busy_usage_from_time_usage_round(process_info->compute_engine_used, cache_entry->engine_compute, time_elapsed)); } } else { cache_entry = calloc(1, sizeof(*cache_entry)); if (!cache_entry) goto parse_fdinfo_exit; cache_entry->client_id.client_id = cid; cache_entry->client_id.pid = process_info->pid; cache_entry->client_id.pdev = gpu_info->base.pdev; } #ifndef NDEBUG // We should only process one fdinfo entry per client id per update struct intel_process_info_cache *cache_entry_check; HASH_FIND_CLIENT(gpu_info->current_update_process_cache, &cache_entry->client_id, cache_entry_check); assert(!cache_entry_check && "We should not be processing a client id twice per update"); #endif RESET_ALL(cache_entry->valid); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used)) SET_INTEL_CACHE(cache_entry, engine_render, process_info->gfx_engine_used); if (GPUINFO_PROCESS_FIELD_VALID(process_info, dec_engine_used)) SET_INTEL_CACHE(cache_entry, engine_video, process_info->dec_engine_used); if (GPUINFO_PROCESS_FIELD_VALID(process_info, enc_engine_used)) SET_INTEL_CACHE(cache_entry, engine_video_enhance, process_info->enc_engine_used); if (GPUINFO_PROCESS_FIELD_VALID(process_info, compute_engine_used)) SET_INTEL_CACHE(cache_entry, engine_compute, process_info->compute_engine_used); cache_entry->last_measurement_tstamp = current_time; HASH_ADD_CLIENT(gpu_info->current_update_process_cache, cache_entry); parse_fdinfo_exit: return true; }nvtop-3.2.0/src/extract_gpuinfo_intel_xe.c000066400000000000000000000232421477175131100207170ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop and adapted from igt-gpu-tools from Intel Corporation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include "extract_gpuinfo_intel.h" #include #include #include #include #include #include #include #include #include #include #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) // Copied from https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/intel/common/intel_gem.h static inline int intel_ioctl(int fd, unsigned long request, void *arg) { int ret; do { ret = ioctl(fd, request, arg); } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); return ret; } // End Copy // Copied from https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/intel/common/xe/intel_device_query.c static void *xe_device_query_alloc_fetch(int fd, uint32_t query_id, uint32_t *len) { struct drm_xe_device_query query = { .query = query_id, }; if (intel_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) return NULL; void *data = calloc(1, query.size); if (!data) return NULL; query.data = (uintptr_t)data; if (intel_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query)) { free(data); return NULL; } if (len) *len = query.size; return data; } // End Copy void gpuinfo_intel_xe_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_intel *gpu_info = container_of(_gpu_info, struct gpu_info_intel, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; if (gpu_info->card_fd) { uint32_t length = 0; struct drm_xe_query_mem_regions *regions = xe_device_query_alloc_fetch(gpu_info->card_fd, DRM_XE_DEVICE_QUERY_MEM_REGIONS, &length); if (regions) { for (unsigned i = 0; i < regions->num_mem_regions; i++) { struct drm_xe_mem_region mr = regions->mem_regions[i]; // ARC will have VRAM and SYSMEM, integrated graphics will have only one SYSMEM region if (mr.mem_class == DRM_XE_MEM_REGION_CLASS_VRAM || regions->num_mem_regions == 1) { SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, mr.total_size); // xe will report 0 kb used if we don't have CAP_PERFMON if (mr.used != 0) { SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, mr.used); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, dynamic_info->total_memory - dynamic_info->used_memory); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, dynamic_info->used_memory * 100 / dynamic_info->total_memory); } break; } } free(regions); } } } static const char xe_drm_intel_vram[] = "drm-total-vram0"; // static const char xe_drm_intel_gtt[] = "drm-total-gtt"; // Render static const char xe_drm_intel_cycles_rcs[] = "drm-cycles-rcs"; static const char xe_drm_intel_total_cycles_rcs[] = "drm-total-cycles-rcs"; // Video Decode static const char xe_drm_intel_cycles_vcs[] = "drm-cycles-vcs"; static const char xe_drm_intel_total_cycles_vcs[] = "drm-total-cycles-vcs"; // Video Enhance static const char xe_drm_intel_cycles_vecs[] = "drm-cycles-vecs"; static const char xe_drm_intel_total_cycles_vecs[] = "drm-total-cycles-vecs"; // Copy static const char xe_drm_intel_cycles_bcs[] = "drm-cycles-bcs"; static const char xe_drm_intel_total_cycles_bcs[] = "drm-total-cycles-bcs"; // Compute static const char xe_drm_intel_cycles_ccs[] = "drm-cycles-ccs"; static const char xe_drm_intel_total_cycles_ccs[] = "drm-total-cycles-ccs"; static const char *cycles_keys[] = {xe_drm_intel_cycles_rcs, xe_drm_intel_cycles_vcs, xe_drm_intel_cycles_vecs, xe_drm_intel_cycles_bcs, xe_drm_intel_cycles_ccs}; static const char *total_cycles_keys[] = {xe_drm_intel_total_cycles_rcs, xe_drm_intel_total_cycles_vcs, xe_drm_intel_total_cycles_vecs, xe_drm_intel_total_cycles_bcs, xe_drm_intel_total_cycles_ccs}; bool parse_drm_fdinfo_intel_xe(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_intel *gpu_info = container_of(info, struct gpu_info_intel, base); static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; bool client_id_set = false; unsigned cid; nvtop_time current_time; nvtop_get_current_time(¤t_time); union intel_cycles gpu_cycles = {.array = {0}}; union intel_cycles total_cycles = {.array = {0}}; while ((count = getline(&line, &line_buf_size, fdinfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; if (!strcmp(key, drm_pdev)) { if (strcmp(val, gpu_info->base.pdev)) { return false; } } else if (!strcmp(key, drm_client_id)) { char *endptr; cid = strtoul(val, &endptr, 10); if (*endptr) continue; client_id_set = true; } else { if (!strcmp(key, xe_drm_intel_vram)) { unsigned long mem_int; char *endptr; mem_int = strtoul(val, &endptr, 10); if (endptr == val || (strcmp(endptr, " kB") && strcmp(endptr, " KiB"))) continue; if GPUINFO_PROCESS_FIELD_VALID (process_info, gpu_memory_usage) SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, process_info->gpu_memory_usage + (mem_int * 1024)); else SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, mem_int * 1024); } else { unsigned long cycles; char *endptr; // Check for cycles for (unsigned i = 0; i < ARRAY_SIZE(gpu_cycles.array); i++) { if (!strcmp(key, cycles_keys[i])) { cycles = strtoull(val, &endptr, 10); gpu_cycles.array[i] = cycles; } } // Check for total cycles for (unsigned i = 0; i < ARRAY_SIZE(total_cycles_keys); i++) { if (!strcmp(key, total_cycles_keys[i])) { cycles = strtoull(val, &endptr, 10); total_cycles.array[i] = cycles; } } } } } // Sum cycles for overall usage { uint64_t cycles_sum = 0; for (unsigned i = 0; i < ARRAY_SIZE(gpu_cycles.array); i++) { cycles_sum += gpu_cycles.array[i]; } SET_GPUINFO_PROCESS(process_info, gpu_cycles, cycles_sum); } if (!client_id_set) return false; process_info->type = gpu_process_unknown; if (gpu_cycles.rcs != 0) process_info->type |= gpu_process_graphical; if (gpu_cycles.ccs != 0) process_info->type |= gpu_process_compute; struct intel_process_info_cache *cache_entry; struct unique_cache_id ucid = {.client_id = cid, .pid = process_info->pid, .pdev = gpu_info->base.pdev}; HASH_FIND_CLIENT(gpu_info->last_update_process_cache, &ucid, cache_entry); if (cache_entry) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); // TODO: find how to extract global utilization // gpu util will be computed as the sum of all the processes utilization for now { uint64_t cycles_delta = gpu_cycles.rcs - cache_entry->gpu_cycles.rcs; uint64_t total_cycles_delta = total_cycles.rcs - cache_entry->total_cycles.rcs; if (total_cycles_delta > 0) SET_GPUINFO_PROCESS(process_info, gpu_usage, cycles_delta * 100 / total_cycles_delta); else SET_GPUINFO_PROCESS(process_info, gpu_usage, 0); } { uint64_t cycles_delta = gpu_cycles.ccs - cache_entry->gpu_cycles.ccs; uint64_t total_cycles_delta = total_cycles.ccs - cache_entry->total_cycles.ccs; if (total_cycles_delta > 0) SET_GPUINFO_PROCESS(process_info, gpu_usage, process_info->gpu_usage + cycles_delta * 100 / total_cycles_delta); } { uint64_t cycles_delta = gpu_cycles.vcs - cache_entry->gpu_cycles.vcs; uint64_t total_cycles_delta = total_cycles.vcs - cache_entry->total_cycles.vcs; if (total_cycles_delta > 0) SET_GPUINFO_PROCESS(process_info, decode_usage, cycles_delta * 100 / total_cycles_delta); } } else { cache_entry = calloc(1, sizeof(*cache_entry)); if (!cache_entry) goto parse_fdinfo_exit; cache_entry->client_id.client_id = cid; cache_entry->client_id.pid = process_info->pid; cache_entry->client_id.pdev = gpu_info->base.pdev; } #ifndef NDEBUG // We should only process one fdinfo entry per client id per update struct intel_process_info_cache *cache_entry_check; HASH_FIND_CLIENT(gpu_info->current_update_process_cache, &cache_entry->client_id, cache_entry_check); assert(!cache_entry_check && "We should not be processing a client id twice per update"); #endif RESET_ALL(cache_entry->valid); SET_INTEL_CACHE(cache_entry, gpu_cycles, gpu_cycles); SET_INTEL_CACHE(cache_entry, total_cycles, total_cycles); HASH_ADD_CLIENT(gpu_info->current_update_process_cache, cache_entry); parse_fdinfo_exit: return true; }nvtop-3.2.0/src/extract_gpuinfo_mali_common.c000066400000000000000000000412121477175131100213770ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * This file is part of Nvtop and adapted from the msm implementation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include #include #include #include #include #include "mali_common.h" enum mali_process_info_cache_valid { mali_cache_engine_render_valid = 0, mali_cache_process_info_cache_valid_count }; struct __attribute__((__packed__)) unique_cache_id { unsigned client_id; pid_t pid; }; struct mali_process_info_cache { struct unique_cache_id client_id; uint64_t engine_render; uint64_t last_cycles; nvtop_time last_measurement_tstamp; unsigned char valid[(mali_cache_process_info_cache_valid_count + CHAR_BIT - 1) / CHAR_BIT]; UT_hash_handle hh; }; bool mali_init_drm_funcs(struct drmFuncTable *drmFuncs, struct mali_gpu_state *state) { state->libdrm_handle = dlopen("libdrm.so", RTLD_LAZY); if (!state->libdrm_handle) state->libdrm_handle = dlopen("libdrm.so.2", RTLD_LAZY); if (!state->libdrm_handle) state->libdrm_handle = dlopen("libdrm.so.1", RTLD_LAZY); if (!state->libdrm_handle) { state->local_error_string = dlerror(); return false; } drmFuncs->drmGetDevices2 = dlsym(state->libdrm_handle, "drmGetDevices2"); if (!drmFuncs->drmGetDevices2) drmFuncs->drmGetDevices = dlsym(state->libdrm_handle, "drmGetDevices"); if (!drmFuncs->drmGetDevices2 && !drmFuncs->drmGetDevices) goto init_error_clean_exit; drmFuncs->drmFreeDevices = dlsym(state->libdrm_handle, "drmFreeDevices"); if (!drmFuncs->drmFreeDevices) goto init_error_clean_exit; drmFuncs->drmGetVersion = dlsym(state->libdrm_handle, "drmGetVersion"); if (!drmFuncs->drmGetVersion) goto init_error_clean_exit; drmFuncs->drmFreeVersion = dlsym(state->libdrm_handle, "drmFreeVersion"); if (!drmFuncs->drmFreeVersion) goto init_error_clean_exit; drmFuncs->drmGetMagic = dlsym(state->libdrm_handle, "drmGetMagic"); if (!drmFuncs->drmGetMagic) goto init_error_clean_exit; drmFuncs->drmAuthMagic = dlsym(state->libdrm_handle, "drmAuthMagic"); if (!drmFuncs->drmAuthMagic) goto init_error_clean_exit; drmFuncs->drmDropMaster = dlsym(state->libdrm_handle, "drmDropMaster"); if (!drmFuncs->drmDropMaster) goto init_error_clean_exit; drmFuncs->drmCommandWriteRead = dlsym(state->libdrm_handle, "drmCommandWriteRead"); if (!drmFuncs->drmCommandWriteRead) goto init_error_clean_exit; drmFuncs->drmGetDeviceFromDevId = dlsym(state->libdrm_handle, "drmGetDeviceFromDevId"); if (!drmFuncs->drmGetDeviceFromDevId) goto init_error_clean_exit; drmFuncs->drmIoctl = dlsym(state->libdrm_handle, "drmIoctl"); if (!drmFuncs->drmCommandWriteRead) goto init_error_clean_exit; state->local_error_string = NULL; state->meminfo_file = fopen("/proc/meminfo", "r"); if (!state->meminfo_file) goto init_error_clean_exit; state->didnt_call_gpuinfo_init = "uninitialized"; return true; init_error_clean_exit: dlclose(state->libdrm_handle); state->libdrm_handle = NULL; return false; } void mali_deinit_drm(struct mali_gpu_state *state) { dlclose(state->libdrm_handle); state->libdrm_handle = NULL; } void mali_shutdown_common(struct mali_gpu_state *state, struct drmFuncTable *funcs) { for (unsigned i = 0; i < state->mali_gpu_count; ++i) { struct gpu_info_mali *current = &state->gpu_infos[i]; funcs->drmFreeVersion(current->drmVersion); } free(state->gpu_infos); state->gpu_infos = NULL; state->mali_gpu_count = 0; if (state->libdrm_handle) { dlclose(state->libdrm_handle); state->libdrm_handle = NULL; state->local_error_string = state->didnt_call_gpuinfo_init; } if (state->meminfo_file) { fclose(state->meminfo_file); state->meminfo_file = NULL; } } const char *mali_common_last_error_string(struct mali_gpu_state *state, const char *drivername, char error_str[]) { if (state->local_error_string) { return state->local_error_string; } else if (state->last_libdrm_return_status < 0) { switch (state->last_libdrm_return_status) { case DRM_ERR_NO_DEVICE: return "no device\n"; case DRM_ERR_NO_ACCESS: return "no access\n"; case DRM_ERR_NOT_ROOT: return "not root\n"; case DRM_ERR_INVALID: return "invalid args\n"; case DRM_ERR_NO_FD: return "no fd\n"; default: return "unknown error\n"; } } else { int ret = snprintf(error_str, MAX_ERR_STRING_LEN, "An unanticipated error occurred while accessing %s information\n", drivername); if (ret >= MAX_ERR_STRING_LEN) error_str[MAX_ERR_STRING_LEN - 1] = '\0'; return error_str; } } static int wrap_drmGetDevices(drmDevicePtr devices[], int max_devices, struct drmFuncTable *funcs) { assert(funcs->drmGetDevices2 || funcs->drmGetDevices); if (funcs->drmGetDevices2) return funcs->drmGetDevices2(0, devices, max_devices); return funcs->drmGetDevices(devices, max_devices); } static void authenticate_drm(int fd, struct drmFuncTable *funcs) { drm_magic_t magic; if (funcs->drmGetMagic(fd, &magic) < 0) { return; } if (funcs->drmAuthMagic(fd, magic) == 0) { if (funcs->drmDropMaster(fd)) { perror("Failed to drop DRM master"); fprintf( stderr, "\nWARNING: other DRM clients will crash on VT switch while nvtop is running!\npress ENTER to continue\n"); fgetc(stdin); } return; } // XXX: Ideally I'd implement this too, but I'd need to pull in libxcb and yet // more functions and structs that may break ABI compatibility. // See radeontop auth_xcb.c for what is involved here fprintf(stderr, "Failed to authenticate to DRM; XCB authentication unimplemented\n"); } bool mali_common_get_device_handles(struct mali_gpu_state *state, struct drmFuncTable *funcs, struct gpu_vendor *vendor, processinfo_fdinfo_callback callback, struct list_head *devices, unsigned *count, bool (*handle_model) (struct gpu_info_mali *), enum mali_version version) { if (!state->libdrm_handle || version >= MALI_VERSIONS) return false; state->last_libdrm_return_status = wrap_drmGetDevices(NULL, 0, funcs); if (state->last_libdrm_return_status <= 0) return false; drmDevicePtr devs[state->last_libdrm_return_status]; state->last_libdrm_return_status = wrap_drmGetDevices(devs, state->last_libdrm_return_status, funcs); if (state->last_libdrm_return_status <= 0) return false; unsigned int libdrm_count = state->last_libdrm_return_status; state->gpu_infos = calloc(libdrm_count, sizeof(*state->gpu_infos)); if (!state->gpu_infos) { state->local_error_string = strerror(errno); return false; } state->gpu_infos->version = version; state->mali_gpu_count = 0; for (unsigned int i = 0; i < libdrm_count; i++) { int fd = -1; // Try render node first if (1 << DRM_NODE_RENDER & devs[i]->available_nodes) { fd = open(devs[i]->nodes[DRM_NODE_RENDER], O_RDWR); } if (fd < 0) { // Fallback to primary node (control nodes are unused according to the DRM documentation) if (1 << DRM_NODE_PRIMARY & devs[i]->available_nodes) { fd = open(devs[i]->nodes[DRM_NODE_PRIMARY], O_RDWR); } } if (fd < 0) continue; drmVersionPtr ver = funcs->drmGetVersion(fd); if (!ver) { close(fd); continue; } if (strcmp(ver->name, vendor->name)) { funcs->drmFreeVersion(ver); close(fd); continue; } authenticate_drm(fd, funcs); state->gpu_infos[state->mali_gpu_count].drmVersion = ver; state->gpu_infos[state->mali_gpu_count].fd = fd; state->gpu_infos[state->mali_gpu_count].base.vendor = vendor; list_add_tail(&state->gpu_infos[state->mali_gpu_count].base.list, devices); // Register a fdinfo callback for this GPU processinfo_register_fdinfo_callback(callback, &state->gpu_infos[state->mali_gpu_count].base); if (handle_model) { if (!handle_model(&state->gpu_infos[state->mali_gpu_count])) { funcs->drmFreeVersion(ver); close(fd); continue; } } state->mali_gpu_count++; } funcs->drmFreeDevices(devs, libdrm_count); *count = state->mali_gpu_count; return true; } uint64_t parse_memory_multiplier(const char *str) { if (strcmp(str, " B") == 0) { return 1; } else if (strcmp(str, " KiB") == 0 || strcmp(str, " kB") == 0) { return 1024; } else if (strcmp(str, " MiB") == 0) { return 1024 * 1024; } else if (strcmp(str, " GiB") == 0) { return 1024 * 1024 * 1024; } return 1; } void mali_common_refresh_dynamic_info(struct gpuinfo_dynamic_info *dynamic_info, struct mali_gpu_state *state, const char *meminfo_total, const char *meminfo_available) { RESET_ALL(dynamic_info->valid); rewind(state->meminfo_file); fflush(state->meminfo_file); static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; uint64_t mem_total = 0; uint64_t mem_available = 0; size_t keys_acquired = 0; while (keys_acquired != 2 && (count = getline(&line, &line_buf_size, state->meminfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; bool is_total = !strcmp(key, meminfo_total); bool is_available = !strcmp(key, meminfo_available); if (is_total || is_available) { uint64_t mem_int; char *endptr; mem_int = strtoull(val, &endptr, 10); if (endptr == val) continue; mem_int *= parse_memory_multiplier(endptr); if (is_total) { mem_total = mem_int; } else if (is_available) { mem_available = mem_int; } ++keys_acquired; } } SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, mem_total); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, mem_total - mem_available); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, mem_available); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, (dynamic_info->total_memory - dynamic_info->free_memory) * 100 / dynamic_info->total_memory); } static void swap_process_cache_for_next_update(struct gpu_info_mali *gpu_info) { // Free old cache data and set the cache for the next update if (gpu_info->last_update_process_cache) { struct mali_process_info_cache *cache_entry, *tmp; HASH_ITER(hh, gpu_info->last_update_process_cache, cache_entry, tmp) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); free(cache_entry); } } gpu_info->last_update_process_cache = gpu_info->current_update_process_cache; gpu_info->current_update_process_cache = NULL; } void mali_common_get_running_processes(struct gpu_info *_gpu_info, enum mali_version version) { // For Mali, we register a fdinfo callback that will fill the gpu_process datastructure of the gpu_info structure // for us. This avoids going through /proc multiple times per update for multiple GPUs. struct gpu_info_mali *gpu_info = container_of(_gpu_info, struct gpu_info_mali, base); if (gpu_info->version != version) { fprintf(stderr, "Wrong device version: %u\n", gpu_info->version); abort(); } swap_process_cache_for_next_update(gpu_info); } void mali_common_parse_fdinfo_handle_cache(struct gpu_info_mali *gpu_info, struct gpu_process *process_info, nvtop_time current_time, uint64_t total_cycles, unsigned cid, bool engine_count) { struct mali_process_info_cache *cache_entry; struct unique_cache_id ucid = {.client_id = cid, .pid = process_info->pid}; HASH_FIND_CLIENT(gpu_info->last_update_process_cache, &ucid, cache_entry); if (cache_entry) { uint64_t time_elapsed = nvtop_difftime_u64(cache_entry->last_measurement_tstamp, current_time); SET_GPUINFO_PROCESS(process_info, sample_delta, time_elapsed); if (engine_count) SET_GPUINFO_PROCESS(process_info, gpu_cycles, total_cycles - cache_entry->last_cycles); cache_entry->last_cycles = total_cycles; HASH_DEL(gpu_info->last_update_process_cache, cache_entry); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used) && MALI_CACHE_FIELD_VALID(cache_entry, engine_render) && // In some rare occasions, the gfx engine usage reported by the driver is lowering (might be a driver bug) process_info->gfx_engine_used >= cache_entry->engine_render && process_info->gfx_engine_used - cache_entry->engine_render <= time_elapsed) { SET_GPUINFO_PROCESS( process_info, gpu_usage, busy_usage_from_time_usage_round(process_info->gfx_engine_used, cache_entry->engine_render, time_elapsed)); } } else { cache_entry = calloc(1, sizeof(*cache_entry)); if (!cache_entry) return; cache_entry->client_id.client_id = cid; cache_entry->client_id.pid = process_info->pid; cache_entry->last_cycles = total_cycles; } #ifndef NDEBUG // We should only process one fdinfo entry per client id per update struct mali_process_info_cache *cache_entry_check; HASH_FIND_CLIENT(gpu_info->current_update_process_cache, &cache_entry->client_id, cache_entry_check); assert(!cache_entry_check && "We should not be processing a client id twice per update"); #endif RESET_ALL(cache_entry->valid); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used)) SET_MALI_CACHE(cache_entry, engine_render, process_info->gfx_engine_used); cache_entry->last_measurement_tstamp = current_time; HASH_ADD_CLIENT(gpu_info->current_update_process_cache, cache_entry); } bool mali_common_parse_drm_fdinfo(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info, struct gpuinfo_dynamic_info *dynamic_info, check_fdinfo_keys match_keys, struct fdinfo_data *fid) { static char *line = NULL; static size_t line_buf_size = 0; uint64_t total_time = 0; bool client_id_set = false; ssize_t count = 0; fid->engine_count = 0; fid->total_cycles = 0; while ((count = getline(&line, &line_buf_size, fdinfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; if (!strcmp(key, "drm-driver")) { if (strcmp(val, info->vendor->name)) { return false; } } else if(!strcmp(key, drm_client_id)) { char *endptr; fid->cid = strtoul(val, &endptr, 10); if (*endptr) continue; client_id_set = true; } else { bool is_engine, is_cycles, is_maxfreq, is_curfreq, is_resident; match_keys(&is_engine, &is_cycles, &is_maxfreq, &is_curfreq, &is_resident, key); if (is_engine) { char *endptr; uint64_t time_spent = strtoull(val, &endptr, 10); if (endptr == val || strcmp(endptr, " ns")) continue; total_time += time_spent; fid->engine_count++; } else if (is_maxfreq || is_curfreq) { char *endptr; uint64_t freq = strtoull(val, &endptr, 10); if (endptr == val || strcmp(endptr, " Hz")) continue; if (is_maxfreq) SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed_max, freq / 1000000); else SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, freq / 1000000); } else if (is_cycles) { char *endptr; uint64_t cycles = strtoull(val, &endptr, 10); if (endptr == val) continue; fid->total_cycles += cycles; } else if (is_resident) { uint64_t mem_int; char *endptr; mem_int = strtoull(val, &endptr, 10); if (endptr == val) continue; uint64_t multiplier = parse_memory_multiplier(endptr); SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, mem_int * multiplier); } } } if (fid->engine_count) SET_GPUINFO_PROCESS(process_info, gfx_engine_used, total_time); if (!client_id_set) return false; // driver does not expose compute engine metrics as of yet process_info->type |= gpu_process_graphical; return true; } nvtop-3.2.0/src/extract_gpuinfo_msm.c000066400000000000000000000442101477175131100177020ustar00rootroot00000000000000/* * * Copyright (C) 2023 Ryan Houdek * * This file is part of Nvtop and adapted from the amdgpu implementation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include #include #include #include #include #include #include #include #include #include #include // extern const char * msm_parse_marketing_name(uint64_t gpu_id); #define HASH_FIND_CLIENT(head, key_ptr, out_ptr) HASH_FIND(hh, head, key_ptr, sizeof(unsigned), out_ptr) #define HASH_ADD_CLIENT(head, in_ptr) HASH_ADD(hh, head, client_id, sizeof(unsigned), in_ptr) #define SET_MSM_CACHE(cachePtr, field, value) SET_VALUE(cachePtr, field, value, msm_cache_) #define RESET_MSM_CACHE(cachePtr, field) INVALIDATE_VALUE(cachePtr, field, msm_cache_) #define MSM_CACHE_FIELD_VALID(cachePtr, field) VALUE_IS_VALID(cachePtr, field, msm_cache_) enum intel_process_info_cache_valid { msm_cache_engine_render_valid = 0, msm_cache_process_info_cache_valid_count }; struct __attribute__((__packed__)) unique_cache_id { unsigned client_id; pid_t pid; }; struct msm_process_info_cache { struct unique_cache_id client_id; uint64_t engine_render; nvtop_time last_measurement_tstamp; unsigned char valid[(msm_cache_process_info_cache_valid_count + CHAR_BIT - 1) / CHAR_BIT]; UT_hash_handle hh; }; struct gpu_info_msm { drmVersionPtr drmVersion; struct gpu_info base; int fd; struct msm_process_info_cache *last_update_process_cache, *current_update_process_cache; // Cached processes info }; static bool gpuinfo_msm_init(void); static void gpuinfo_msm_shutdown(void); static const char *gpuinfo_msm_last_error_string(void); static bool gpuinfo_msm_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_msm_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_msm_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_msm_get_running_processes(struct gpu_info *_gpu_info); struct gpu_vendor gpu_vendor_msm = { .init = gpuinfo_msm_init, .shutdown = gpuinfo_msm_shutdown, .last_error_string = gpuinfo_msm_last_error_string, .get_device_handles = gpuinfo_msm_get_device_handles, .populate_static_info = gpuinfo_msm_populate_static_info, .refresh_dynamic_info = gpuinfo_msm_refresh_dynamic_info, .refresh_running_processes = gpuinfo_msm_get_running_processes, .name = "msm", }; unsigned msm_gpu_count; static struct gpu_info_msm *gpu_infos; static void *libdrm_handle; static FILE* meminfo_file = NULL; static int last_libdrm_return_status = 0; static char didnt_call_gpuinfo_init[] = "uninitialized"; static const char *local_error_string = didnt_call_gpuinfo_init; // Local function pointers to DRM interface static typeof(drmGetDevices) *_drmGetDevices; static typeof(drmGetDevices2) *_drmGetDevices2; static typeof(drmFreeDevices) *_drmFreeDevices; static typeof(drmGetVersion) *_drmGetVersion; static typeof(drmFreeVersion) *_drmFreeVersion; static typeof(drmGetMagic) *_drmGetMagic; static typeof(drmAuthMagic) *_drmAuthMagic; static typeof(drmDropMaster) *_drmDropMaster; static typeof(drmCommandWriteRead) *_drmCommandWriteRead; static int wrap_drmGetDevices(drmDevicePtr devices[], int max_devices) { assert(_drmGetDevices2 || _drmGetDevices); if (_drmGetDevices2) return _drmGetDevices2(0, devices, max_devices); return _drmGetDevices(devices, max_devices); } static void authenticate_drm(int fd) { drm_magic_t magic; if (_drmGetMagic(fd, &magic) < 0) { return; } if (_drmAuthMagic(fd, magic) == 0) { if (_drmDropMaster(fd)) { perror("Failed to drop DRM master"); fprintf( stderr, "\nWARNING: other DRM clients will crash on VT switch while nvtop is running!\npress ENTER to continue\n"); fgetc(stdin); } return; } // XXX: Ideally I'd implement this too, but I'd need to pull in libxcb and yet // more functions and structs that may break ABI compatibility. // See radeontop auth_xcb.c for what is involved here fprintf(stderr, "Failed to authenticate to DRM; XCB authentication unimplemented\n"); } #define STRINGIFY(x) STRINGIFY_HELPER_(x) #define STRINGIFY_HELPER_(x) #x __attribute__((constructor)) static void init_extract_gpuinfo_msm(void) { register_gpu_vendor(&gpu_vendor_msm); } bool gpuinfo_msm_init(void) { libdrm_handle = dlopen("libdrm.so", RTLD_LAZY); if (!libdrm_handle) libdrm_handle = dlopen("libdrm.so.2", RTLD_LAZY); if (!libdrm_handle) libdrm_handle = dlopen("libdrm.so.1", RTLD_LAZY); if (!libdrm_handle) { local_error_string = dlerror(); return false; } _drmGetDevices2 = dlsym(libdrm_handle, "drmGetDevices2"); if (!_drmGetDevices2) _drmGetDevices = dlsym(libdrm_handle, "drmGetDevices"); if (!_drmGetDevices2 && !_drmGetDevices) goto init_error_clean_exit; _drmFreeDevices = dlsym(libdrm_handle, "drmFreeDevices"); if (!_drmFreeDevices) goto init_error_clean_exit; _drmGetVersion = dlsym(libdrm_handle, "drmGetVersion"); if (!_drmGetVersion) goto init_error_clean_exit; _drmFreeVersion = dlsym(libdrm_handle, "drmFreeVersion"); if (!_drmFreeVersion) goto init_error_clean_exit; _drmGetMagic = dlsym(libdrm_handle, "drmGetMagic"); if (!_drmGetMagic) goto init_error_clean_exit; _drmAuthMagic = dlsym(libdrm_handle, "drmAuthMagic"); if (!_drmAuthMagic) goto init_error_clean_exit; _drmDropMaster = dlsym(libdrm_handle, "drmDropMaster"); if (!_drmDropMaster) goto init_error_clean_exit; _drmCommandWriteRead = dlsym(libdrm_handle, "drmCommandWriteRead"); if (!_drmCommandWriteRead) goto init_error_clean_exit; local_error_string = NULL; meminfo_file = fopen("/proc/meminfo", "r"); return true; init_error_clean_exit: dlclose(libdrm_handle); libdrm_handle = NULL; return false; } void gpuinfo_msm_shutdown(void) { for (unsigned i = 0; i < msm_gpu_count; ++i) { struct gpu_info_msm *current = &gpu_infos[i]; _drmFreeVersion(current->drmVersion); } free(gpu_infos); gpu_infos = NULL; msm_gpu_count = 0; if (libdrm_handle) { dlclose(libdrm_handle); libdrm_handle = NULL; local_error_string = didnt_call_gpuinfo_init; } if (meminfo_file) { fclose(meminfo_file); meminfo_file = NULL; } } static const char *gpuinfo_msm_last_error_string(void) { if (local_error_string) { return local_error_string; } else if (last_libdrm_return_status < 0) { switch (last_libdrm_return_status) { case DRM_ERR_NO_DEVICE: return "no device\n"; case DRM_ERR_NO_ACCESS: return "no access\n"; case DRM_ERR_NOT_ROOT: return "not root\n"; case DRM_ERR_INVALID: return "invalid args\n"; case DRM_ERR_NO_FD: return "no fd\n"; default: return "unknown error\n"; } } else { return "An unanticipated error occurred while accessing AMDGPU " "information\n"; } } static uint64_t parse_memory_multiplier(const char *str) { if (strcmp(str, " B") == 0) { return 1; } else if (strcmp(str, " KiB") == 0 || strcmp(str, " kB") == 0) { return 1024; } else if (strcmp(str, " MiB") == 0) { return 1024 * 1024; } else if (strcmp(str, " GiB") == 0) { return 1024 * 1024 * 1024; } return 1; } static const char drm_msm_engine_gpu[] = "drm-engine-gpu"; static const char drm_msm_cycles_gpu[] = "drm-cycles-gpu"; static const char drm_msm_maxfreq_gpu[] = "drm-maxfreq-gpu"; static const char drm_msm_resident_mem[] = "drm-resident-memory"; static bool parse_drm_fdinfo_msm(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_msm *gpu_info = container_of(info, struct gpu_info_msm, base); static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; bool client_id_set = false; unsigned cid; nvtop_time current_time; nvtop_get_current_time(¤t_time); while ((count = getline(&line, &line_buf_size, fdinfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; if (!strcmp(key, drm_client_id)) { char *endptr; cid = strtoul(val, &endptr, 10); if (*endptr) continue; client_id_set = true; } else { bool is_engine = !strcmp(key, drm_msm_engine_gpu); bool is_cycles = !strcmp(key, drm_msm_cycles_gpu); bool is_maxfreq = !strcmp(key, drm_msm_maxfreq_gpu); bool is_resident = !strcmp(key, drm_msm_resident_mem); if (is_engine || is_cycles || is_maxfreq) { char *endptr; uint64_t time_spent = strtoull(val, &endptr, 10); if (endptr == val || strcmp(endptr, " ns")) continue; if (is_engine) { SET_GPUINFO_PROCESS(process_info, gfx_engine_used, time_spent); } } else if (is_resident) { uint64_t mem_int; char *endptr; mem_int = strtoull(val, &endptr, 10); if (endptr == val) continue; uint64_t multiplier = parse_memory_multiplier(endptr); SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, mem_int * multiplier); } } } if (!client_id_set) return false; // The msm driver does not expose compute engine metrics as of yet process_info->type |= gpu_process_graphical; struct msm_process_info_cache *cache_entry; struct unique_cache_id ucid = {.client_id = cid, .pid = process_info->pid}; HASH_FIND_CLIENT(gpu_info->last_update_process_cache, &ucid, cache_entry); if (cache_entry) { uint64_t time_elapsed = nvtop_difftime_u64(cache_entry->last_measurement_tstamp, current_time); HASH_DEL(gpu_info->last_update_process_cache, cache_entry); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used) && MSM_CACHE_FIELD_VALID(cache_entry, engine_render) && // In some rare occasions, the gfx engine usage reported by the driver is lowering (might be a driver bug) process_info->gfx_engine_used >= cache_entry->engine_render && process_info->gfx_engine_used - cache_entry->engine_render <= time_elapsed) { SET_GPUINFO_PROCESS( process_info, gpu_usage, busy_usage_from_time_usage_round(process_info->gfx_engine_used, cache_entry->engine_render, time_elapsed)); } } else { cache_entry = calloc(1, sizeof(*cache_entry)); if (!cache_entry) goto parse_fdinfo_exit; cache_entry->client_id.client_id = cid; cache_entry->client_id.pid = process_info->pid; } #ifndef NDEBUG // We should only process one fdinfo entry per client id per update struct msm_process_info_cache *cache_entry_check; HASH_FIND_CLIENT(gpu_info->current_update_process_cache, &cid, cache_entry_check); assert(!cache_entry_check && "We should not be processing a client id twice per update"); #endif RESET_ALL(cache_entry->valid); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used)) SET_MSM_CACHE(cache_entry, engine_render, process_info->gfx_engine_used); cache_entry->last_measurement_tstamp = current_time; HASH_ADD_CLIENT(gpu_info->current_update_process_cache, cache_entry); parse_fdinfo_exit: return true; } static bool gpuinfo_msm_get_device_handles(struct list_head *devices, unsigned *count) { if (!libdrm_handle) return false; last_libdrm_return_status = wrap_drmGetDevices(NULL, 0); if (last_libdrm_return_status <= 0) return false; drmDevicePtr devs[last_libdrm_return_status]; last_libdrm_return_status = wrap_drmGetDevices(devs, last_libdrm_return_status); if (last_libdrm_return_status <= 0) return false; unsigned int libdrm_count = last_libdrm_return_status; gpu_infos = calloc(libdrm_count, sizeof(*gpu_infos)); if (!gpu_infos) { local_error_string = strerror(errno); return false; } for (unsigned int i = 0; i < libdrm_count; i++) { int fd = -1; // Try render node first if (1 << DRM_NODE_RENDER & devs[i]->available_nodes) { fd = open(devs[i]->nodes[DRM_NODE_RENDER], O_RDWR); } if (fd < 0) { // Fallback to primary node (control nodes are unused according to the DRM documentation) if (1 << DRM_NODE_PRIMARY & devs[i]->available_nodes) { fd = open(devs[i]->nodes[DRM_NODE_PRIMARY], O_RDWR); } } if (fd < 0) continue; drmVersionPtr ver = _drmGetVersion(fd); if (!ver) { close(fd); continue; } bool is_msm = !strcmp(ver->name, "msm"); if (!is_msm) { _drmFreeVersion(ver); close(fd); continue; } authenticate_drm(fd); gpu_infos[msm_gpu_count].drmVersion = ver; gpu_infos[msm_gpu_count].fd = fd; gpu_infos[msm_gpu_count].base.vendor = &gpu_vendor_msm; list_add_tail(&gpu_infos[msm_gpu_count].base.list, devices); // Register a fdinfo callback for this GPU processinfo_register_fdinfo_callback(parse_drm_fdinfo_msm, &gpu_infos[msm_gpu_count].base); msm_gpu_count++; } _drmFreeDevices(devs, libdrm_count); *count = msm_gpu_count; return true; } static int gpuinfo_msm_query_param(int gpu, uint32_t param, uint64_t *value) { struct drm_msm_param req = { .pipe = MSM_PIPE_3D0, // Only the 3D pipe. .param = param, }; int ret = _drmCommandWriteRead(gpu, DRM_MSM_GET_PARAM, &req, sizeof(req)); if (ret) return ret; *value = req.value; return 0; } void gpuinfo_msm_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_msm *gpu_info = container_of(_gpu_info, struct gpu_info_msm, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; static_info->integrated_graphics = true; static_info->encode_decode_shared = true; RESET_ALL(static_info->valid); uint64_t gpuid; if (gpuinfo_msm_query_param(gpu_info->fd, MSM_PARAM_CHIP_ID, &gpuid) == 0) { const char* name = msm_parse_marketing_name(gpuid); if (!name) { // Try again ignoring speed-bin in the upper bits. name = msm_parse_marketing_name(gpuid & 0x0000ffffffff); } if (name) { strncpy(static_info->device_name, name, sizeof(static_info->device_name)); } else { snprintf(static_info->device_name, sizeof(static_info->device_name), "Unknown Adreno %lx", gpuid); } SET_VALID(gpuinfo_device_name_valid, static_info->valid); } } static const char meminfo_total[] = "MemTotal"; static const char meminfo_available[] = "MemAvailable"; void gpuinfo_msm_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_msm *gpu_info = container_of(_gpu_info, struct gpu_info_msm, base); // struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; RESET_ALL(dynamic_info->valid); // GPU clock uint64_t clock_val; if (gpuinfo_msm_query_param(gpu_info->fd, MSM_PARAM_MAX_FREQ, &clock_val) == 0) { // TODO: No way to query current clock speed. SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, clock_val / 1000000); SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed_max, clock_val / 1000000); } // Mem clock // TODO: No way to query. // TODO: find how to extract global utilization // gpu util will be computed as the sum of all the processes utilization for now rewind(meminfo_file); fflush(meminfo_file); static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; uint64_t mem_total = 0; uint64_t mem_available = 0; size_t keys_acquired = 0; while (keys_acquired != 2 && (count = getline(&line, &line_buf_size, meminfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; bool is_total = !strcmp(key, meminfo_total); bool is_available = !strcmp(key, meminfo_available); if (is_total || is_available) { uint64_t mem_int; char *endptr; mem_int = strtoull(val, &endptr, 10); if (endptr == val) continue; mem_int *= parse_memory_multiplier(endptr); if (is_total) { mem_total = mem_int; } else if (is_available) { mem_available = mem_int; } ++keys_acquired; } } SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, mem_total); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, mem_total - mem_available); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, mem_available); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, (dynamic_info->total_memory - dynamic_info->free_memory) * 100 / dynamic_info->total_memory); } static void swap_process_cache_for_next_update(struct gpu_info_msm *gpu_info) { // Free old cache data and set the cache for the next update if (gpu_info->last_update_process_cache) { struct msm_process_info_cache *cache_entry, *tmp; HASH_ITER(hh, gpu_info->last_update_process_cache, cache_entry, tmp) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); free(cache_entry); } } gpu_info->last_update_process_cache = gpu_info->current_update_process_cache; gpu_info->current_update_process_cache = NULL; } void gpuinfo_msm_get_running_processes(struct gpu_info *_gpu_info) { // For Adreno, we register a fdinfo callback that will fill the gpu_process datastructure of the gpu_info structure // for us. This avoids going through /proc multiple times per update for multiple GPUs. struct gpu_info_msm *gpu_info = container_of(_gpu_info, struct gpu_info_msm, base); swap_process_cache_for_next_update(gpu_info); } nvtop-3.2.0/src/extract_gpuinfo_msm_utils.c000066400000000000000000000057101477175131100211240ustar00rootroot00000000000000/* * * Copyright (C) 2023 Ryan Houdek * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/interface_internal_common.h" #include struct msm_id_struct { uint64_t id; const char *name; }; #define GetHundredDigit(coreid) (coreid / 100) #define GetHundred(coreid) (GetHundredDigit(coreid) * 100) #define GetTenDigit(coreid) ((coreid - GetHundred(coreid)) / 10) #define GetTen(coreid) (GetTenDigit(coreid) * 10) #define GetOneDigit(coreid) (coreid - (GetHundred(coreid) + GetTen(coreid))) #define CHIPID(coreid) \ (GetHundredDigit(coreid) << 24) | \ (GetTenDigit(coreid) << 16) | \ (GetOneDigit(coreid) << 8) static const struct msm_id_struct msm_ids[] = { // Adreno 2xx {CHIPID(200), "Adreno 200"}, {CHIPID(201), "Adreno 201"}, {CHIPID(205), "Adreno 205"}, {CHIPID(220), "Adreno 220"}, // Adreno 3xx {CHIPID(305), "Adreno 305"}, {CHIPID(307), "Adreno 307"}, {CHIPID(320), "Adreno 320"}, {CHIPID(330), "Adreno 330"}, // Adreno 4xx {CHIPID(405), "Adreno 405"}, {CHIPID(420), "Adreno 420"}, {CHIPID(430), "Adreno 430"}, // Adreno 5xx {CHIPID(508), "Adreno 508"}, {CHIPID(509), "Adreno 509"}, {CHIPID(510), "Adreno 510"}, {CHIPID(512), "Adreno 512"}, {CHIPID(530), "Adreno 530"}, {CHIPID(540), "Adreno 540"}, // Adreno 6xx {CHIPID(615), "Adreno 615"}, {CHIPID(616), "Adreno 616"}, {CHIPID(618), "Adreno 618"}, {CHIPID(619), "Adreno 619"}, {CHIPID(620), "Adreno 620"}, {CHIPID(630), "Adreno 630"}, {CHIPID(640), "Adreno 640"}, // QCM6490 {0x00ac06030500, "Adreno 643"}, {CHIPID(650), "Adreno 650"}, {CHIPID(660), "Adreno 660"}, {CHIPID(680), "Adreno 680"}, {CHIPID(690), "Adreno 690"}, // no-speedbin Adreno 690 {0xffff06090000, "Adreno 690"}, // Adreno 7xx {CHIPID(730), "Adreno 730"}, {CHIPID(740), "Adreno 740"}, {CHIPID(750), "Adreno 750"}, {CHIPID(790), "Adreno 750"}, // Misc {0x00be06030500, "Adreno 8c Gen 3"}, {0x007506030500, "Adreno 7c+ Gen 3"}, {0x006006030500, "Adreno 7c+ Gen 3 Lite"}, {0x000043051401, "Adreno 750"}, }; const char * msm_parse_marketing_name(uint64_t gpu_id); const char * msm_parse_marketing_name(uint64_t gpu_id) { for (unsigned i = 0; i < ARRAY_SIZE(msm_ids); i++) { if (gpu_id == msm_ids[i].id) { return msm_ids[i].name; } } return NULL; } nvtop-3.2.0/src/extract_gpuinfo_nvidia.c000066400000000000000000001110521477175131100203570ustar00rootroot00000000000000/* * * Copyright (C) 2021-2024 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/common.h" #include "nvtop/extract_gpuinfo_common.h" #include #include #include #include #include #include #include #define NVML_SUCCESS 0 #define NVML_ERROR_INSUFFICIENT_SIZE 7 typedef struct nvmlDevice *nvmlDevice_t; typedef int nvmlReturn_t; // store the enum as int // Init and shutdown static nvmlReturn_t (*nvmlInit)(void); static nvmlReturn_t (*nvmlShutdown)(void); // Static information and helper functions static nvmlReturn_t (*nvmlDeviceGetCount)(unsigned int *deviceCount); static nvmlReturn_t (*nvmlDeviceGetHandleByIndex)(unsigned int index, nvmlDevice_t *device); static const char *(*nvmlErrorString)(nvmlReturn_t); static nvmlReturn_t (*nvmlDeviceGetName)(nvmlDevice_t device, char *name, unsigned int length); typedef struct { char busIdLegacy[16]; unsigned int domain; unsigned int bus; unsigned int device; unsigned int pciDeviceId; // Added in NVML 2.285 API unsigned int pciSubSystemId; char busId[32]; } nvmlPciInfo_t; static nvmlReturn_t (*nvmlDeviceGetPciInfo)(nvmlDevice_t device, nvmlPciInfo_t *pciInfo); static nvmlReturn_t (*nvmlDeviceGetMaxPcieLinkGeneration)(nvmlDevice_t device, unsigned int *maxLinkGen); static nvmlReturn_t (*nvmlDeviceGetMaxPcieLinkWidth)(nvmlDevice_t device, unsigned int *maxLinkWidth); typedef enum { NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0, NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1, NVML_TEMPERATURE_THRESHOLD_MEM_MAX = 2, NVML_TEMPERATURE_THRESHOLD_GPU_MAX = 3, NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_MIN = 4, NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_CURR = 5, NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_MAX = 6, } nvmlTemperatureThresholds_t; static nvmlReturn_t (*nvmlDeviceGetTemperatureThreshold)(nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp); // Dynamic information extraction typedef enum { NVML_CLOCK_GRAPHICS = 0, NVML_CLOCK_SM = 1, NVML_CLOCK_MEM = 2, NVML_CLOCK_VIDEO = 3, } nvmlClockType_t; static nvmlReturn_t (*nvmlDeviceGetClockInfo)(nvmlDevice_t device, nvmlClockType_t type, unsigned int *clock); static nvmlReturn_t (*nvmlDeviceGetMaxClockInfo)(nvmlDevice_t device, nvmlClockType_t type, unsigned int *clock); typedef struct { unsigned int gpu; unsigned int memory; } nvmlUtilization_t; static nvmlReturn_t (*nvmlDeviceGetUtilizationRates)(nvmlDevice_t device, nvmlUtilization_t *utilization); typedef struct { unsigned long long total; unsigned long long free; unsigned long long used; } nvmlMemory_v1_t; typedef struct { unsigned int version; unsigned long long total; unsigned long long reserved; unsigned long long free; unsigned long long used; } nvmlMemory_v2_t; static nvmlReturn_t (*nvmlDeviceGetMemoryInfo)(nvmlDevice_t device, nvmlMemory_v1_t *memory); static nvmlReturn_t (*nvmlDeviceGetMemoryInfo_v2)(nvmlDevice_t device, nvmlMemory_v2_t *memory); static nvmlReturn_t (*nvmlDeviceGetCurrPcieLinkGeneration)(nvmlDevice_t device, unsigned int *currLinkGen); static nvmlReturn_t (*nvmlDeviceGetCurrPcieLinkWidth)(nvmlDevice_t device, unsigned int *currLinkWidth); typedef enum { NVML_PCIE_UTIL_TX_BYTES = 0, NVML_PCIE_UTIL_RX_BYTES = 1, } nvmlPcieUtilCounter_t; static nvmlReturn_t (*nvmlDeviceGetPcieThroughput)(nvmlDevice_t device, nvmlPcieUtilCounter_t counter, unsigned int *value); static nvmlReturn_t (*nvmlDeviceGetFanSpeed)(nvmlDevice_t device, unsigned int *speed); typedef enum { NVML_TEMPERATURE_GPU = 0, } nvmlTemperatureSensors_t; static nvmlReturn_t (*nvmlDeviceGetTemperature)(nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp); static nvmlReturn_t (*nvmlDeviceGetPowerUsage)(nvmlDevice_t device, unsigned int *power); static nvmlReturn_t (*nvmlDeviceGetEnforcedPowerLimit)(nvmlDevice_t device, unsigned int *limit); static nvmlReturn_t (*nvmlDeviceGetEncoderUtilization)(nvmlDevice_t device, unsigned int *utilization, unsigned int *samplingPeriodUs); static nvmlReturn_t (*nvmlDeviceGetDecoderUtilization)(nvmlDevice_t device, unsigned int *utilization, unsigned int *samplingPeriodUs); // Processes running on GPU typedef struct { unsigned int pid; unsigned long long usedGpuMemory; } nvmlProcessInfo_v1_t; typedef struct { unsigned int pid; unsigned long long usedGpuMemory; unsigned int gpuInstanceId; unsigned int computeInstanceId; } nvmlProcessInfo_v2_t; typedef struct { unsigned int pid; unsigned long long usedGpuMemory; unsigned int gpuInstanceId; unsigned int computeInstanceId; // This is present in https://github.com/NVIDIA/DCGM/blob/master/sdk/nvidia/nvml/nvml.h#L294 but not the latest driver nvml.h // unsigned long long usedGpuCcProtectedMemory; } nvmlProcessInfo_v3_t; static nvmlReturn_t (*nvmlDeviceGetGraphicsRunningProcesses_v1)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v1_t *infos); static nvmlReturn_t (*nvmlDeviceGetGraphicsRunningProcesses_v2)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v2_t *infos); static nvmlReturn_t (*nvmlDeviceGetGraphicsRunningProcesses_v3)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v3_t *infos); static nvmlReturn_t (*nvmlDeviceGetComputeRunningProcesses_v1)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v1_t *infos); static nvmlReturn_t (*nvmlDeviceGetComputeRunningProcesses_v2)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v2_t *infos); static nvmlReturn_t (*nvmlDeviceGetComputeRunningProcesses_v3)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v3_t *infos); static nvmlReturn_t (*nvmlDeviceGetMPSComputeRunningProcesses_v1)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v1_t *infos); static nvmlReturn_t (*nvmlDeviceGetMPSComputeRunningProcesses_v2)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v2_t *infos); static nvmlReturn_t (*nvmlDeviceGetMPSComputeRunningProcesses_v3)(nvmlDevice_t device, unsigned int *infoCount, nvmlProcessInfo_v3_t *infos); // Common interface passing void* static nvmlReturn_t (*nvmlDeviceGetGraphicsRunningProcesses[4])(nvmlDevice_t device, unsigned int *infoCount, void *infos); static nvmlReturn_t (*nvmlDeviceGetComputeRunningProcesses[4])(nvmlDevice_t device, unsigned int *infoCount, void *infos); static nvmlReturn_t (*nvmlDeviceGetMPSComputeRunningProcesses[4])(nvmlDevice_t device, unsigned int *infoCount, void *infos); #define NVML_DEVICE_MIG_DISABLE 0x0 #define NVML_DEVICE_MIG_ENABLE 0x1 nvmlReturn_t (*nvmlDeviceGetMigMode)(nvmlDevice_t device, unsigned int *currentMode, unsigned int *pendingMode); static void *libnvidia_ml_handle; static nvmlReturn_t last_nvml_return_status = NVML_SUCCESS; static char didnt_call_gpuinfo_init[] = "The NVIDIA extraction has not been initialized, please call " "gpuinfo_nvidia_init\n"; static const char *local_error_string = didnt_call_gpuinfo_init; // Processes GPU Utilization typedef struct { unsigned int pid; unsigned long long timeStamp; unsigned int smUtil; unsigned int memUtil; unsigned int encUtil; unsigned int decUtil; } nvmlProcessUtilizationSample_t; nvmlReturn_t (*nvmlDeviceGetProcessUtilization)(nvmlDevice_t device, nvmlProcessUtilizationSample_t *utilization, unsigned int *processSamplesCount, unsigned long long lastSeenTimeStamp); struct gpu_info_nvidia { struct gpu_info base; struct list_head allocate_list; nvmlDevice_t gpuhandle; bool isInMigMode; unsigned long long last_utilization_timestamp; }; static LIST_HEAD(allocations); static bool gpuinfo_nvidia_init(void); static void gpuinfo_nvidia_shutdown(void); static const char *gpuinfo_nvidia_last_error_string(void); static bool gpuinfo_nvidia_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_nvidia_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_nvidia_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_nvidia_get_running_processes(struct gpu_info *_gpu_info); struct gpu_vendor gpu_vendor_nvidia = { .init = gpuinfo_nvidia_init, .shutdown = gpuinfo_nvidia_shutdown, .last_error_string = gpuinfo_nvidia_last_error_string, .get_device_handles = gpuinfo_nvidia_get_device_handles, .populate_static_info = gpuinfo_nvidia_populate_static_info, .refresh_dynamic_info = gpuinfo_nvidia_refresh_dynamic_info, .refresh_running_processes = gpuinfo_nvidia_get_running_processes, .name = "NVIDIA", }; __attribute__((constructor)) static void init_extract_gpuinfo_nvidia(void) { register_gpu_vendor(&gpu_vendor_nvidia); } /* * * This function loads the libnvidia-ml.so shared object, initializes the * required function pointers and calls the nvidia library initialization * function. Returns true if everything has been initialized successfully. If * false is returned, the cause of the error can be retrieved by calling the * function gpuinfo_nvidia_last_error_string. * */ static bool gpuinfo_nvidia_init(void) { libnvidia_ml_handle = dlopen("libnvidia-ml.so", RTLD_LAZY); if (!libnvidia_ml_handle) libnvidia_ml_handle = dlopen("libnvidia-ml.so.1", RTLD_LAZY); if (!libnvidia_ml_handle) { local_error_string = dlerror(); return false; } // Default to last version nvmlInit = dlsym(libnvidia_ml_handle, "nvmlInit_v2"); if (!nvmlInit) nvmlInit = dlsym(libnvidia_ml_handle, "nvmlInit"); if (!nvmlInit) goto init_error_clean_exit; nvmlShutdown = dlsym(libnvidia_ml_handle, "nvmlShutdown"); if (!nvmlShutdown) goto init_error_clean_exit; // Default to last version if available nvmlDeviceGetCount = dlsym(libnvidia_ml_handle, "nvmlDeviceGetCount_v2"); if (!nvmlDeviceGetCount) nvmlDeviceGetCount = dlsym(libnvidia_ml_handle, "nvmlDeviceGetCount"); if (!nvmlDeviceGetCount) goto init_error_clean_exit; nvmlDeviceGetHandleByIndex = dlsym(libnvidia_ml_handle, "nvmlDeviceGetHandleByIndex_v2"); if (!nvmlDeviceGetHandleByIndex) nvmlDeviceGetHandleByIndex = dlsym(libnvidia_ml_handle, "nvmlDeviceGetHandleByIndex"); if (!nvmlDeviceGetHandleByIndex) goto init_error_clean_exit; nvmlErrorString = dlsym(libnvidia_ml_handle, "nvmlErrorString"); if (!nvmlErrorString) goto init_error_clean_exit; nvmlDeviceGetName = dlsym(libnvidia_ml_handle, "nvmlDeviceGetName"); if (!nvmlDeviceGetName) goto init_error_clean_exit; nvmlDeviceGetPciInfo = dlsym(libnvidia_ml_handle, "nvmlDeviceGetPciInfo_v3"); if (!nvmlDeviceGetPciInfo) nvmlDeviceGetPciInfo = dlsym(libnvidia_ml_handle, "nvmlDeviceGetPciInfo_v2"); if (!nvmlDeviceGetPciInfo) nvmlDeviceGetPciInfo = dlsym(libnvidia_ml_handle, "nvmlDeviceGetPciInfo"); if (!nvmlDeviceGetPciInfo) goto init_error_clean_exit; nvmlDeviceGetMaxPcieLinkGeneration = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMaxPcieLinkGeneration"); if (!nvmlDeviceGetMaxPcieLinkGeneration) goto init_error_clean_exit; nvmlDeviceGetMaxPcieLinkWidth = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMaxPcieLinkWidth"); if (!nvmlDeviceGetMaxPcieLinkWidth) goto init_error_clean_exit; nvmlDeviceGetTemperatureThreshold = dlsym(libnvidia_ml_handle, "nvmlDeviceGetTemperatureThreshold"); if (!nvmlDeviceGetTemperatureThreshold) goto init_error_clean_exit; nvmlDeviceGetClockInfo = dlsym(libnvidia_ml_handle, "nvmlDeviceGetClockInfo"); if (!nvmlDeviceGetClockInfo) goto init_error_clean_exit; nvmlDeviceGetMaxClockInfo = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMaxClockInfo"); if (!nvmlDeviceGetMaxClockInfo) goto init_error_clean_exit; nvmlDeviceGetUtilizationRates = dlsym(libnvidia_ml_handle, "nvmlDeviceGetUtilizationRates"); if (!nvmlDeviceGetUtilizationRates) goto init_error_clean_exit; // Get v2 and fallback to v1 nvmlDeviceGetMemoryInfo_v2 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMemoryInfo_v2"); nvmlDeviceGetMemoryInfo = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMemoryInfo"); if (!nvmlDeviceGetMemoryInfo_v2 && !nvmlDeviceGetMemoryInfo) goto init_error_clean_exit; nvmlDeviceGetCurrPcieLinkGeneration = dlsym(libnvidia_ml_handle, "nvmlDeviceGetCurrPcieLinkGeneration"); if (!nvmlDeviceGetCurrPcieLinkGeneration) goto init_error_clean_exit; nvmlDeviceGetCurrPcieLinkWidth = dlsym(libnvidia_ml_handle, "nvmlDeviceGetCurrPcieLinkWidth"); if (!nvmlDeviceGetCurrPcieLinkWidth) goto init_error_clean_exit; nvmlDeviceGetPcieThroughput = dlsym(libnvidia_ml_handle, "nvmlDeviceGetPcieThroughput"); if (!nvmlDeviceGetPcieThroughput) goto init_error_clean_exit; nvmlDeviceGetFanSpeed = dlsym(libnvidia_ml_handle, "nvmlDeviceGetFanSpeed"); if (!nvmlDeviceGetFanSpeed) goto init_error_clean_exit; nvmlDeviceGetTemperature = dlsym(libnvidia_ml_handle, "nvmlDeviceGetTemperature"); if (!nvmlDeviceGetTemperature) goto init_error_clean_exit; nvmlDeviceGetPowerUsage = dlsym(libnvidia_ml_handle, "nvmlDeviceGetPowerUsage"); if (!nvmlDeviceGetPowerUsage) goto init_error_clean_exit; nvmlDeviceGetEnforcedPowerLimit = dlsym(libnvidia_ml_handle, "nvmlDeviceGetEnforcedPowerLimit"); if (!nvmlDeviceGetEnforcedPowerLimit) goto init_error_clean_exit; nvmlDeviceGetEncoderUtilization = dlsym(libnvidia_ml_handle, "nvmlDeviceGetEncoderUtilization"); if (!nvmlDeviceGetEncoderUtilization) goto init_error_clean_exit; nvmlDeviceGetDecoderUtilization = dlsym(libnvidia_ml_handle, "nvmlDeviceGetDecoderUtilization"); if (!nvmlDeviceGetDecoderUtilization) goto init_error_clean_exit; nvmlDeviceGetGraphicsRunningProcesses_v3 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetGraphicsRunningProcesses_v3"); nvmlDeviceGetGraphicsRunningProcesses_v2 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetGraphicsRunningProcesses_v2"); nvmlDeviceGetGraphicsRunningProcesses_v1 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetGraphicsRunningProcesses"); if (!nvmlDeviceGetGraphicsRunningProcesses_v3 && !nvmlDeviceGetGraphicsRunningProcesses_v2 && !nvmlDeviceGetGraphicsRunningProcesses_v1) goto init_error_clean_exit; nvmlDeviceGetGraphicsRunningProcesses[1] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetGraphicsRunningProcesses_v1; nvmlDeviceGetGraphicsRunningProcesses[2] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetGraphicsRunningProcesses_v2; nvmlDeviceGetGraphicsRunningProcesses[3] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetGraphicsRunningProcesses_v3; nvmlDeviceGetComputeRunningProcesses_v3 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetComputeRunningProcesses_v3"); nvmlDeviceGetComputeRunningProcesses_v2 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetComputeRunningProcesses_v2"); nvmlDeviceGetComputeRunningProcesses_v1 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetComputeRunningProcesses"); if (!nvmlDeviceGetComputeRunningProcesses_v3 && !nvmlDeviceGetComputeRunningProcesses_v2 && !nvmlDeviceGetComputeRunningProcesses_v1) goto init_error_clean_exit; nvmlDeviceGetComputeRunningProcesses[1] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetComputeRunningProcesses_v1; nvmlDeviceGetComputeRunningProcesses[2] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetComputeRunningProcesses_v2; nvmlDeviceGetComputeRunningProcesses[3] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetComputeRunningProcesses_v3; // These functions were not available in older NVML libs; don't error if not present nvmlDeviceGetMPSComputeRunningProcesses_v3 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMPSComputeRunningProcesses_v3"); nvmlDeviceGetMPSComputeRunningProcesses_v2 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMPSComputeRunningProcesses_v2"); nvmlDeviceGetMPSComputeRunningProcesses_v1 = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMPSComputeRunningProcesses"); nvmlDeviceGetMPSComputeRunningProcesses[1] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetMPSComputeRunningProcesses_v1; nvmlDeviceGetMPSComputeRunningProcesses[2] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetMPSComputeRunningProcesses_v2; nvmlDeviceGetMPSComputeRunningProcesses[3] = (nvmlReturn_t(*)(nvmlDevice_t, unsigned int *, void *))nvmlDeviceGetMPSComputeRunningProcesses_v3; // These ones might not be available nvmlDeviceGetProcessUtilization = dlsym(libnvidia_ml_handle, "nvmlDeviceGetProcessUtilization"); nvmlDeviceGetMigMode = dlsym(libnvidia_ml_handle, "nvmlDeviceGetMigMode"); last_nvml_return_status = nvmlInit(); if (last_nvml_return_status != NVML_SUCCESS) { return false; } local_error_string = NULL; return true; init_error_clean_exit: dlclose(libnvidia_ml_handle); libnvidia_ml_handle = NULL; return false; } static void gpuinfo_nvidia_shutdown(void) { if (libnvidia_ml_handle) { nvmlShutdown(); dlclose(libnvidia_ml_handle); libnvidia_ml_handle = NULL; local_error_string = didnt_call_gpuinfo_init; } struct gpu_info_nvidia *allocated, *tmp; list_for_each_entry_safe(allocated, tmp, &allocations, allocate_list) { list_del(&allocated->allocate_list); free(allocated); } } static const char *gpuinfo_nvidia_last_error_string(void) { if (local_error_string) { return local_error_string; } else if (libnvidia_ml_handle && nvmlErrorString) { return nvmlErrorString(last_nvml_return_status); } else { return "An unanticipated error occurred while accessing NVIDIA GPU " "information\n"; } } static bool gpuinfo_nvidia_get_device_handles(struct list_head *devices, unsigned *count) { if (!libnvidia_ml_handle) return false; unsigned num_devices; last_nvml_return_status = nvmlDeviceGetCount(&num_devices); if (last_nvml_return_status != NVML_SUCCESS) return false; struct gpu_info_nvidia *gpu_infos = calloc(num_devices, sizeof(*gpu_infos)); if (!gpu_infos) { local_error_string = strerror(errno); return false; } list_add(&gpu_infos[0].allocate_list, &allocations); *count = 0; for (unsigned int i = 0; i < num_devices; ++i) { last_nvml_return_status = nvmlDeviceGetHandleByIndex(i, &gpu_infos[*count].gpuhandle); if (last_nvml_return_status == NVML_SUCCESS) { gpu_infos[*count].base.vendor = &gpu_vendor_nvidia; nvmlPciInfo_t pciInfo; nvmlReturn_t pciInfoRet = nvmlDeviceGetPciInfo(gpu_infos[*count].gpuhandle, &pciInfo); if (pciInfoRet == NVML_SUCCESS) { strncpy(gpu_infos[*count].base.pdev, pciInfo.busIdLegacy, PDEV_LEN); list_add_tail(&gpu_infos[*count].base.list, devices); *count += 1; } } } return true; } static void gpuinfo_nvidia_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_nvidia *gpu_info = container_of(_gpu_info, struct gpu_info_nvidia, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; nvmlDevice_t device = gpu_info->gpuhandle; static_info->integrated_graphics = false; static_info->encode_decode_shared = false; RESET_ALL(static_info->valid); last_nvml_return_status = nvmlDeviceGetName(device, static_info->device_name, MAX_DEVICE_NAME); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_device_name_valid, static_info->valid); last_nvml_return_status = nvmlDeviceGetMaxPcieLinkGeneration(device, &static_info->max_pcie_gen); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_max_pcie_gen_valid, static_info->valid); last_nvml_return_status = nvmlDeviceGetMaxPcieLinkWidth(device, &static_info->max_pcie_link_width); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_max_pcie_link_width_valid, static_info->valid); last_nvml_return_status = nvmlDeviceGetTemperatureThreshold(device, NVML_TEMPERATURE_THRESHOLD_SHUTDOWN, &static_info->temperature_shutdown_threshold); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_temperature_shutdown_threshold_valid, static_info->valid); last_nvml_return_status = nvmlDeviceGetTemperatureThreshold(device, NVML_TEMPERATURE_THRESHOLD_SLOWDOWN, &static_info->temperature_slowdown_threshold); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_temperature_slowdown_threshold_valid, static_info->valid); } static void gpuinfo_nvidia_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_nvidia *gpu_info = container_of(_gpu_info, struct gpu_info_nvidia, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; nvmlDevice_t device = gpu_info->gpuhandle; bool graphics_clock_valid = false; unsigned graphics_clock; bool sm_clock_valid = false; unsigned sm_clock; nvmlClockType_t getMaxClockFrom = NVML_CLOCK_GRAPHICS; RESET_ALL(dynamic_info->valid); // GPU current speed // Maximum between SM and Graphical last_nvml_return_status = nvmlDeviceGetClockInfo(device, NVML_CLOCK_GRAPHICS, &graphics_clock); graphics_clock_valid = last_nvml_return_status == NVML_SUCCESS; last_nvml_return_status = nvmlDeviceGetClockInfo(device, NVML_CLOCK_SM, &sm_clock); sm_clock_valid = last_nvml_return_status == NVML_SUCCESS; if (graphics_clock_valid && sm_clock_valid && graphics_clock < sm_clock) { getMaxClockFrom = NVML_CLOCK_SM; } else if (!graphics_clock_valid && sm_clock_valid) { getMaxClockFrom = NVML_CLOCK_SM; } if (getMaxClockFrom == NVML_CLOCK_GRAPHICS && graphics_clock_valid) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, graphics_clock); } if (getMaxClockFrom == NVML_CLOCK_SM && sm_clock_valid) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, sm_clock); } // GPU max speed last_nvml_return_status = nvmlDeviceGetMaxClockInfo(device, getMaxClockFrom, &dynamic_info->gpu_clock_speed_max); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_gpu_clock_speed_max_valid, dynamic_info->valid); // Memory current speed last_nvml_return_status = nvmlDeviceGetClockInfo(device, NVML_CLOCK_MEM, &dynamic_info->mem_clock_speed); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_mem_clock_speed_valid, dynamic_info->valid); // Memory max speed last_nvml_return_status = nvmlDeviceGetMaxClockInfo(device, NVML_CLOCK_MEM, &dynamic_info->mem_clock_speed_max); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_mem_clock_speed_max_valid, dynamic_info->valid); // CPU and Memory utilization rates nvmlUtilization_t utilization_percentages; last_nvml_return_status = nvmlDeviceGetUtilizationRates(device, &utilization_percentages); if (last_nvml_return_status == NVML_SUCCESS) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate, utilization_percentages.gpu); } // Encoder utilization rate unsigned ignored_period; last_nvml_return_status = nvmlDeviceGetEncoderUtilization(device, &dynamic_info->encoder_rate, &ignored_period); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_encoder_rate_valid, dynamic_info->valid); // Decoder utilization rate last_nvml_return_status = nvmlDeviceGetDecoderUtilization(device, &dynamic_info->decoder_rate, &ignored_period); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_decoder_rate_valid, dynamic_info->valid); // Device memory info (total,used,free) bool got_meminfo = false; if (nvmlDeviceGetMemoryInfo_v2) { nvmlMemory_v2_t memory_info; memory_info.version = 2; last_nvml_return_status = nvmlDeviceGetMemoryInfo_v2(device, &memory_info); if (last_nvml_return_status == NVML_SUCCESS) { got_meminfo = true; SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, memory_info.total); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, memory_info.used); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, memory_info.free); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, memory_info.used * 100 / memory_info.total); } } if (!got_meminfo && nvmlDeviceGetMemoryInfo) { nvmlMemory_v1_t memory_info; last_nvml_return_status = nvmlDeviceGetMemoryInfo(device, &memory_info); if (last_nvml_return_status == NVML_SUCCESS) { SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, memory_info.total); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, memory_info.used); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, memory_info.free); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, memory_info.used * 100 / memory_info.total); } } // Pcie generation used by the device last_nvml_return_status = nvmlDeviceGetCurrPcieLinkGeneration(device, &dynamic_info->pcie_link_gen); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_pcie_link_gen_valid, dynamic_info->valid); // Pcie width used by the device last_nvml_return_status = nvmlDeviceGetCurrPcieLinkWidth(device, &dynamic_info->pcie_link_width); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_pcie_link_width_valid, dynamic_info->valid); // Pcie reception throughput last_nvml_return_status = nvmlDeviceGetPcieThroughput(device, NVML_PCIE_UTIL_RX_BYTES, &dynamic_info->pcie_rx); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_pcie_rx_valid, dynamic_info->valid); // Pcie transmission throughput last_nvml_return_status = nvmlDeviceGetPcieThroughput(device, NVML_PCIE_UTIL_TX_BYTES, &dynamic_info->pcie_tx); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_pcie_tx_valid, dynamic_info->valid); // Fan speed last_nvml_return_status = nvmlDeviceGetFanSpeed(device, &dynamic_info->fan_speed); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_fan_speed_valid, dynamic_info->valid); // GPU temperature last_nvml_return_status = nvmlDeviceGetTemperature(device, NVML_TEMPERATURE_GPU, &dynamic_info->gpu_temp); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_gpu_temp_valid, dynamic_info->valid); // Device power usage last_nvml_return_status = nvmlDeviceGetPowerUsage(device, &dynamic_info->power_draw); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_power_draw_valid, dynamic_info->valid); // Maximum enforced power usage last_nvml_return_status = nvmlDeviceGetEnforcedPowerLimit(device, &dynamic_info->power_draw_max); if (last_nvml_return_status == NVML_SUCCESS) SET_VALID(gpuinfo_power_draw_max_valid, dynamic_info->valid); // MIG mode if (nvmlDeviceGetMigMode) { unsigned currentMode, pendingMode; last_nvml_return_status = nvmlDeviceGetMigMode(device, ¤tMode, &pendingMode); if (last_nvml_return_status == NVML_SUCCESS) { SET_GPUINFO_DYNAMIC(dynamic_info, multi_instance_mode, currentMode == NVML_DEVICE_MIG_ENABLE); } } } static void gpuinfo_nvidia_get_process_utilization(struct gpu_info_nvidia *gpu_info, unsigned num_processes_recovered, struct gpu_process processes[num_processes_recovered]) { nvmlDevice_t device = gpu_info->gpuhandle; if (num_processes_recovered && nvmlDeviceGetProcessUtilization) { unsigned samples_count = 0; nvmlReturn_t retval = nvmlDeviceGetProcessUtilization(device, NULL, &samples_count, gpu_info->last_utilization_timestamp); if (retval != NVML_ERROR_INSUFFICIENT_SIZE) return; nvmlProcessUtilizationSample_t *samples = malloc(samples_count * sizeof(*samples)); retval = nvmlDeviceGetProcessUtilization(device, samples, &samples_count, gpu_info->last_utilization_timestamp); if (retval != NVML_SUCCESS) { free(samples); return; } unsigned long long newest_timestamp_candidate = gpu_info->last_utilization_timestamp; for (unsigned i = 0; i < samples_count; ++i) { bool process_matched = false; for (unsigned j = 0; !process_matched && j < num_processes_recovered; ++j) { // Filter out samples due to inconsistency in the results returned by // the function nvmlDeviceGetProcessUtilization (see bug #110 on // Github). Check for a valid running process returned by // nvmlDeviceGetComputeRunningProcesses or // nvmlDeviceGetGraphicsRunningProcesses, filter out inconsistent // utilization value greater than 100% and filter out timestamp results // that are less recent than what we were asking for if ((pid_t)samples[i].pid == processes[j].pid && samples[i].smUtil <= 100 && samples[i].encUtil <= 100 && samples[i].decUtil <= 100 && samples[i].timeStamp > gpu_info->last_utilization_timestamp) { // Collect the largest valid timestamp for this device to filter out // the samples during the next call to the function // nvmlDeviceGetProcessUtilization if (samples[i].timeStamp > newest_timestamp_candidate) newest_timestamp_candidate = samples[i].timeStamp; SET_GPUINFO_PROCESS(&processes[j], gpu_usage, samples[i].smUtil); SET_GPUINFO_PROCESS(&processes[j], encode_usage, samples[i].encUtil); SET_GPUINFO_PROCESS(&processes[j], decode_usage, samples[i].decUtil); process_matched = true; } } } gpu_info->last_utilization_timestamp = newest_timestamp_candidate; free(samples); } // Mark the ones w/o update since last sample period to 0% usage for (unsigned j = 0; j < num_processes_recovered; ++j) { if (!IS_VALID(gpuinfo_process_gpu_usage_valid, processes[j].valid)) SET_GPUINFO_PROCESS(&processes[j], gpu_usage, 0); if (!IS_VALID(gpuinfo_process_encode_usage_valid, processes[j].valid)) SET_GPUINFO_PROCESS(&processes[j], encode_usage, 0); if (!IS_VALID(gpuinfo_process_decode_usage_valid, processes[j].valid)) SET_GPUINFO_PROCESS(&processes[j], decode_usage, 0); } } static void gpuinfo_nvidia_get_running_processes(struct gpu_info *_gpu_info) { struct gpu_info_nvidia *gpu_info = container_of(_gpu_info, struct gpu_info_nvidia, base); nvmlDevice_t device = gpu_info->gpuhandle; bool validProcessGathering = false; for (unsigned version = 3; !validProcessGathering && version > 0; version--) { // Get the size of the actual function being used size_t sizeof_nvmlProcessInfo; switch (version) { case 3: sizeof_nvmlProcessInfo = sizeof(nvmlProcessInfo_v3_t); break; case 2: sizeof_nvmlProcessInfo = sizeof(nvmlProcessInfo_v2_t); break; default: sizeof_nvmlProcessInfo = sizeof(nvmlProcessInfo_v1_t); break; } _gpu_info->processes_count = 0; static size_t array_size = 0; static char *retrieved_infos = NULL; unsigned graphical_count = 0, compute_count = 0, recovered_count; if (nvmlDeviceGetGraphicsRunningProcesses[version]) { retry_query_graphical: recovered_count = array_size; last_nvml_return_status = nvmlDeviceGetGraphicsRunningProcesses[version](device, &recovered_count, retrieved_infos); if (last_nvml_return_status == NVML_ERROR_INSUFFICIENT_SIZE) { array_size += COMMON_PROCESS_LINEAR_REALLOC_INC; retrieved_infos = reallocarray(retrieved_infos, array_size, sizeof_nvmlProcessInfo); if (!retrieved_infos) { perror("Could not re-allocate memory: "); exit(EXIT_FAILURE); } goto retry_query_graphical; } if (last_nvml_return_status == NVML_SUCCESS) { validProcessGathering = true; graphical_count = recovered_count; } } if (nvmlDeviceGetComputeRunningProcesses[version]) { retry_query_compute: recovered_count = array_size - graphical_count; last_nvml_return_status = nvmlDeviceGetComputeRunningProcesses[version]( device, &recovered_count, retrieved_infos + graphical_count * sizeof_nvmlProcessInfo); if (last_nvml_return_status == NVML_ERROR_INSUFFICIENT_SIZE) { array_size += COMMON_PROCESS_LINEAR_REALLOC_INC; retrieved_infos = reallocarray(retrieved_infos, array_size, sizeof_nvmlProcessInfo); if (!retrieved_infos) { perror("Could not re-allocate memory: "); exit(EXIT_FAILURE); } goto retry_query_compute; } if (last_nvml_return_status == NVML_SUCCESS) { validProcessGathering = true; compute_count = recovered_count; } } if (nvmlDeviceGetMPSComputeRunningProcesses[version]) { retry_query_compute_MPS: recovered_count = array_size - graphical_count - compute_count; last_nvml_return_status = nvmlDeviceGetMPSComputeRunningProcesses[version]( device, &recovered_count, retrieved_infos + (graphical_count + compute_count) * sizeof_nvmlProcessInfo); if (last_nvml_return_status == NVML_ERROR_INSUFFICIENT_SIZE) { array_size += COMMON_PROCESS_LINEAR_REALLOC_INC; retrieved_infos = reallocarray(retrieved_infos, array_size, sizeof_nvmlProcessInfo); if (!retrieved_infos) { perror("Could not re-allocate memory: "); exit(EXIT_FAILURE); } goto retry_query_compute_MPS; } if (last_nvml_return_status == NVML_SUCCESS) { validProcessGathering = true; compute_count += recovered_count; } } if (!validProcessGathering) continue; _gpu_info->processes_count = graphical_count + compute_count; if (_gpu_info->processes_count > 0) { if (_gpu_info->processes_count > _gpu_info->processes_array_size) { _gpu_info->processes_array_size = _gpu_info->processes_count + COMMON_PROCESS_LINEAR_REALLOC_INC; _gpu_info->processes = reallocarray(_gpu_info->processes, _gpu_info->processes_array_size, sizeof(*_gpu_info->processes)); if (!_gpu_info->processes) { perror("Could not allocate memory: "); exit(EXIT_FAILURE); } } memset(_gpu_info->processes, 0, _gpu_info->processes_count * sizeof(*_gpu_info->processes)); for (unsigned i = 0; i < graphical_count + compute_count; ++i) { if (i < graphical_count) _gpu_info->processes[i].type = gpu_process_graphical; else _gpu_info->processes[i].type = gpu_process_compute; switch (version) { case 2: { nvmlProcessInfo_v2_t *pinfo = (nvmlProcessInfo_v2_t *)retrieved_infos; _gpu_info->processes[i].pid = pinfo[i].pid; _gpu_info->processes[i].gpu_memory_usage = pinfo[i].usedGpuMemory; } break; case 3: { nvmlProcessInfo_v3_t *pinfo = (nvmlProcessInfo_v3_t *)retrieved_infos; _gpu_info->processes[i].pid = pinfo[i].pid; _gpu_info->processes[i].gpu_memory_usage = pinfo[i].usedGpuMemory; } break; default: { nvmlProcessInfo_v1_t *pinfo = (nvmlProcessInfo_v1_t *)retrieved_infos; _gpu_info->processes[i].pid = pinfo[i].pid; _gpu_info->processes[i].gpu_memory_usage = pinfo[i].usedGpuMemory; } break; } SET_VALID(gpuinfo_process_gpu_memory_usage_valid, _gpu_info->processes[i].valid); } } } // If the GPU is in MIG mode; process utilization is not supported if (!(IS_VALID(gpuinfo_multi_instance_mode_valid, gpu_info->base.dynamic_info.valid) && !gpu_info->base.dynamic_info.multi_instance_mode)) gpuinfo_nvidia_get_process_utilization(gpu_info, _gpu_info->processes_count, _gpu_info->processes); } nvtop-3.2.0/src/extract_gpuinfo_panfrost.c000066400000000000000000000264131477175131100207470ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * This file is part of Nvtop and adapted from the msm implementation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #ifdef __linux__ // for minor() on linux (available through sys/types.h on BSD) #include #endif #include #include #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include "panfrost_drm.h" #include "panfrost_utils.h" #include "mali_common.h" static bool gpuinfo_panfrost_init(void); static void gpuinfo_panfrost_shutdown(void); static const char *gpuinfo_panfrost_last_error_string(void); static bool gpuinfo_panfrost_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_panfrost_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_panfrost_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_panfrost_get_running_processes(struct gpu_info *_gpu_info); static struct gpu_vendor gpu_vendor_panfrost = { .init = gpuinfo_panfrost_init, .shutdown = gpuinfo_panfrost_shutdown, .last_error_string = gpuinfo_panfrost_last_error_string, .get_device_handles = gpuinfo_panfrost_get_device_handles, .populate_static_info = gpuinfo_panfrost_populate_static_info, .refresh_dynamic_info = gpuinfo_panfrost_refresh_dynamic_info, .refresh_running_processes = gpuinfo_panfrost_get_running_processes, .refresh_utilisation_rate = gpuinfo_refresh_utilisation_rate, .name = "panfrost", }; static struct drmFuncTable drmFuncs; static struct mali_gpu_state mali_state; __attribute__((constructor)) static void init_extract_gpuinfo_panfrost(void) { register_gpu_vendor(&gpu_vendor_panfrost); } bool gpuinfo_panfrost_init(void) { return mali_init_drm_funcs(&drmFuncs, &mali_state); } void gpuinfo_panfrost_shutdown(void) { for (unsigned i = 0; i < mali_state.mali_gpu_count; ++i) { struct panfrost_driver_data *prof_info = &mali_state.gpu_infos[i].model.panfrost; FILE *fprofiling; fprofiling = fopen(prof_info->sysfs_filename, "w"); if (fprofiling == NULL) { fprintf(stderr, "Panfrost's profile parameter sysfs hook seems gone\n"); free(prof_info->sysfs_filename); continue; } char buf = prof_info->original_profiling_state ? '1' : '0'; size_t size = fwrite(&buf, sizeof(char), 1, fprofiling); if (!size) fprintf(stderr, "restoring profiling state didn't work\n"); fclose(fprofiling); free(prof_info->sysfs_filename); } mali_shutdown_common(&mali_state, &drmFuncs); } static const char *gpuinfo_panfrost_last_error_string(void) { static char driver_msg[MAX_ERR_STRING_LEN] = {0}; return mali_common_last_error_string(&mali_state, gpu_vendor_panfrost.name, driver_msg); } static void panfrost_check_fdinfo_keys (bool *is_engine, bool *is_cycles, bool *is_maxfreq, bool *is_curfreq, bool *is_resident, char *key) { static const char drm_panfrost_engine_vtx[] = "drm-engine-vertex-tiler"; static const char drm_panfrost_engine_frg[] = "drm-engine-fragment"; static const char drm_panfrost_cycles_vtx[] = "drm-cycles-vertex-tiler"; static const char drm_panfrost_cycles_frg[] = "drm-cycles-fragment"; static const char drm_panfrost_maxfreq_vtx[] = "drm-maxfreq-vertex-tiler"; static const char drm_panfrost_maxfreq_frg[] = "drm-maxfreq-fragment"; static const char drm_panfrost_curfreq_vtx[] = "drm-curfreq-vertex-tiler"; static const char drm_panfrost_curfreq_frg[] = "drm-curfreq-fragment"; static const char drm_panfrost_resident_mem[] = "drm-resident-memory"; *is_engine = !strcmp(key, drm_panfrost_engine_vtx) || !strcmp(key, drm_panfrost_engine_frg); *is_cycles = !strcmp(key, drm_panfrost_cycles_vtx) || !strcmp(key, drm_panfrost_cycles_frg); *is_maxfreq = !strcmp(key, drm_panfrost_maxfreq_vtx) || !strcmp(key, drm_panfrost_maxfreq_frg); *is_curfreq = !strcmp(key, drm_panfrost_curfreq_vtx) || !strcmp(key, drm_panfrost_curfreq_frg); *is_resident = !strcmp(key, drm_panfrost_resident_mem); } static bool parse_drm_fdinfo_panfrost(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_mali *gpu_info = container_of(info, struct gpu_info_mali, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; struct fdinfo_data res = {0}; nvtop_time current_time; nvtop_get_current_time(¤t_time); if (!mali_common_parse_drm_fdinfo(info, fdinfo_file, process_info, dynamic_info, panfrost_check_fdinfo_keys, &res)) return false; mali_common_parse_fdinfo_handle_cache(gpu_info, process_info, current_time, res.total_cycles, res.cid, res.engine_count >= 1 ? true : false); return true; } static char *get_sysfs_filename(struct gpu_info_mali *gpu_info) { char sysfs_file[PATH_MAX + 1] = {0}; char *fullname, *of_name, *node; const char *bus_name = NULL; drmDevicePtr device; struct stat filebuf; unsigned int i; int ret; static struct { const char *name; int bus_type; } bus_types[] = { { "/pci", DRM_BUS_PCI }, { "/usb", DRM_BUS_USB }, { "/platform", DRM_BUS_PLATFORM }, { "/host1x", DRM_BUS_HOST1X }, }; fstat(gpu_info->fd, &filebuf); ret = drmFuncs.drmGetDeviceFromDevId(filebuf.st_rdev, 0, &device); if (ret) { fprintf(stderr, "drmGetDeviceFromDevId failed with %d\n", ret); goto sysfs_end; } fullname = device->businfo.platform->fullname; node = strrchr(fullname, '@'); of_name = strrchr(fullname, '/'); if (node == NULL || of_name == NULL) goto sysfs_end; *node = '\0'; node++;; *of_name = '\0'; of_name++; for (i = 0; i < (sizeof(bus_types) / sizeof(typeof(bus_types[0]))); i++) { if (bus_types[i].bus_type == device->bustype) { bus_name = bus_types[i].name; break; } } if (bus_name == NULL) { fprintf(stderr, "Unknown bus type = %d\n", device->bustype); goto sysfs_end; } snprintf(sysfs_file, PATH_MAX + 1, "/sys/devices%s%s/%s.%s/profiling", bus_name, fullname, node, of_name); sysfs_end: free(device); return (!sysfs_file[0]) ? NULL : strdup(sysfs_file); } static bool panfrost_open_sysfs_profile(struct gpu_info_mali *gpu_info) { struct panfrost_driver_data *prof_info = &gpu_info->model.panfrost; FILE *fprofiling; bool ret = true; if (!gpu_info->fd || gpu_info->version != MALI_PANFROST) return false; prof_info->sysfs_filename = get_sysfs_filename(gpu_info); if (prof_info->sysfs_filename == NULL) return false; fprofiling = fopen(prof_info->sysfs_filename, "r"); if (fprofiling == NULL) { fprintf(stderr, "Profiling state not available in Panfrost\n"); goto file_error; } char buf = 0; size_t size = fread(&buf, sizeof(char), 1, fprofiling); if (!size) { fprintf(stderr, "Error reading profiling state\n"); goto format_error; } prof_info->original_profiling_state = (buf == '1') ? true : false; fclose(fprofiling); fprofiling = fopen(prof_info->sysfs_filename, "w"); if (fprofiling == NULL) { fprintf(stderr, "Profiling state not available in Panfrost\n"); goto file_error; } buf = '1'; size = fwrite(&buf, sizeof(char), 1, fprofiling); if (!size) { fprintf(stderr, "Error writing profiling state\n"); } format_error: fclose(fprofiling); if (!size) ret = false; file_error: if (fprofiling == NULL) ret = false; if (ret) free(prof_info->sysfs_filename); return ret; } static bool gpuinfo_panfrost_get_device_handles(struct list_head *devices, unsigned *count) { return mali_common_get_device_handles(&mali_state, &drmFuncs, &gpu_vendor_panfrost, parse_drm_fdinfo_panfrost, devices, count, panfrost_open_sysfs_profile, MALI_PANFROST); } static int gpuinfo_panfrost_query_param(int gpu, uint32_t param, uint64_t *value) { struct drm_panfrost_get_param req = { .param = param, }; int ret = drmFuncs.drmCommandWriteRead(gpu, DRM_PANFROST_GET_PARAM, &req, sizeof(req)); if (ret) return ret; *value = req.value; return 0; } void gpuinfo_panfrost_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_mali *gpu_info = container_of(_gpu_info, struct gpu_info_mali, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; static_info->integrated_graphics = true; static_info->encode_decode_shared = true; RESET_ALL(static_info->valid); uint64_t gpuid; if (gpuinfo_panfrost_query_param(gpu_info->fd, DRM_PANFROST_PARAM_GPU_PROD_ID, &gpuid) == 0) { const char* name = panfrost_parse_marketing_name(gpuid); if (name) { strncpy(static_info->device_name, name, sizeof(static_info->device_name)); } else { snprintf(static_info->device_name, sizeof(static_info->device_name), "Unknown Mali %lx", gpuid); } SET_VALID(gpuinfo_device_name_valid, static_info->valid); } uint64_t shader; if (gpuinfo_panfrost_query_param(gpu_info->fd, DRM_PANFROST_PARAM_SHADER_PRESENT, &shader) == 0) SET_GPUINFO_STATIC(static_info, n_shared_cores, util_last_bit(shader)); uint64_t l2_cache_features; if (gpuinfo_panfrost_query_param(gpu_info->fd, DRM_PANFROST_PARAM_L2_FEATURES, &l2_cache_features) == 0) SET_GPUINFO_STATIC(static_info, l2cache_size, l2_cache_features & (0xFF << 16)); if (GPUINFO_STATIC_FIELD_VALID(static_info, n_shared_cores)) { uint64_t core_features, thread_features; if (gpuinfo_panfrost_query_param(gpu_info->fd, DRM_PANFROST_PARAM_CORE_FEATURES, &core_features) != 0) return; if (gpuinfo_panfrost_query_param(gpu_info->fd, DRM_PANFROST_PARAM_THREAD_FEATURES, &thread_features) != 0) return; SET_GPUINFO_STATIC(static_info, n_exec_engines, get_number_engines(gpuid, static_info->n_shared_cores, core_features, thread_features)); } } void gpuinfo_panfrost_refresh_dynamic_info(struct gpu_info *_gpu_info) { static const char *meminfo_total = "MemTotal"; static const char *meminfo_available = "MemAvailable"; struct gpu_info_mali *gpu_info = container_of(_gpu_info, struct gpu_info_mali, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; if (gpu_info->version != MALI_PANFROST) { fprintf(stderr, "Wrong device version: %u\n", gpu_info->version); abort(); } mali_common_refresh_dynamic_info(dynamic_info, &mali_state, meminfo_total, meminfo_available); } void gpuinfo_panfrost_get_running_processes(struct gpu_info *_gpu_info) { mali_common_get_running_processes(_gpu_info, MALI_PANFROST); } nvtop-3.2.0/src/extract_gpuinfo_panfrost_utils.c000066400000000000000000000057271477175131100221740ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include "nvtop/interface_internal_common.h" #include "panfrost_utils.h" struct panfrost_model { const char *name; unsigned int id; unsigned int (*nengines) (int32_t core_count, uint32_t core_features, uint32_t thread_features); }; static uint32_t get_num_eng_g52(int core_count, uint32_t core_features, uint32_t thread_features) { (void) core_count; (void) thread_features; return core_features & 0xF; } #define GPU_MODEL(_name, _id, _nengines) \ { \ .name = #_name, \ .id = _id, \ .nengines = _nengines, \ } static const struct panfrost_model gpu_models[] = { GPU_MODEL(t600, 0x600, NULL), GPU_MODEL(t620, 0x620, NULL), GPU_MODEL(t720, 0x720, NULL), GPU_MODEL(t760, 0x750, NULL), GPU_MODEL(t820, 0x820, NULL), GPU_MODEL(t830, 0x830, NULL), GPU_MODEL(t860, 0x860, NULL), GPU_MODEL(t880, 0x880, NULL), GPU_MODEL(g71, 0x6000, NULL), GPU_MODEL(g72, 0x6001, NULL), GPU_MODEL(g51, 0x7000, NULL), GPU_MODEL(g76, 0x7001, NULL), GPU_MODEL(g52, 0x7002, get_num_eng_g52), GPU_MODEL(g31, 0x7003, NULL), GPU_MODEL(g57, 0x9001, NULL), GPU_MODEL(g57, 0x9003, NULL), }; static inline int panfrost_model_cmp(unsigned int match, unsigned int id) { if (match & 0xf000) match &= 0xf00f; return match - id; } const char * panfrost_parse_marketing_name(uint64_t gpu_id) { for (unsigned i = 0; i < ARRAY_SIZE(gpu_models); i++) { if (!panfrost_model_cmp(gpu_id, gpu_models[i].id)) { return gpu_models[i].name; } } return NULL; } unsigned int get_number_engines(uint32_t gpu_id, int core_count, uint32_t core_features, uint32_t thread_features) { for (unsigned i = 0; i < ARRAY_SIZE(gpu_models); i++) { if (!panfrost_model_cmp(gpu_id, gpu_models[i].id)) { if (gpu_models[i].nengines) return gpu_models[i].nengines(core_count, core_features, thread_features); else return 0; } } return 0; } unsigned int util_last_bit(unsigned int u) { #if defined(HAVE___BUILTIN_CLZ) return u == 0 ? 0 : 32 - __builtin_clz(u); #elif defined(_MSC_VER) && (_M_IX86 || _M_ARM || _M_AMD64 || _M_IA64) unsigned long index; if (_BitScanReverse(&index, u)) return index + 1; else return 0; #else unsigned r = 0; while (u) { r++; u >>= 1; } return r; #endif } nvtop-3.2.0/src/extract_gpuinfo_panthor.c000066400000000000000000000152171477175131100205660ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * This file is part of Nvtop and adapted from the msm implementation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include "panthor_drm.h" #include "panthor_utils.h" #include "mali_common.h" static bool gpuinfo_panthor_init(void); static void gpuinfo_panthor_shutdown(void); static const char *gpuinfo_panthor_last_error_string(void); static bool gpuinfo_panthor_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_panthor_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_panthor_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_panthor_get_running_processes(struct gpu_info *_gpu_info); static struct gpu_vendor gpu_vendor_panthor = { .init = gpuinfo_panthor_init, .shutdown = gpuinfo_panthor_shutdown, .last_error_string = gpuinfo_panthor_last_error_string, .get_device_handles = gpuinfo_panthor_get_device_handles, .populate_static_info = gpuinfo_panthor_populate_static_info, .refresh_dynamic_info = gpuinfo_panthor_refresh_dynamic_info, .refresh_running_processes = gpuinfo_panthor_get_running_processes, .refresh_utilisation_rate = gpuinfo_refresh_utilisation_rate, .name = "panthor", }; static struct drmFuncTable drmFuncs; static struct mali_gpu_state mali_state; __attribute__((constructor)) static void init_extract_gpuinfo_panthor(void) { register_gpu_vendor(&gpu_vendor_panthor); } bool gpuinfo_panthor_init(void) { return mali_init_drm_funcs(&drmFuncs, &mali_state); } void gpuinfo_panthor_shutdown(void) { mali_shutdown_common(&mali_state, &drmFuncs); } static const char *gpuinfo_panthor_last_error_string(void) { static char driver_msg[MAX_ERR_STRING_LEN] = {0}; return mali_common_last_error_string(&mali_state, gpu_vendor_panthor.name, driver_msg); } static void panthor_check_fdinfo_keys (bool *is_engine, bool *is_cycles, bool *is_maxfreq, bool *is_curfreq, bool *is_resident, char *key) { static const char drm_panthor_engine[] = "drm-engine-panthor"; static const char drm_panthor_cycles[] = "drm-cycles-panthor"; static const char drm_panthor_maxfreq[] = "drm-maxfreq-panthor"; static const char drm_panthor_curfreq[] = "drm-curfreq-panthor"; static const char drm_panthor_resident_mem[] = "drm-resident-memory"; *is_engine = !strcmp(key, drm_panthor_engine); *is_cycles = !strcmp(key, drm_panthor_cycles); *is_maxfreq = !strcmp(key, drm_panthor_maxfreq); *is_curfreq = !strcmp(key, drm_panthor_curfreq); *is_resident = !strcmp(key, drm_panthor_resident_mem); } static bool parse_drm_fdinfo_panthor(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_mali *gpu_info = container_of(info, struct gpu_info_mali, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; struct fdinfo_data res = {0}; nvtop_time current_time; nvtop_get_current_time(¤t_time); if (!mali_common_parse_drm_fdinfo(info, fdinfo_file, process_info, dynamic_info, panthor_check_fdinfo_keys, &res)) return false; mali_common_parse_fdinfo_handle_cache(gpu_info, process_info, current_time, res.total_cycles, res.cid, res.engine_count >= 1 ? true : false); return true; } static bool gpuinfo_panthor_get_device_handles(struct list_head *devices, unsigned *count) { return mali_common_get_device_handles(&mali_state, &drmFuncs, &gpu_vendor_panthor, parse_drm_fdinfo_panthor, devices, count, NULL, MALI_PANTHOR); } void gpuinfo_panthor_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_mali *gpu_info = container_of(_gpu_info, struct gpu_info_mali, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; if (gpu_info->version != MALI_PANTHOR) { fprintf(stderr, "Wrong device version: %u\n", gpu_info->version); abort(); } static_info->integrated_graphics = true; static_info->encode_decode_shared = true; RESET_ALL(static_info->valid); struct drm_panthor_gpu_info gpu_dev_info = {0}; struct drm_panthor_dev_query query = { .type = DRM_PANTHOR_DEV_QUERY_GPU_INFO, .size = sizeof(gpu_dev_info), .pointer = (uint64_t)(uintptr_t)&gpu_dev_info, }; int ret = drmFuncs.drmIoctl(gpu_info->fd, DRM_IOCTL_PANTHOR_DEV_QUERY, &query); if (ret) { fprintf(stderr, "Failed to query Panthor GPU device properties\n"); snprintf(static_info->device_name, sizeof(static_info->device_name), "Unknown Panthor %x", gpu_dev_info.gpu_id); SET_VALID(gpuinfo_device_name_valid, static_info->valid); return; } const char *name = panthor_device_name(gpu_dev_info.gpu_id); if (name) strncpy(static_info->device_name, name, sizeof(static_info->device_name)); else snprintf(static_info->device_name, sizeof(static_info->device_name), "Unknown Panthor %x", gpu_dev_info.gpu_id); SET_VALID(gpuinfo_device_name_valid, static_info->valid); } void gpuinfo_panthor_refresh_dynamic_info(struct gpu_info *_gpu_info) { static const char *meminfo_total = "MemTotal"; static const char *meminfo_available = "MemAvailable"; struct gpu_info_mali *gpu_info = container_of(_gpu_info, struct gpu_info_mali, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; if (gpu_info->version != MALI_PANTHOR) { fprintf(stderr, "Wrong device version: %u\n", gpu_info->version); abort(); } mali_common_refresh_dynamic_info(dynamic_info, &mali_state, meminfo_total, meminfo_available); } void gpuinfo_panthor_get_running_processes(struct gpu_info *_gpu_info) { mali_common_get_running_processes(_gpu_info, MALI_PANTHOR); } nvtop-3.2.0/src/extract_gpuinfo_panthor_utils.c000066400000000000000000000036451477175131100220100ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include "nvtop/interface_internal_common.h" #include "panthor_utils.h" /** * struct panthor_model - GPU model description */ struct panthor_model { /** @name: Model name. */ const char *name; /** @arch_major: Major version number of architecture */ uint8_t arch_major; /* @product_major: Major version number of product */ uint8_t product_major; }; /** * GPU_MODEL() - Define a GPU model. A GPU product can be uniquely identified * by a combination of the major architecture version and the major product * version. */ #define GPU_MODEL(_name, _arch_major, _product_major) \ { \ .name = #_name, \ .arch_major = _arch_major, \ .product_major = _product_major, \ } static const struct panthor_model gpu_models[] = { GPU_MODEL(g610, 10, 7), GPU_MODEL(g310, 10, 4), {0}, }; const char * panthor_device_name(uint32_t gpu_id) { uint32_t arch_major, product_major; const struct panthor_model *model; arch_major = (gpu_id >> 28) & 0xf; product_major = (gpu_id >> 16) & 0xf; for (model = gpu_models; model->name; model++) { if (model->arch_major == arch_major && model->product_major == product_major) return model->name; } return NULL; } nvtop-3.2.0/src/extract_gpuinfo_tpu.c000066400000000000000000000251351477175131100177230ustar00rootroot00000000000000/* * * Copyright (C) 2025 Robert Dyro * * This file is part of Nvtop * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/time.h" #include #include #include #include #include #include #include #include struct gpu_info_tpu { struct gpu_info base; int device_id; }; struct tpu_chip_usage_data { char name[8]; int64_t device_id; int64_t memory_usage; int64_t total_memory; double duty_cycle_pct; int64_t pid; }; static bool gpuinfo_tpu_init(void); static void gpuinfo_tpu_shutdown(void); static const char *gpuinfo_tpu_last_error_string(void); static bool gpuinfo_tpu_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_tpu_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_tpu_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_tpu_get_running_processes(struct gpu_info *_gpu_info); static bool is_cache_valid(void); static bool refresh_tpu_cache(void); static void reset_tpu_cache(bool); static void free_ptr(void **ptr); struct gpu_vendor gpu_vendor_tpu = { .init = gpuinfo_tpu_init, .shutdown = gpuinfo_tpu_shutdown, .last_error_string = gpuinfo_tpu_last_error_string, .get_device_handles = gpuinfo_tpu_get_device_handles, .populate_static_info = gpuinfo_tpu_populate_static_info, .refresh_dynamic_info = gpuinfo_tpu_refresh_dynamic_info, .refresh_running_processes = gpuinfo_tpu_get_running_processes, .name = "TPU", }; __attribute__((constructor)) static void init_extract_gpuinfo_tpu(void) { register_gpu_vendor(&gpu_vendor_tpu); } int64_t tpu_chip_count = -1; static struct gpu_info_tpu *gpu_infos; #define STRINGIFY(x) STRINGIFY_HELPER_(x) #define STRINGIFY_HELPER_(x) #x #define VENDOR_TPU 0x1ae0 #define VENDOR_TPU_STR STRINGIFY(VENDOR_TPU) #define MAX(x, y) ((x >= y) ? (x) : (y)) #define MIN(x, y) ((x <= y) ? (x) : (y)) #define int64 long long int (*_tpu_chip_count)(void); int (*_tpu_metrics)(int port, int64 *device_ids, int64 *memory_usage, int64 *total_memory, double *duty_cycle_pct, int n); int (*_tpu_pids)(int64 *pids, int n); char *libname = "libtpuinfo.so"; // -1 means allowing libtpuinfo to select the default port // env LIBTPUINFO_GRPC_PORT={int} allows setting the port via an environment variable // $ env LIBTPUINFO_GRPC_PORT=8431 nvtop int tpu_runtime_monitoring_port = -1; /* TPU info cache ------------------------------------------------------------------------------- */ struct tpu_chip_usage_data *latest_chips_usage_data = NULL; nvtop_time last_cache_refresh; int64 *_pids, *_device_ids, *_memory_usage, *_total_memory; double* _duty_cycle_pct; bool is_cache_valid(void) { nvtop_time current_time; nvtop_get_current_time(¤t_time); uint64_t t_diff_ns = nvtop_difftime_u64(last_cache_refresh, current_time); return t_diff_ns < 900 * 1000 * 1000; // 900ms } bool refresh_tpu_cache(void) { if (is_cache_valid()) return true; nvtop_get_current_time(&last_cache_refresh); if (tpu_chip_count <= 0) return false; if (_tpu_pids(_pids, tpu_chip_count) != 0) { reset_tpu_cache(false); return false; } for (int64_t i = 0; i < tpu_chip_count; i++) latest_chips_usage_data[i].pid = _pids[i]; if (_tpu_metrics(tpu_runtime_monitoring_port, _device_ids, _memory_usage, _total_memory, _duty_cycle_pct, tpu_chip_count) != 0) return false; for (int64_t i = 0; i < tpu_chip_count; i++) { latest_chips_usage_data[i].device_id = _device_ids[i]; latest_chips_usage_data[i].memory_usage = _memory_usage[i]; latest_chips_usage_data[i].total_memory = _total_memory[i]; latest_chips_usage_data[i].duty_cycle_pct = _duty_cycle_pct[i]; } return true; } void reset_tpu_cache(bool fully) { for (int64_t i = 0; i < tpu_chip_count; i++) { latest_chips_usage_data[i].memory_usage = 0; latest_chips_usage_data[i].duty_cycle_pct = 0; latest_chips_usage_data[i].pid = -1; if (fully) { snprintf(latest_chips_usage_data[i].name, sizeof(latest_chips_usage_data[i].name), "%s", "N/A"); latest_chips_usage_data[i].device_id = 0; latest_chips_usage_data[i].total_memory = 0; } } } /* TPU info cache ------------------------------------------------------------------------------- */ bool gpuinfo_tpu_init(void) { char* error_msg; nvtop_get_current_time(&last_cache_refresh); // invalidate cache by putting it in the past last_cache_refresh = nvtop_substract_time(last_cache_refresh, (nvtop_time){10, 0}); // Load dynamic library symbols void *handle = dlopen(libname, RTLD_LAZY); if (!handle) { error_msg = dlerror(); #ifndef NDEBUG if (error_msg != NULL) fprintf(stderr, "TPU support error: %s\n", error_msg); #endif return false; } // Resolve the necessary symbols within the library _tpu_chip_count = dlsym(handle, "tpu_chip_count"); error_msg = dlerror(); if (error_msg != NULL) { #ifndef NDEBUG fprintf(stderr, "libtpuinfo can't resolve symbol `tpu_chip_count` with error: %s\n", error_msg); #endif return false; } _tpu_pids = dlsym(handle, "tpu_pids"); error_msg = dlerror(); if (error_msg != NULL) { #ifndef NDEBUG fprintf(stderr, "libtpuinfo can't resolve symbol `tpu_pids` with error: %s\n", error_msg); #endif return false; } _tpu_metrics = dlsym(handle, "tpu_metrics"); error_msg = dlerror(); if (error_msg != NULL) { #ifndef NDEBUG fprintf(stderr, "libtpuinfo can't resolve symbol `tpu_metrics` with error: %s\n", error_msg); #endif return false; } // Discover TPU devices tpu_chip_count = _tpu_chip_count(); if (tpu_chip_count == 0) { #ifndef NDEBUG fprintf(stderr, "Found 0 TPU devices on the system.\n"); #endif return false; } // Allocate memory for TPU device data cache latest_chips_usage_data = (struct tpu_chip_usage_data*)malloc(tpu_chip_count*sizeof(struct tpu_chip_usage_data)); _pids = (int64*)malloc(sizeof(int64) * tpu_chip_count); _device_ids = (int64*)malloc(sizeof(int64) * tpu_chip_count); _memory_usage = (int64*)malloc(sizeof(int64) * tpu_chip_count); _total_memory = (int64*)malloc(sizeof(int64) * tpu_chip_count); _duty_cycle_pct = (double*)malloc(sizeof(double) * tpu_chip_count); reset_tpu_cache(true); return true; } void free_ptr(void **ptr) { if (ptr != NULL && *ptr != NULL) { free(*ptr); *ptr = NULL; } } void gpuinfo_tpu_shutdown(void) { free_ptr((void **)&gpu_infos); free_ptr((void **)&latest_chips_usage_data); free_ptr((void **)&_pids); free_ptr((void **)&_device_ids); free_ptr((void **)&_memory_usage); free_ptr((void **)&_total_memory); free_ptr((void **)&_duty_cycle_pct); tpu_chip_count = -1; } const char *gpuinfo_tpu_last_error_string(void) { return "Err"; } static void add_tpu_chip(struct list_head *devices, unsigned *count) { struct gpu_info_tpu *this_tpu = &gpu_infos[*count]; this_tpu->base.vendor = &gpu_vendor_tpu; this_tpu->device_id = *count; snprintf(this_tpu->base.pdev, PDEV_LEN, "TPU%u", *count); list_add_tail(&this_tpu->base.list, devices); this_tpu->base.processes_count = 0; this_tpu->base.processes = NULL; this_tpu->base.processes_array_size = 0; *count = *count + 1; } bool gpuinfo_tpu_get_device_handles(struct list_head *devices_list, unsigned *count) { *count = 0; if (tpu_chip_count <= 0) return false; gpu_infos = (struct gpu_info_tpu *)calloc(tpu_chip_count, sizeof(*gpu_infos)); if (!gpu_infos) return false; for (int64_t i = 0; i < tpu_chip_count; i++) add_tpu_chip(devices_list, count); return true; } void gpuinfo_tpu_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_tpu *gpu_info = container_of(_gpu_info, struct gpu_info_tpu, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; static_info->integrated_graphics = false; static_info->encode_decode_shared = false; RESET_ALL(static_info->valid); snprintf(static_info->device_name, MIN(sizeof(static_info->device_name), PDEV_LEN), "%s", gpu_info->base.pdev); SET_VALID(gpuinfo_device_name_valid, static_info->valid); } void gpuinfo_tpu_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_tpu *gpu_info = container_of(_gpu_info, struct gpu_info_tpu, base); // struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; // unused struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; refresh_tpu_cache(); if (gpu_info->device_id >= tpu_chip_count) return; struct tpu_chip_usage_data usage_data = latest_chips_usage_data[gpu_info->device_id]; double mem_util = round(1e2 * (double)(usage_data.memory_usage) / (double)MAX(1, usage_data.total_memory)); double tpu_util = round(usage_data.duty_cycle_pct); SET_GPUINFO_DYNAMIC(dynamic_info, gpu_util_rate, (int)tpu_util); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, (int)mem_util); SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, usage_data.total_memory); SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, usage_data.memory_usage); SET_GPUINFO_DYNAMIC(dynamic_info, free_memory, usage_data.total_memory - usage_data.memory_usage); return; } void gpuinfo_tpu_get_running_processes(struct gpu_info *_gpu_info) { struct gpu_info_tpu *gpu_info = container_of(_gpu_info, struct gpu_info_tpu, base); if (gpu_info->device_id >= tpu_chip_count) return; if (tpu_chip_count <= 0 || latest_chips_usage_data[gpu_info->device_id].pid < 0) { _gpu_info->processes_count = 0; return; } _gpu_info->processes_count = 1; if (_gpu_info->processes_array_size == 0) { _gpu_info->processes_array_size = 1; _gpu_info->processes = (struct gpu_process*)malloc(1 * sizeof(struct gpu_process)); memset(_gpu_info->processes, 0, _gpu_info->processes_count * sizeof(*_gpu_info->processes)); } _gpu_info->processes[0].type = gpu_process_compute; _gpu_info->processes[0].pid = latest_chips_usage_data[gpu_info->device_id].pid; _gpu_info->processes[0].gpu_memory_usage = _gpu_info->dynamic_info.used_memory; SET_VALID(gpuinfo_process_gpu_memory_usage_valid, _gpu_info->processes[0].valid); } nvtop-3.2.0/src/extract_gpuinfo_v3d.c000066400000000000000000000256051477175131100176110ustar00rootroot00000000000000/* * * Copyright (C) 2022 Hoream Xiao * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include #include #include #include int mbox_open(void); void mbox_close(int mb); void set_debug_files(int card_id); void set_gpuinfo_from_vcio(struct gpuinfo_dynamic_info *dynamic_info, int mb); void set_memory_gpuinfo(struct gpuinfo_dynamic_info *dynamic_info); void set_init_max_memory(int mb); #define HASH_FIND_CLIENT(head, key_ptr, out_ptr) HASH_FIND(hh, head, key_ptr, sizeof(struct unique_cache_id), out_ptr) #define HASH_ADD_CLIENT(head, in_ptr) HASH_ADD(hh, head, client_id, sizeof(struct unique_cache_id), in_ptr) #define SET_V3D_CACHE(cachePtr, field, value) SET_VALUE(cachePtr, field, value, v3d_cache_) #define RESET_V3D_CACHE(cachePtr, field) INVALIDATE_VALUE(cachePtr, field, v3d_cache_) #define V3D_CACHE_FIELD_VALID(cachePtr, field) VALUE_IS_VALID(cachePtr, field, v3d_cache_) enum v3d_process_info_cache_valid { v3d_cache_engine_render_valid = 0, v3d_cache_process_info_cache_valid_count }; struct __attribute__((__packed__)) unique_cache_id { unsigned client_id; pid_t pid; }; struct v3d_process_info_cache { struct unique_cache_id client_id; uint64_t engine_render; nvtop_time last_measurement_tstamp; unsigned char valid[(v3d_cache_process_info_cache_valid_count + CHAR_BIT - 1) / CHAR_BIT]; UT_hash_handle hh; }; struct gpu_info_v3d { struct gpu_info base; int mb; int card_id; struct nvtop_device *card_device; struct nvtop_device *driver_device; struct v3d_process_info_cache *last_update_process_cache, *current_update_process_cache; // Cached processes info }; static bool gpuinfo_v3d_init(void); static void gpuinfo_v3d_shutdown(void); static const char *gpuinfo_v3d_last_error_string(void); static bool gpuinfo_v3d_get_device_handles(struct list_head *devices, unsigned *count); static void gpuinfo_v3d_populate_static_info(struct gpu_info *_gpu_info); static void gpuinfo_v3d_refresh_dynamic_info(struct gpu_info *_gpu_info); static void gpuinfo_v3d_get_running_processes(struct gpu_info *_gpu_info); struct gpu_vendor gpu_vendor_v3d = { .init = gpuinfo_v3d_init, .shutdown = gpuinfo_v3d_shutdown, .last_error_string = gpuinfo_v3d_last_error_string, .get_device_handles = gpuinfo_v3d_get_device_handles, .populate_static_info = gpuinfo_v3d_populate_static_info, .refresh_dynamic_info = gpuinfo_v3d_refresh_dynamic_info, .refresh_running_processes = gpuinfo_v3d_get_running_processes, .name = "v3d", }; unsigned v3d_gpu_count; static struct gpu_info_v3d *gpu_infos; __attribute__((constructor)) static void init_extract_gpuinfo_v3d(void) { register_gpu_vendor(&gpu_vendor_v3d); } bool gpuinfo_v3d_init(void) { return true; } void gpuinfo_v3d_shutdown(void) { for (unsigned i = 0; i < v3d_gpu_count; ++i) { struct gpu_info_v3d *current = &gpu_infos[i]; nvtop_device_unref(current->card_device); nvtop_device_unref(current->driver_device); if (current->mb >= 0) mbox_close(current->mb); } } const char *gpuinfo_v3d_last_error_string(void) { return "Err"; } static const char v3d_drm_engine_render[] = "drm-engine-render"; static const char v3d_drm_total_memory[] = "drm-total-memory"; static bool parse_drm_fdinfo_v3d(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info) { struct gpu_info_v3d *gpu_info = container_of(info, struct gpu_info_v3d, base); static char *line = NULL; static size_t line_buf_size = 0; ssize_t count = 0; bool client_id_set = false; unsigned cid; nvtop_time current_time; nvtop_get_current_time(¤t_time); while ((count = getline(&line, &line_buf_size, fdinfo_file)) != -1) { char *key, *val; // Get rid of the newline if present if (line[count - 1] == '\n') { line[--count] = '\0'; } if (!extract_drm_fdinfo_key_value(line, &key, &val)) continue; if (!strcmp(key, drm_client_id)) { char *endptr; cid = strtoul(val, &endptr, 10); if (*endptr) continue; client_id_set = true; } else if (!strcmp(key, v3d_drm_total_memory)) { unsigned long mem_int; char *endptr; mem_int = strtoul(val, &endptr, 10); if (endptr == val || (strcmp(endptr, " kB") && strcmp(endptr, " KiB"))) continue; SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, mem_int * 1024); } else if (!strcmp(key, v3d_drm_engine_render)) { char *endptr; uint64_t time_spent = strtoull(val, &endptr, 10); if (endptr == val || strcmp(endptr, " ns")) continue; SET_GPUINFO_PROCESS(process_info, gfx_engine_used, time_spent); } } if (!client_id_set) return false; process_info->type |= gpu_process_graphical; struct unique_cache_id ucid = {.client_id = cid, .pid = process_info->pid}; struct v3d_process_info_cache *cache_entry; HASH_FIND_CLIENT(gpu_info->last_update_process_cache, &ucid, cache_entry); if (cache_entry) { uint64_t time_elapsed = nvtop_difftime_u64(cache_entry->last_measurement_tstamp, current_time); HASH_DEL(gpu_info->last_update_process_cache, cache_entry); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used) && V3D_CACHE_FIELD_VALID(cache_entry, engine_render) && process_info->gfx_engine_used >= cache_entry->engine_render && process_info->gfx_engine_used - cache_entry->engine_render <= time_elapsed) { SET_GPUINFO_PROCESS( process_info, gpu_usage, busy_usage_from_time_usage_round(process_info->gfx_engine_used, cache_entry->engine_render, time_elapsed)); } } else { cache_entry = calloc(1, sizeof(*cache_entry)); if (!cache_entry) goto parse_fdinfo_exit; cache_entry->client_id.client_id = cid; cache_entry->client_id.pid = process_info->pid; } RESET_ALL(cache_entry->valid); if (GPUINFO_PROCESS_FIELD_VALID(process_info, gfx_engine_used)) SET_V3D_CACHE(cache_entry, engine_render, process_info->gfx_engine_used); cache_entry->last_measurement_tstamp = current_time; HASH_ADD_CLIENT(gpu_info->current_update_process_cache, cache_entry); parse_fdinfo_exit: return true; } static void add_v3d_cards(struct nvtop_device *dev, const char *devname, struct list_head *devices, unsigned *count) { struct nvtop_device *parent; if (nvtop_device_get_parent(dev, &parent) < 0) return; const char *driver; nvtop_device_get_driver(parent, &driver); if (strcmp(driver, "v3d")) return; struct gpu_info_v3d *thisGPU = &gpu_infos[v3d_gpu_count++]; thisGPU->base.vendor = &gpu_vendor_v3d; thisGPU->card_device = nvtop_device_ref(dev); thisGPU->driver_device = nvtop_device_ref(parent); list_add_tail(&thisGPU->base.list, devices); // Register a fdinfo callback for this GPU processinfo_register_fdinfo_callback(parse_drm_fdinfo_v3d, &thisGPU->base); thisGPU->mb = mbox_open(); if (sscanf(devname, "/dev/dri/card%d", &thisGPU->card_id) != 1) thisGPU->card_id = 0; set_debug_files(thisGPU->card_id); (*count)++; } bool gpuinfo_v3d_get_device_handles(struct list_head *devices_list, unsigned *count) { *count = 0; nvtop_device_enumerator *enumerator; if (nvtop_enumerator_new(&enumerator) < 0) return false; if (nvtop_device_enumerator_add_match_subsystem(enumerator, "drm", true) < 0) return false; if (nvtop_device_enumerator_add_match_property(enumerator, "DEVNAME", "/dev/dri/*") < 0) return false; unsigned num_devices = 0; for (nvtop_device *device = nvtop_enumerator_get_device_first(enumerator); device; device = nvtop_enumerator_get_device_next(enumerator)) { num_devices++; } gpu_infos = calloc(num_devices, sizeof(*gpu_infos)); if (!gpu_infos) return false; for (nvtop_device *device = nvtop_enumerator_get_device_first(enumerator); device; device = nvtop_enumerator_get_device_next(enumerator)) { num_devices++; const char *devname; if (nvtop_device_get_devname(device, &devname) < 0) continue; if (strstr(devname, "/dev/dri/card")) { add_v3d_cards(device, devname, devices_list, count); } } nvtop_enumerator_unref(enumerator); return true; } void gpuinfo_v3d_populate_static_info(struct gpu_info *_gpu_info) { struct gpu_info_v3d *gpu_info = container_of(_gpu_info, struct gpu_info_v3d, base); struct gpuinfo_static_info *static_info = &gpu_info->base.static_info; const char *dev_name = "VIDEO CORE"; static_info->integrated_graphics = true; static_info->encode_decode_shared = false; RESET_ALL(static_info->valid); snprintf(static_info->device_name, sizeof(static_info->device_name), "%s", dev_name); SET_VALID(gpuinfo_device_name_valid, static_info->valid); if (gpu_info->mb >= 0) set_init_max_memory(gpu_info->mb); } void gpuinfo_v3d_refresh_dynamic_info(struct gpu_info *_gpu_info) { struct gpu_info_v3d *gpu_info = container_of(_gpu_info, struct gpu_info_v3d, base); struct gpuinfo_dynamic_info *dynamic_info = &gpu_info->base.dynamic_info; RESET_ALL(dynamic_info->valid); nvtop_device *card_dev_copy; const char *syspath; nvtop_device_get_syspath(gpu_info->card_device, &syspath); nvtop_device_new_from_syspath(&card_dev_copy, syspath); set_memory_gpuinfo(dynamic_info); if (gpu_info->mb >= 0) set_gpuinfo_from_vcio(dynamic_info, gpu_info->mb); nvtop_device_unref(card_dev_copy); } static void swap_process_cache_for_next_update(struct gpu_info_v3d *gpu_info) { // Free old cache data and set the cache for the next update if (gpu_info->last_update_process_cache) { struct v3d_process_info_cache *cache_entry, *tmp; HASH_ITER(hh, gpu_info->last_update_process_cache, cache_entry, tmp) { HASH_DEL(gpu_info->last_update_process_cache, cache_entry); free(cache_entry); } } gpu_info->last_update_process_cache = gpu_info->current_update_process_cache; gpu_info->current_update_process_cache = NULL; } void gpuinfo_v3d_get_running_processes(struct gpu_info *_gpu_info) { // For v3d, we register a fdinfo callback that will fill the gpu_process datastructure of the gpu_info structure // for us. This avoids going through /proc multiple times per update for multiple GPUs. struct gpu_info_v3d *gpu_info = container_of(_gpu_info, struct gpu_info_v3d, base); swap_process_cache_for_next_update(gpu_info); } nvtop-3.2.0/src/extract_gpuinfo_v3d_utils.c000066400000000000000000000137561477175131100210350ustar00rootroot00000000000000/* * * Copyright (C) 2022 Hoream Xiao * * This file is part of Nvtop and adapted from the vcgencmd implementation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/extract_gpuinfo_common.h" #include #include #include #include #include #include #include /* * use ioctl to send mbox property message */ #define DEVICE_FILE_NAME "/dev/vcio" #define MAJOR_NUM 100 #define IOCTL_MBOX_PROPERTY _IOWR(MAJOR_NUM, 0, char *) #define MAX_STRING 1024 #define GET_GENCMD_RESULT 0x00030080 #define MAX_DECODER_FREQUENCE 550006336 int mbox_open(void); void mbox_close(int mb); void set_debug_files(int card_id); void set_gpuinfo_from_vcio(struct gpuinfo_dynamic_info *dynamic_info, int mb); void set_memory_gpuinfo(struct gpuinfo_dynamic_info *dynamic_info); void set_init_max_memory(int mb); static uint64_t max_gpu_memory_bytes = 128 << 20; static const char measure_temp[] = "measure_temp"; static const char measure_clock_v3d[] = "measure_clock v3d"; static const char measure_clock_h264[] = "measure_clock h264"; static const char get_mem_gpu[] = "get_mem gpu"; static char bo_stats_file[50]; void set_debug_files(int card_id) { snprintf(bo_stats_file, sizeof(bo_stats_file), "/sys/kernel/debug/dri/%d/bo_stats", card_id); if (access(bo_stats_file, F_OK)) printf("%s is not available.\n", bo_stats_file); } static int mbox_property(int mb, void *buf) { int ret_val = ioctl(mb, IOCTL_MBOX_PROPERTY, buf); if (ret_val < 0) { printf("ioctl_set_msg failed:%d\n", ret_val); } return ret_val; } int mbox_open(void) { int mb; // open a char device file used for communicating with kernel mbox driver mb = open(DEVICE_FILE_NAME, 0); if (mb < 0) { printf("Can't open device file: %s\n", DEVICE_FILE_NAME); printf("Try creating a device file with: sudo mknod %s c %d 0\n", DEVICE_FILE_NAME, MAJOR_NUM); } return mb; } void mbox_close(int mb) { close(mb); } static unsigned gencmd(int mb, const char *command, char *result, int result_len) { int i = 0; unsigned p[(MAX_STRING >> 2) + 7]; int len = strlen(command); // maximum length for command or response if (len + 1 >= MAX_STRING) { fprintf(stderr, "gencmd length too long : %d\n", len); return -1; } p[i++] = 0; // size p[i++] = 0x00000000; // process request p[i++] = GET_GENCMD_RESULT; // (the tag id) p[i++] = MAX_STRING; // buffer_len p[i++] = 0; // request_len (set to response length) p[i++] = 0; // error response memcpy(p + i, command, len + 1); i += MAX_STRING >> 2; p[i++] = 0x00000000; // end tag p[0] = i * sizeof *p; // actual size mbox_property(mb, p); result[0] = 0; size_t available_space = result_len - strlen(result) - 1; strncat(result, (const char *)(p + 6), available_space); return p[5]; } void set_init_max_memory(int mb) { char result[MAX_STRING] = {}; int ret = gencmd(mb, get_mem_gpu, result, sizeof result); if (!ret) { if (sscanf(result, "gpu=%luM", &max_gpu_memory_bytes) == 1) { max_gpu_memory_bytes <<= 20; } } } static unsigned cal_percentage_usage(unsigned usage, unsigned all) { return (unsigned)(100.0 * usage / all + 0.5); } static void set_gpuinfo_decode(struct gpuinfo_dynamic_info *dynamic_info, int mb) { unsigned int decode_usage = 0; char result[MAX_STRING] = {}; int ret = gencmd(mb, measure_clock_h264, result, sizeof result); if (!ret) { if (sscanf(result, "frequency(28)=%u", &decode_usage) == 1) // divide current frequency by max frequency; usage rate might not be accurate. SET_GPUINFO_DYNAMIC(dynamic_info, decoder_rate, cal_percentage_usage(decode_usage, MAX_DECODER_FREQUENCE)); } } static void set_gpuinfo_temp(struct gpuinfo_dynamic_info *dynamic_info, int mb) { float temperature = 0; char result[MAX_STRING] = {}; int ret = gencmd(mb, measure_temp, result, sizeof result); if (!ret) { if (sscanf(result, "temp=%f'C", &temperature) == 1) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_temp, (unsigned)temperature); } } } static void set_gpuinfo_clock(struct gpuinfo_dynamic_info *dynamic_info, int mb) { unsigned int clock = 0; char result[MAX_STRING] = {}; int ret = gencmd(mb, measure_clock_v3d, result, sizeof result); if (!ret) { if (sscanf(result, "frequency(46)=%u", &clock) == 1) { SET_GPUINFO_DYNAMIC(dynamic_info, gpu_clock_speed, clock >> 20); } } } void set_gpuinfo_from_vcio(struct gpuinfo_dynamic_info *dynamic_info, int mb) { set_gpuinfo_temp(dynamic_info, mb); set_gpuinfo_clock(dynamic_info, mb); set_gpuinfo_decode(dynamic_info, mb); } void set_memory_gpuinfo(struct gpuinfo_dynamic_info *dynamic_info) { FILE *fp = fopen(bo_stats_file, "rb"); if (fp == NULL) { return; } char line[256]; uint64_t allocated_bo_size_kb = 0; while (fgets(line, sizeof(line), fp)) { if (sscanf(line, "allocated bo size (kb): %lu", &allocated_bo_size_kb) == 1) { break; } } fclose(fp); uint64_t allocated_bo_size_bytes = allocated_bo_size_kb << 10; SET_GPUINFO_DYNAMIC(dynamic_info, used_memory, allocated_bo_size_bytes); if (allocated_bo_size_bytes >= max_gpu_memory_bytes) max_gpu_memory_bytes = allocated_bo_size_bytes; SET_GPUINFO_DYNAMIC(dynamic_info, total_memory, max_gpu_memory_bytes); SET_GPUINFO_DYNAMIC(dynamic_info, mem_util_rate, cal_percentage_usage(allocated_bo_size_bytes, max_gpu_memory_bytes)); } nvtop-3.2.0/src/extract_processinfo_fdinfo.c000066400000000000000000000256361477175131100212510ustar00rootroot00000000000000/* * Copyright (C) 2022 YiFei Zhu * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop and adapted from radeontop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/common.h" #include "nvtop/extract_gpuinfo_common.h" #include #include #include #include #include #include #include #ifdef __linux__ // for major() on linux (available in sys/types.h on BSD) #include #endif #include #include #ifndef KCMP_FILE #define KCMP_FILE 0 #endif struct callback_entry { struct gpu_info *gpu_info; processinfo_fdinfo_callback callback; bool active; }; static unsigned registered_callback_entries; #define FDINFO_CALLBACK_ARRAY_INCREMENT 4 static unsigned callback_entries_size; static struct callback_entry *callback_entries; void processinfo_drop_callback(const struct gpu_info *info) { for (unsigned index = 0; index < registered_callback_entries; ++index) { if (callback_entries[index].gpu_info == info) { memmove(&callback_entries[index], &callback_entries[index + 1], (registered_callback_entries - index) * sizeof(*callback_entries)); return; } } } void processinfo_register_fdinfo_callback(processinfo_fdinfo_callback callback, struct gpu_info *info) { if (callback_entries_size == registered_callback_entries) { callback_entries_size += FDINFO_CALLBACK_ARRAY_INCREMENT; callback_entries = reallocarray(callback_entries, callback_entries_size, sizeof(*callback_entries)); if (!callback_entries) { perror("Could not re-allocate memory: "); exit(EXIT_FAILURE); } } callback_entries[registered_callback_entries].gpu_info = info; callback_entries[registered_callback_entries].callback = callback; callback_entries[registered_callback_entries].active = true; registered_callback_entries++; } void processinfo_enable_disable_callback_for(const struct gpu_info *info, bool enable) { for (unsigned index = 0; index < registered_callback_entries; ++index) { if (callback_entries[index].gpu_info == info) { callback_entries[index].active = enable; } } } static bool is_drm_fd(int fd_dir_fd, const char *name) { struct stat stat; int ret; ret = fstatat(fd_dir_fd, name, &stat, 0); return ret == 0 && (stat.st_mode & S_IFMT) == S_IFCHR && major(stat.st_rdev) == 226; } // Increment for the number DRM FD tracked per process // 8 has been experimentally selected for being small while avoiding multipe allocations in most common cases #define DRM_FD_LINEAR_REALLOC_INC 8 void processinfo_sweep_fdinfos(void) { bool anyActiveCallback = false; for (unsigned callback_idx = 0; !anyActiveCallback && callback_idx < registered_callback_entries; ++callback_idx) { struct callback_entry *current_callback = &callback_entries[callback_idx]; anyActiveCallback = anyActiveCallback || current_callback->active; } if (!anyActiveCallback) return; DIR *proc_dir = opendir("/proc"); if (!proc_dir) return; static unsigned seen_fds_capacity = 0; static int *seen_fds = NULL; struct dirent *proc_dent; while ((proc_dent = readdir(proc_dir)) != NULL) { int pid_dir_fd = -1, fd_dir_fd = -1, fdinfo_dir_fd = -1; DIR *fdinfo_dir = NULL; unsigned int seen_fds_len = 0; struct dirent *fdinfo_dent; unsigned int client_pid; if (proc_dent->d_type != DT_DIR) continue; if (!isdigit(proc_dent->d_name[0])) continue; pid_dir_fd = openat(dirfd(proc_dir), proc_dent->d_name, O_DIRECTORY); if (pid_dir_fd < 0) continue; client_pid = atoi(proc_dent->d_name); if (!client_pid) goto next; fd_dir_fd = openat(pid_dir_fd, "fd", O_DIRECTORY); if (fd_dir_fd < 0) goto next; fdinfo_dir_fd = openat(pid_dir_fd, "fdinfo", O_DIRECTORY); if (fdinfo_dir_fd < 0) goto next; fdinfo_dir = fdopendir(fdinfo_dir_fd); if (!fdinfo_dir) { close(fdinfo_dir_fd); goto next; } next_fd: while ((fdinfo_dent = readdir(fdinfo_dir)) != NULL) { struct gpu_process processes_info_local = {0}; int fd_num; if (fdinfo_dent->d_type != DT_REG) continue; if (!isdigit(fdinfo_dent->d_name[0])) continue; if (!is_drm_fd(fd_dir_fd, fdinfo_dent->d_name)) continue; fd_num = atoi(fdinfo_dent->d_name); // check if this fd refers to the same open file as any seen ones. // we only care about unique opens for (unsigned i = 0; i < seen_fds_len; i++) { if (syscall(SYS_kcmp, client_pid, client_pid, KCMP_FILE, fd_num, seen_fds[i]) <= 0) goto next_fd; } if (seen_fds_len == seen_fds_capacity) { seen_fds_capacity += DRM_FD_LINEAR_REALLOC_INC; seen_fds = reallocarray(seen_fds, seen_fds_capacity, sizeof(*seen_fds)); if (!seen_fds) { perror("Could not re-allocate memory: "); exit(EXIT_FAILURE); } } seen_fds[seen_fds_len++] = fd_num; int fdinfo_fd = openat(fdinfo_dir_fd, fdinfo_dent->d_name, O_RDONLY); if (fdinfo_fd < 0) continue; FILE *fdinfo_file = fdopen(fdinfo_fd, "r"); if (!fdinfo_file) { close(fdinfo_fd); continue; } bool callback_success = false; struct callback_entry *current_callback = NULL; processes_info_local.pid = client_pid; for (unsigned callback_idx = 0; !callback_success && callback_idx < registered_callback_entries; ++callback_idx) { rewind(fdinfo_file); fflush(fdinfo_file); RESET_ALL(processes_info_local.valid); processes_info_local.type = gpu_process_unknown; current_callback = &callback_entries[callback_idx]; if (current_callback->active) callback_success = current_callback->callback(current_callback->gpu_info, fdinfo_file, &processes_info_local); else callback_success = false; } fclose(fdinfo_file); if (!callback_success) continue; // Default to graphical type if (processes_info_local.type == gpu_process_unknown) processes_info_local.type = gpu_process_graphical; unsigned process_index = current_callback->gpu_info->processes_count ? current_callback->gpu_info->processes_count - 1 : 0; // Alloc when array is empty or realloc when this pid does not correspond to the last entry and the array is full if ((current_callback->gpu_info->processes_count == 0 || current_callback->gpu_info->processes[process_index].pid != (pid_t)client_pid) && current_callback->gpu_info->processes_count == current_callback->gpu_info->processes_array_size) { current_callback->gpu_info->processes_array_size += COMMON_PROCESS_LINEAR_REALLOC_INC; current_callback->gpu_info->processes = reallocarray(current_callback->gpu_info->processes, current_callback->gpu_info->processes_array_size, sizeof(*current_callback->gpu_info->processes)); if (!current_callback->gpu_info->processes) { perror("Could not re-allocate memory: "); exit(EXIT_FAILURE); } new_empty_process_entry: process_index = current_callback->gpu_info->processes_count++; memset(¤t_callback->gpu_info->processes[process_index], 0, sizeof(*current_callback->gpu_info->processes)); current_callback->gpu_info->processes[process_index].pid = client_pid; } // No alloc/realloc with different pid case if (current_callback->gpu_info->processes_count == 0 || current_callback->gpu_info->processes[process_index].pid != (pid_t)client_pid) { goto new_empty_process_entry; } struct gpu_process *process_info = ¤t_callback->gpu_info->processes[process_index]; process_info->type |= processes_info_local.type; if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, gpu_memory_usage)) { SET_GPUINFO_PROCESS(process_info, gpu_memory_usage, process_info->gpu_memory_usage + processes_info_local.gpu_memory_usage); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, gpu_usage)) { SET_GPUINFO_PROCESS(process_info, gpu_usage, process_info->gpu_usage + processes_info_local.gpu_usage); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, encode_usage)) { SET_GPUINFO_PROCESS(process_info, encode_usage, process_info->encode_usage + processes_info_local.encode_usage); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, decode_usage)) { SET_GPUINFO_PROCESS(process_info, decode_usage, process_info->decode_usage + processes_info_local.decode_usage); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, gfx_engine_used)) { SET_GPUINFO_PROCESS(process_info, gfx_engine_used, process_info->gfx_engine_used + processes_info_local.gfx_engine_used); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, compute_engine_used)) { SET_GPUINFO_PROCESS(process_info, compute_engine_used, process_info->compute_engine_used + processes_info_local.compute_engine_used); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, enc_engine_used)) { SET_GPUINFO_PROCESS(process_info, enc_engine_used, process_info->enc_engine_used + processes_info_local.enc_engine_used); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, dec_engine_used)) { SET_GPUINFO_PROCESS(process_info, dec_engine_used, process_info->dec_engine_used + processes_info_local.dec_engine_used); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, gpu_cycles)) { SET_GPUINFO_PROCESS(process_info, gpu_cycles, process_info->gpu_cycles + processes_info_local.gpu_cycles); } if (GPUINFO_PROCESS_FIELD_VALID(&processes_info_local, sample_delta)) { SET_GPUINFO_PROCESS(process_info, sample_delta, process_info->sample_delta + processes_info_local.sample_delta); } } next: if (fdinfo_dir) closedir(fdinfo_dir); if (fd_dir_fd >= 0) close(fd_dir_fd); close(pid_dir_fd); } closedir(proc_dir); return; } nvtop-3.2.0/src/extract_processinfo_mac.c000066400000000000000000000022101477175131100205230ustar00rootroot00000000000000/* * Copyright (C) 2023 Robin Voetter * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/extract_processinfo_fdinfo.h" void processinfo_drop_callback(const struct gpu_info *info) { (void) info; } void processinfo_register_fdinfo_callback(processinfo_fdinfo_callback callback, struct gpu_info *info) { (void) callback; (void) info; } void processinfo_sweep_fdinfos(void) { } void processinfo_enable_disable_callback_for(const struct gpu_info *info, bool enable) { (void)info; (void)enable; } nvtop-3.2.0/src/get_process_info_linux.c000066400000000000000000000147761477175131100204120ustar00rootroot00000000000000/* * * Copyright (C) 2017-2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/get_process_info.h" #include #include #include #include #include #include #include #include #define pid_path_size 1024 static char pid_path[pid_path_size]; void get_username_from_pid(pid_t pid, char **buffer) { int written = snprintf(pid_path, pid_path_size, "/proc/%" PRIdMAX, (intmax_t)pid); if (written == pid_path_size) { *buffer = NULL; return; } struct stat folder_stat; int starval = stat(pid_path, &folder_stat); if (starval == -1) { *buffer = NULL; return; } uid_t user_id = folder_stat.st_uid; struct passwd *user_info = getpwuid(user_id); if (user_info == NULL) { *buffer = NULL; return; } size_t namelen = strlen(user_info->pw_name) + 1; *buffer = malloc(namelen * sizeof(**buffer)); strncpy(*buffer, user_info->pw_name, namelen); } #define command_line_increment 32 void get_command_from_pid(pid_t pid, char **buffer) { int written = snprintf(pid_path, pid_path_size, "/proc/%" PRIdMAX "/cmdline", (intmax_t)pid); if (written == pid_path_size) { *buffer = NULL; return; } FILE *pid_file = fopen(pid_path, "r"); if (!pid_file) { *buffer = NULL; return; } size_t size_buffer = command_line_increment; *buffer = malloc(size_buffer); char *current_buffer = *buffer; current_buffer[0] = '\0'; size_t total_read = 0; do { size_t num_read = fread(current_buffer, 1, command_line_increment, pid_file); total_read += num_read; if (num_read == command_line_increment) { size_buffer += command_line_increment; *buffer = realloc(*buffer, size_buffer); current_buffer = &((*buffer)[total_read]); } } while (!feof(pid_file) && !ferror(pid_file)); if (ferror(pid_file)) { fclose(pid_file); free(*buffer); *buffer = NULL; return; } fclose(pid_file); for (size_t i = 0; total_read && i < total_read - 1; ++i) { if ((*buffer)[i] == '\0') (*buffer)[i] = ' '; } } /* * * From man 5 proc of /proc//stat * For clock ticks per second use sysconf(_SC_CLK_TCK) * * enum process_state { * process_running = 'R', * process_sleeping = 'S', * process_sleeping_disk = 'D', * process_zombie = 'Z', * process_stopped = 'T', * process_stopped_tracing = 't', * process_dead = 'X', * process_dead2 = 'x', * process_wake_kill = 'K', * process_waking = 'W', * process_parked = 'P', * }; * * struct stat_parse { * int process_id; * char *executable_filename; * enum process_state process_state; * int parent_pid; * int process_group_id; * int process_session_id; * int process_tty; * int foreground_process_group_id; * unsigned kernel_flag; * unsigned long num_minor_fault; * unsigned long num_minor_fault_children; * unsigned long num_major_fault; * unsigned long num_major_fault_children; * unsigned long user_time; // in clock ticks * unsigned long kernel_time; // in clock ticks * long children_user_time; // in clock ticks * long children_kernel_time; // in clock ticks * long process_priority; * long process_niceness; * long process_num_threads; * long next_sigalarm_time; * unsigned long long process_start_time; * unsigned long process_virt_mem_usage; * long process_resident_mem_usage; * long process_resident_mem_limit; * unsigned long process_text_address_start; * unsigned long process_text_address_end; * unsigned long process_stack_address_start; * unsigned long process_stack_address_current; * unsigned long process_instruction_pointer; * unsigned long process_signals; // Obsolete * unsigned long process_signals_blocked; // Obsolete * unsigned long process_signals_ignored; // Obsolete * unsigned long process_signals_caught; // Obsolete * unsigned long wait_channel_id; * unsigned long process_num_page_swapped; * unsigned long process_and_child_num_page_swapped; * int process_exit_signal_to_parent; * int process_processor; * unsigned process_real_time_priority; * unsigned policy; * long long unsigned total_io_delays; * long unsigned process_guest_time; * long process_children_guest_time; * unsigned long process_data_address_start; * unsigned long process_data_address_end; * unsigned long process_brk_start; * unsigned long process_arguments_address_start; * unsigned long process_arguments_address_end; * unsigned long process_env_vars_address_start; * unsigned long process_env_vars_address_end; * int thread_exit_code; * }; * */ bool get_process_info(pid_t pid, struct process_cpu_usage *usage) { double clock_ticks_per_second = sysconf(_SC_CLK_TCK); size_t page_size = (size_t)sysconf(_SC_PAGESIZE); int written = snprintf(pid_path, pid_path_size, "/proc/%" PRIdMAX "/stat", (intmax_t)pid); if (written == pid_path_size) { return false; } FILE *stat_file = fopen(pid_path, "r"); if (!stat_file) { return false; } nvtop_get_current_time(&usage->timestamp); unsigned long total_user_time; // in clock_ticks unsigned long total_kernel_time; // in clock_ticks unsigned long virtual_memory; // In bytes long resident_memory; // In page number? int retval = fscanf(stat_file, "%*d %*[^)]) %*c %*d %*d %*d %*d %*d %*u %*u %*u %*u " "%*u %lu %lu %*d %*d %*d %*d %*d %*d %*u %lu %ld", &total_user_time, &total_kernel_time, &virtual_memory, &resident_memory); fclose(stat_file); if (retval != 4) return false; usage->total_user_time = total_user_time / clock_ticks_per_second; usage->total_kernel_time = total_kernel_time / clock_ticks_per_second; usage->virtual_memory = virtual_memory; usage->resident_memory = (size_t)resident_memory * page_size; return true; } nvtop-3.2.0/src/get_process_info_mac.c000066400000000000000000000076311477175131100200030ustar00rootroot00000000000000/* * * Copyright (C) 2023 Robin Voetter * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/get_process_info.h" #include #include #include #include #include #include void get_username_from_pid(pid_t pid, char **buffer) { struct proc_bsdshortinfo proc; const int st = proc_pidinfo(pid, PROC_PIDT_SHORTBSDINFO, 0, &proc, PROC_PIDT_SHORTBSDINFO_SIZE); if (st != PROC_PIDT_SHORTBSDINFO_SIZE) { goto error; } struct passwd *user_info = getpwuid(proc.pbsi_uid); if (user_info == NULL) { goto error; } const size_t namelen = strlen(user_info->pw_name) + 1; *buffer = malloc(namelen * sizeof(**buffer)); strncpy(*buffer, user_info->pw_name, namelen); return; error: *buffer = NULL; } void get_command_from_pid(pid_t pid, char **buffer) { // See https://chromium.googlesource.com/crashpad/crashpad/+/360e441c53ab4191a6fd2472cc57c3343a2f6944/util/posix/process_util_mac.cc size_t argmax; size_t argmax_estimate; char *procargs = NULL; int tries = 3; do { int mib[] = {CTL_KERN, KERN_PROCARGS2, pid}; if (sysctl(mib, 3, NULL, &argmax_estimate, NULL, 0) != 0) { goto error_free_procargs; } argmax = argmax_estimate + 1; procargs = realloc(procargs, argmax); if (sysctl(mib, 3, procargs, &argmax, NULL, 0) != 0) { goto error_free_procargs; } } while (argmax == argmax_estimate + 1 && --tries != 0); unsigned argc; memcpy(&argc, procargs, sizeof(argc)); size_t i = sizeof(argc); // Skip executable path. while (i < argmax && procargs[i] != 0) { ++i; } // Find the first string while (i < argmax && procargs[i] == 0) { ++i; } const size_t argv0 = i; // Count the total size of the args by finding the end. for (unsigned int arg = 0; arg < argc && i < argmax; ++arg) { while (i < argmax && procargs[i] != 0) { ++i; } ++i; // We are going to replace this null character with a space (or a null in the case of the last). } const size_t args_size = i - argv0; if (args_size == 0) { goto error_free_procargs; } char* args = malloc(args_size); *buffer = args; i = argv0; for (unsigned int arg = 0; arg < argc && i < argmax; ++arg) { while (i < argmax && procargs[i] != 0) { *args++ = procargs[i++]; } *args++ = ' '; ++i; } args[-1] = 0; free(procargs); return; error_free_procargs: free(procargs); *buffer = NULL; return; } bool get_process_info(pid_t pid, struct process_cpu_usage *usage) { struct proc_taskinfo proc; const int st = proc_pidinfo(pid, PROC_PIDTASKINFO, 0, &proc, PROC_PIDTASKINFO_SIZE); if (st != PROC_PIDTASKINFO_SIZE) { return false; } nvtop_get_current_time(&usage->timestamp); // TODO: Should we implement this workaround? // https://github.com/htop-dev/htop/blob/main/darwin/PlatformHelpers.c#L98 mach_timebase_info_data_t info; mach_timebase_info(&info); const double nanoseconds_per_tick = (double)info.numer / (double)info.denom; usage->total_user_time = (proc.pti_total_user * nanoseconds_per_tick) / 1000000000.0; usage->total_kernel_time = (proc.pti_total_system * nanoseconds_per_tick) / 1000000000.0; usage->virtual_memory = proc.pti_virtual_size; usage->resident_memory = proc.pti_resident_size; return true; } nvtop-3.2.0/src/info_messages_linux.c000066400000000000000000000054171477175131100176740ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "list.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/info_messages.h" #include #include #include #include static int get_linux_kernel_release(unsigned *major, unsigned *minor, unsigned *patch) { struct utsname uname_str; int retval = uname(&uname_str); if (retval) return retval; int nmatch = sscanf(uname_str.release, "%u.%u.%u", major, minor, patch); return nmatch != 3; } enum messages { AMD_GPU_514, INTEL_GPU_519, MSM_GPU, }; static const char *allMessages[] = { "Nvtop won't be able to show AMD GPU processes on your kernel version (requires Linux >= 5.14)", "Nvtop won't be able to show Intel GPU utilization and processes on your kernel version (requires Linux >= 5.19)", "This version of Nvtop does not yet support reporting all data for MSM GPUs, such as power, fan and temperature information", }; static const char *message_array[sizeof(allMessages) / sizeof(*allMessages)]; void get_info_messages(struct list_head *devices, unsigned *num_messages, const char ***messages) { *num_messages = 0; unsigned linux_major, linux_minor, linux_patch; if (get_linux_kernel_release(&linux_major, &linux_minor, &linux_patch)) return; *messages = message_array; bool hasIntel = false; bool hasMSM = false; bool hasAMD = false; struct gpu_info *gpuinfo; list_for_each_entry(gpuinfo, devices, list) { if (strcmp(gpuinfo->vendor->name, "Intel") == 0) { hasIntel = true; } if (strcmp(gpuinfo->vendor->name, "msm") == 0) { hasMSM = true; } if (strcmp(gpuinfo->vendor->name, "AMD") == 0) { hasAMD = true; } } if (hasAMD) { if (linux_major < 5 || (linux_major == 5 && linux_minor < 14)) { message_array[(*num_messages)++] = allMessages[AMD_GPU_514]; } } if (hasIntel) { if (linux_major < 5 || (linux_major == 5 && linux_minor < 19)) { message_array[(*num_messages)++] = allMessages[INTEL_GPU_519]; } } if (hasMSM) { message_array[(*num_messages)++] = allMessages[MSM_GPU]; } } nvtop-3.2.0/src/info_messages_mac.c000066400000000000000000000016571477175131100172770ustar00rootroot00000000000000/* * * Copyright (C) 2023 Robin Voetter * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "list.h" #include "nvtop/info_messages.h" void get_info_messages(struct list_head *devices, unsigned *num_messages, const char ***messages) { (void) devices; (void) messages; *num_messages = 0; } nvtop-3.2.0/src/ini.c000066400000000000000000000162461477175131100144140ustar00rootroot00000000000000/* inih -- simple .INI file parser SPDX-License-Identifier: BSD-3-Clause Copyright (C) 2009-2020, Ben Hoyt inih is released under the New BSD license (see LICENSE.txt). Go to the project home page for more info: https://github.com/benhoyt/inih */ #if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_WARNINGS) #define _CRT_SECURE_NO_WARNINGS #endif #include #include #include #include "ini.h" #if !INI_USE_STACK #if INI_CUSTOM_ALLOCATOR #include void *ini_malloc(size_t size); void ini_free(void *ptr); void *ini_realloc(void *ptr, size_t size); #else #include #define ini_malloc malloc #define ini_free free #define ini_realloc realloc #endif #endif #define MAX_SECTION 50 #define MAX_NAME 50 /* Used by ini_parse_string() to keep track of string parsing state. */ typedef struct { const char *ptr; size_t num_left; } ini_parse_string_ctx; /* Strip whitespace chars off end of given string, in place. Return s. */ static char *rstrip(char *s) { char *p = s + strlen(s); while (p > s && isspace((unsigned char)(*--p))) *p = '\0'; return s; } /* Return pointer to first non-whitespace char in given string. */ static char *lskip(const char *s) { while (*s && isspace((unsigned char)(*s))) s++; return (char *)s; } /* Return pointer to first char (of chars) or inline comment in given string, or pointer to NUL at end of string if neither found. Inline comment must be prefixed by a whitespace character to register as a comment. */ static char *find_chars_or_comment(const char *s, const char *chars) { #if INI_ALLOW_INLINE_COMMENTS int was_space = 0; while (*s && (!chars || !strchr(chars, *s)) && !(was_space && strchr(INI_INLINE_COMMENT_PREFIXES, *s))) { was_space = isspace((unsigned char)(*s)); s++; } #else while (*s && (!chars || !strchr(chars, *s))) { s++; } #endif return (char *)s; } /* Similar to strncpy, but ensures dest (size bytes) is NUL-terminated, and doesn't pad with NULs. */ static char *strncpy0(char *dest, const char *src, size_t size) { /* Could use strncpy internally, but it causes gcc warnings (see issue #91) */ size_t i; for (i = 0; i < size - 1 && src[i]; i++) dest[i] = src[i]; dest[i] = '\0'; return dest; } /* See documentation in header file. */ int ini_parse_stream(ini_reader reader, void *stream, ini_handler handler, void *user) { /* Uses a fair bit of stack (use heap instead if you need to) */ #if INI_USE_STACK char line[INI_MAX_LINE]; int max_line = INI_MAX_LINE; #else char *line; size_t max_line = INI_INITIAL_ALLOC; #endif #if INI_ALLOW_REALLOC && !INI_USE_STACK char *new_line; size_t offset; #endif char section[MAX_SECTION] = ""; char prev_name[MAX_NAME] = ""; char *start; char *end; char *name; char *value; int lineno = 0; int error = 0; #if !INI_USE_STACK line = (char *)ini_malloc(INI_INITIAL_ALLOC); if (!line) { return -2; } #endif #if INI_HANDLER_LINENO #define HANDLER(u, s, n, v) handler(u, s, n, v, lineno) #else #define HANDLER(u, s, n, v) handler(u, s, n, v) #endif /* Scan through stream line by line */ while (reader(line, (int)max_line, stream) != NULL) { #if INI_ALLOW_REALLOC && !INI_USE_STACK offset = strlen(line); while (offset == max_line - 1 && line[offset - 1] != '\n') { max_line *= 2; if (max_line > INI_MAX_LINE) max_line = INI_MAX_LINE; new_line = ini_realloc(line, max_line); if (!new_line) { ini_free(line); return -2; } line = new_line; if (reader(line + offset, (int)(max_line - offset), stream) == NULL) break; if (max_line >= INI_MAX_LINE) break; offset += strlen(line + offset); } #endif lineno++; start = line; #if INI_ALLOW_BOM if (lineno == 1 && (unsigned char)start[0] == 0xEF && (unsigned char)start[1] == 0xBB && (unsigned char)start[2] == 0xBF) { start += 3; } #endif start = lskip(rstrip(start)); if (strchr(INI_START_COMMENT_PREFIXES, *start)) { /* Start-of-line comment */ } #if INI_ALLOW_MULTILINE else if (*prev_name && *start && start > line) { /* Non-blank line with leading whitespace, treat as continuation of previous name's value (as per Python configparser). */ if (!HANDLER(user, section, prev_name, start) && !error) error = lineno; } #endif else if (*start == '[') { /* A "[section]" line */ end = find_chars_or_comment(start + 1, "]"); if (*end == ']') { *end = '\0'; strncpy0(section, start + 1, sizeof(section)); *prev_name = '\0'; #if INI_CALL_HANDLER_ON_NEW_SECTION if (!HANDLER(user, section, NULL, NULL) && !error) error = lineno; #endif } else if (!error) { /* No ']' found on section line */ error = lineno; } } else if (*start) { /* Not a comment, must be a name[=:]value pair */ end = find_chars_or_comment(start, "=:"); if (*end == '=' || *end == ':') { *end = '\0'; name = rstrip(start); value = end + 1; #if INI_ALLOW_INLINE_COMMENTS end = find_chars_or_comment(value, NULL); if (*end) *end = '\0'; #endif value = lskip(value); rstrip(value); /* Valid name[=:]value pair found, call handler */ strncpy0(prev_name, name, sizeof(prev_name)); if (!HANDLER(user, section, name, value) && !error) error = lineno; } else if (!error) { /* No '=' or ':' found on name[=:]value line */ #if INI_ALLOW_NO_VALUE *end = '\0'; name = rstrip(start); if (!HANDLER(user, section, name, NULL) && !error) error = lineno; #else error = lineno; #endif } } #if INI_STOP_ON_FIRST_ERROR if (error) break; #endif } #if !INI_USE_STACK ini_free(line); #endif return error; } /* See documentation in header file. */ int ini_parse_file(FILE *file, ini_handler handler, void *user) { return ini_parse_stream((ini_reader)fgets, file, handler, user); } /* See documentation in header file. */ int ini_parse(const char *filename, ini_handler handler, void *user) { FILE *file; int error; file = fopen(filename, "r"); if (!file) return -1; error = ini_parse_file(file, handler, user); fclose(file); return error; } /* An ini_reader function to read the next line from a string buffer. This is the fgets() equivalent used by ini_parse_string(). */ static char *ini_reader_string(char *str, int num, void *stream) { ini_parse_string_ctx *ctx = (ini_parse_string_ctx *)stream; const char *ctx_ptr = ctx->ptr; size_t ctx_num_left = ctx->num_left; char *strp = str; char c; if (ctx_num_left == 0 || num < 2) return NULL; while (num > 1 && ctx_num_left != 0) { c = *ctx_ptr++; ctx_num_left--; *strp++ = c; if (c == '\n') break; num--; } *strp = '\0'; ctx->ptr = ctx_ptr; ctx->num_left = ctx_num_left; return str; } /* See documentation in header file. */ int ini_parse_string(const char *string, ini_handler handler, void *user) { ini_parse_string_ctx ctx; ctx.ptr = string; ctx.num_left = strlen(string); return ini_parse_stream((ini_reader)ini_reader_string, &ctx, handler, user); } nvtop-3.2.0/src/interface.c000066400000000000000000002501541477175131100155730ustar00rootroot00000000000000/* * * Copyright (C) 2017-2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/interface.h" #include "nvtop/common.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/interface_common.h" #include "nvtop/interface_internal_common.h" #include "nvtop/interface_layout_selection.h" #include "nvtop/interface_options.h" #include "nvtop/interface_ring_buffer.h" #include "nvtop/interface_setup_win.h" #include "nvtop/plot.h" #include "nvtop/time.h" #include #include #include #include #include #include #include #include #include #include static unsigned int sizeof_device_field[device_field_count] = { [device_name] = 11, [device_fan_speed] = 11, [device_temperature] = 10, [device_power] = 15, [device_clock] = 11, [device_pcie] = 46, [device_shadercores] = 7, [device_l2features] = 11, [device_execengines] = 11, }; static unsigned int sizeof_process_field[process_field_count] = { [process_pid] = 7, [process_user] = 4, [process_gpu_id] = 3, [process_type] = 8, [process_gpu_rate] = 4, [process_enc_rate] = 4, [process_dec_rate] = 4, [process_memory] = 14, // 9 for mem 5 for % [process_cpu_usage] = 6, [process_cpu_mem_usage] = 9, [process_command] = 0, }; static void alloc_device_window(unsigned int start_row, unsigned int start_col, unsigned int totalcol, struct device_window *dwin) { const unsigned int spacer = 1; // Line 1 = Name | PCIe info dwin->name_win = newwin(1, sizeof_device_field[device_name], start_row, start_col); if (dwin->name_win == NULL) goto alloc_error; dwin->pcie_info = newwin(1, sizeof_device_field[device_pcie], start_row, start_col + spacer + sizeof_device_field[device_name]); if (dwin->pcie_info == NULL) goto alloc_error; // Line 2 = GPU clk | MEM clk | Temp | Fan | Power dwin->gpu_clock_info = newwin(1, sizeof_device_field[device_clock], start_row + 1, start_col); if (dwin->gpu_clock_info == NULL) goto alloc_error; dwin->mem_clock_info = newwin(1, sizeof_device_field[device_clock], start_row + 1, start_col + spacer + sizeof_device_field[device_clock]); if (dwin->mem_clock_info == NULL) goto alloc_error; dwin->temperature = newwin(1, sizeof_device_field[device_temperature], start_row + 1, start_col + spacer * 2 + sizeof_device_field[device_clock] * 2); if (dwin->temperature == NULL) goto alloc_error; dwin->fan_speed = newwin(1, sizeof_device_field[device_fan_speed], start_row + 1, start_col + spacer * 3 + sizeof_device_field[device_clock] * 2 + sizeof_device_field[device_temperature]); if (dwin->fan_speed == NULL) goto alloc_error; dwin->power_info = newwin(1, sizeof_device_field[device_power], start_row + 1, start_col + spacer * 4 + sizeof_device_field[device_clock] * 2 + sizeof_device_field[device_temperature] + sizeof_device_field[device_fan_speed]); if (dwin->power_info == NULL) goto alloc_error; // Line 3 = GPU used | MEM used | Encoder | Decoder int remaining_cols = totalcol - 3 * spacer; int size_gpu, size_mem, size_encode, size_decode; int quot, rem; quot = remaining_cols / 3; rem = remaining_cols % 3; size_gpu = size_mem = size_encode = quot; switch (rem) { case 2: if (size_encode % 2 == 1) size_encode += 1; else size_mem += 1; /* Falls through */ case 1: size_gpu += 1; break; } if (size_encode % 2 == 1) { size_mem += 1; size_encode -= 1; } if (size_encode / 2 < 14) { size_encode += 2; size_gpu -= 1; size_mem -= 1; } size_decode = size_encode / 2; if (size_encode % 2 == 1) size_encode += 1; size_encode /= 2; dwin->gpu_util_enc_dec = newwin(1, size_gpu, start_row + 2, start_col); if (dwin->gpu_util_enc_dec == NULL) goto alloc_error; dwin->mem_util_enc_dec = newwin(1, size_mem, start_row + 2, start_col + spacer + size_gpu); if (dwin->mem_util_enc_dec == NULL) goto alloc_error; dwin->encode_util = newwin(1, size_encode, start_row + 2, start_col + spacer * 2 + size_gpu + size_mem); if (dwin->encode_util == NULL) goto alloc_error; dwin->decode_util = newwin(1, size_decode, start_row + 2, start_col + spacer * 3 + size_gpu + size_mem + size_encode); if (dwin->decode_util == NULL) goto alloc_error; dwin->encdec_util = newwin(1, size_encode * 2, start_row + 2, start_col + spacer * 2 + size_gpu + size_mem); if (dwin->encdec_util == NULL) goto alloc_error; // For auto-hide encode / decode window dwin->gpu_util_no_enc_or_dec = newwin(1, size_gpu + size_encode / 2 + 1, start_row + 2, start_col); if (dwin->gpu_util_no_enc_or_dec == NULL) goto alloc_error; dwin->mem_util_no_enc_or_dec = newwin(1, size_mem + size_encode / 2, start_row + 2, start_col + spacer + size_gpu + size_encode / 2 + 1); if (dwin->mem_util_no_enc_or_dec == NULL) goto alloc_error; dwin->gpu_util_no_enc_and_dec = newwin(1, size_gpu + size_encode + 1, start_row + 2, start_col); if (dwin->gpu_util_no_enc_and_dec == NULL) goto alloc_error; dwin->mem_util_no_enc_and_dec = newwin(1, size_mem + size_encode + 1, start_row + 2, start_col + spacer + size_gpu + size_encode + 1); if (dwin->mem_util_no_enc_and_dec == NULL) goto alloc_error; dwin->enc_was_visible = false; dwin->dec_was_visible = false; // Line 4 = Number of shading cores | L2 Features dwin->shader_cores = newwin(1, sizeof_device_field[device_shadercores], start_row + 3, start_col); if (dwin->shader_cores == NULL) goto alloc_error; dwin->l2_cache_size = newwin(1, sizeof_device_field[device_l2features], start_row + 3, start_col + spacer + sizeof_device_field[device_shadercores]); if (dwin->l2_cache_size == NULL) goto alloc_error; dwin->exec_engines = newwin(1, sizeof_device_field[device_execengines], start_row + 3, start_col + spacer * 2 + sizeof_device_field[device_shadercores] + sizeof_device_field[device_l2features]); if (dwin->exec_engines == NULL) goto alloc_error; return; alloc_error: endwin(); fprintf(stderr, "Error: Not enough columns to draw device information\n"); exit(EXIT_FAILURE); } static void free_device_windows(struct device_window *dwin) { delwin(dwin->name_win); delwin(dwin->gpu_util_enc_dec); delwin(dwin->mem_util_enc_dec); delwin(dwin->gpu_util_no_enc_or_dec); delwin(dwin->mem_util_no_enc_or_dec); delwin(dwin->gpu_util_no_enc_and_dec); delwin(dwin->mem_util_no_enc_and_dec); delwin(dwin->encode_util); delwin(dwin->decode_util); delwin(dwin->encdec_util); delwin(dwin->gpu_clock_info); delwin(dwin->mem_clock_info); delwin(dwin->power_info); delwin(dwin->temperature); delwin(dwin->fan_speed); delwin(dwin->pcie_info); } static void alloc_process_with_option(struct nvtop_interface *interface, unsigned posX, unsigned posY, unsigned sizeX, unsigned sizeY) { if (sizeY > 0) { interface->process.process_win = newwin(sizeY, sizeX, posY, posX); interface->process.process_with_option_win = newwin(sizeY, sizeX - option_window_size, posY, posX + option_window_size); } else { interface->process.process_win = NULL; interface->process.process_with_option_win = NULL; } interface->process.selected_row = 0; interface->process.selected_pid = -1; interface->process.offset_column = 0; interface->process.offset = 0; interface->process.option_window.option_win = newwin(sizeY, option_window_size, posY, posX); interface->process.option_window.state = nvtop_option_state_hidden; interface->process.option_window.previous_state = nvtop_option_state_sort_by; interface->process.option_window.offset = 0; interface->process.option_window.selected_row = 0; } static void initialize_gpu_mem_plot(struct plot_window *plot, struct window_position *position, nvtop_interface_option *options) { unsigned rows = position->sizeY; unsigned cols = position->sizeX; cols -= 5; rows -= 2; plot->plot_window = newwin(rows, cols, position->posY + 1, position->posX + 4); draw_rectangle(plot->win, 3, 0, cols + 2, rows + 2); mvwprintw(plot->win, 1 + rows * 3 / 4, 0, " 25"); mvwprintw(plot->win, 1 + rows / 4, 0, " 75"); mvwprintw(plot->win, 1 + rows / 2, 0, " 50"); mvwprintw(plot->win, 1, 0, "100"); mvwprintw(plot->win, rows, 0, " 0"); plot->data = calloc(cols, sizeof(*plot->data)); plot->num_data = cols; unsigned column_divisor = 0; for (unsigned i = 0; i < plot->num_devices_to_plot; ++i) { unsigned dev_id = plot->devices_ids[i]; plot_info_to_draw to_draw = options->gpu_specific_opts[dev_id].to_draw; column_divisor += plot_count_draw_info(to_draw); } assert(column_divisor > 0); char elapsedSeconds[5]; char *err = "err"; char *zeroSec = "0s"; if (options->plot_left_to_right) { char *toPrint = zeroSec; mvwprintw(plot->win, position->sizeY - 1, 4, "%s", toPrint); int retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols / 4 / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols / 4 - strlen(toPrint) / 2, "%s", toPrint); retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols / 2 / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols / 2 - strlen(toPrint) / 2, "%s", toPrint); retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols * 3 / 4 / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols * 3 / 4 - strlen(toPrint) / 2, "%s", toPrint); retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols - strlen(toPrint), "%s", toPrint); } else { char *toPrint; int retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4, "%s", toPrint); retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols * 3 / 4 / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols / 4 - strlen(toPrint) / 2, "%s", toPrint); retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols / 2 / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols / 2 - strlen(toPrint) / 2, "%s", toPrint); retval = snprintf(elapsedSeconds, 5, "%ds", options->update_interval * cols / 4 / column_divisor / 1000); if (retval > 4) toPrint = err; else toPrint = elapsedSeconds; mvwprintw(plot->win, position->sizeY - 1, 4 + cols * 3 / 4 - strlen(toPrint) / 2, "%s", toPrint); toPrint = zeroSec; mvwprintw(plot->win, position->sizeY - 1, 4 + cols - strlen(toPrint), "%s", toPrint); } wnoutrefresh(plot->win); } static void alloc_plot_window(unsigned devices_count, struct window_position *plot_positions, unsigned map_device_to_plot[devices_count], struct nvtop_interface *interface) { if (!interface->num_plots) { interface->plots = NULL; return; } interface->plots = malloc(interface->num_plots * sizeof(*interface->plots)); for (size_t i = 0; i < interface->num_plots; ++i) { interface->plots[i].num_devices_to_plot = 0; for (unsigned dev_id = 0; dev_id < devices_count; ++dev_id) { if (map_device_to_plot[dev_id] == i) { interface->plots[i].devices_ids[interface->plots[i].num_devices_to_plot] = dev_id; interface->plots[i].num_devices_to_plot++; } } interface->plots[i].win = newwin(plot_positions[i].sizeY, plot_positions[i].sizeX, plot_positions[i].posY, plot_positions[i].posX); initialize_gpu_mem_plot(&interface->plots[i], &plot_positions[i], &interface->options); } } static unsigned device_length(void) { return max(sizeof_device_field[device_name] + sizeof_device_field[device_pcie] + 1, 2 * sizeof_device_field[device_clock] + sizeof_device_field[device_temperature] + sizeof_device_field[device_fan_speed] + sizeof_device_field[device_power] + 4); } static pid_t nvtop_pid; static void initialize_all_windows(struct nvtop_interface *dwin) { int rows, cols; getmaxyx(stdscr, rows, cols); unsigned int devices_count = dwin->monitored_dev_count; struct window_position device_positions[devices_count]; unsigned map_device_to_plot[devices_count]; struct window_position process_position; struct window_position plot_positions[MAX_CHARTS]; struct window_position setup_position; compute_sizes_from_layout(devices_count, dwin->options.has_gpu_info_bar ? 4 : 3, device_length(), rows - 1, cols, dwin->options.gpu_specific_opts, dwin->options.process_fields_displayed, device_positions, &dwin->num_plots, plot_positions, map_device_to_plot, &process_position, &setup_position, dwin->options.hide_processes_list); alloc_plot_window(devices_count, plot_positions, map_device_to_plot, dwin); for (unsigned int i = 0; i < devices_count; ++i) { alloc_device_window(device_positions[i].posY, device_positions[i].posX, device_positions[i].sizeX, &dwin->devices_win[i]); } alloc_process_with_option(dwin, process_position.posX, process_position.posY, process_position.sizeX, process_position.sizeY); dwin->shortcut_window = newwin(1, cols, rows - 1, 0); alloc_setup_window(&setup_position, &dwin->setup_win); nvtop_pid = getpid(); } static void delete_all_windows(struct nvtop_interface *dwin) { for (unsigned int i = 0; i < dwin->monitored_dev_count; ++i) { free_device_windows(&dwin->devices_win[i]); } delwin(dwin->process.process_win); delwin(dwin->process.process_with_option_win); dwin->process.process_win = NULL; dwin->process.process_with_option_win = NULL; delwin(dwin->shortcut_window); delwin(dwin->process.option_window.option_win); for (size_t i = 0; i < dwin->num_plots; ++i) { delwin(dwin->plots[i].win); free(dwin->plots[i].data); } free_setup_window(&dwin->setup_win); free(dwin->plots); } static void initialize_colors(void) { start_color(); short background_color; #ifdef NCURSES_VERSION if (use_default_colors() == OK) background_color = -1; else background_color = COLOR_BLACK; #else background_color = COLOR_BLACK; #endif init_pair(cyan_color, COLOR_CYAN, background_color); init_pair(red_color, COLOR_RED, background_color); init_pair(green_color, COLOR_GREEN, background_color); init_pair(yellow_color, COLOR_YELLOW, background_color); init_pair(blue_color, COLOR_BLUE, background_color); init_pair(magenta_color, COLOR_MAGENTA, background_color); } struct nvtop_interface *initialize_curses(unsigned total_devices, unsigned devices_count, unsigned largest_device_name, nvtop_interface_option options) { struct nvtop_interface *interface = calloc(1, sizeof(*interface)); interface->options = options; interface->devices_win = calloc(devices_count, sizeof(*interface->devices_win)); interface->total_dev_count = total_devices; interface->monitored_dev_count = devices_count; sizeof_device_field[device_name] = largest_device_name + 11; initscr(); refresh(); if (interface->options.use_color && has_colors() == TRUE) { initialize_colors(); } cbreak(); noecho(); keypad(stdscr, TRUE); curs_set(0); // Hide decode and encode if not active for some time if (interface->options.encode_decode_hiding_timer > 0.) { nvtop_time time_now, some_time_in_past; some_time_in_past = nvtop_hmns_to_time(0, (unsigned int)(interface->options.encode_decode_hiding_timer / 60.) + 1, 0); nvtop_get_current_time(&time_now); some_time_in_past = nvtop_substract_time(time_now, some_time_in_past); for (size_t i = 0; i < devices_count; ++i) { interface->devices_win[i].last_encode_seen = some_time_in_past; interface->devices_win[i].last_decode_seen = some_time_in_past; } } interface_alloc_ring_buffer(devices_count, 4, 10 * 60 * 1000, &interface->saved_data_ring); initialize_all_windows(interface); return interface; } void clean_ncurses(struct nvtop_interface *interface) { endwin(); delete_all_windows(interface); free(interface->options.gpu_specific_opts); free(interface->options.config_file_location); free(interface->devices_win); interface_free_ring_buffer(&interface->saved_data_ring); free(interface); } static void draw_percentage_meter(WINDOW *win, const char *prelude, unsigned int new_percentage, const char inside_braces_right[1024]) { int rows, cols; getmaxyx(win, rows, cols); (void)rows; size_t size_prelude = strlen(prelude); wcolor_set(win, cyan_color, NULL); mvwprintw(win, 0, 0, "%s", prelude); wstandend(win); waddch(win, '['); int curx, cury; curx = getcurx(win); cury = getcury(win); int between_sbraces = cols - size_prelude - 2; float usage = round((float)between_sbraces * new_percentage / 100.f); int represent_usage = (int)usage; whline(win, '|', (int)represent_usage); mvwhline(win, cury, curx + represent_usage, ' ', between_sbraces - represent_usage); mvwaddch(win, cury, curx + between_sbraces, ']'); unsigned int right_side_braces_space_required = strlen(inside_braces_right); wmove(win, cury, curx + between_sbraces - right_side_braces_space_required); wprintw(win, "%s", inside_braces_right); mvwchgat(win, cury, curx, represent_usage, 0, green_color, NULL); wnoutrefresh(win); } static const char *memory_prefix[] = {" B", "Ki", "Mi", "Gi", "Ti", "Pi"}; static void draw_temp_color(WINDOW *win, unsigned int temp, unsigned int temp_slowdown, bool celsius) { unsigned int temp_convert; if (celsius) temp_convert = temp; else temp_convert = (unsigned)(32 + nearbyint(temp * 1.8)); wcolor_set(win, cyan_color, NULL); mvwprintw(win, 0, 0, "TEMP"); if (temp >= temp_slowdown - 5) { if (temp >= temp_slowdown) wcolor_set(win, red_color, NULL); else wcolor_set(win, yellow_color, NULL); } else { wcolor_set(win, green_color, NULL); } wprintw(win, " %3u", temp_convert); wstandend(win); waddch(win, ACS_DEGREE); if (celsius) waddch(win, 'C'); else waddch(win, 'F'); wnoutrefresh(win); } static void print_pcie_at_scale(WINDOW *win, unsigned int value) { int prefix_off; double val_d = value; for (prefix_off = 1; prefix_off < 5 && val_d >= 1000.; ++prefix_off) { val_d = val_d / 1024.; } if (val_d >= 100.) { wprintw(win, "%.1f", val_d); } else { if (val_d >= 10.) { wprintw(win, "%.2f", val_d); } else { wprintw(win, "%.3f", val_d); } } wprintw(win, " %sB/s", memory_prefix[prefix_off]); } static inline void werase_and_wnoutrefresh(WINDOW *w) { werase(w); wnoutrefresh(w); } static bool cleaned_enc_window(struct device_window *dev, double encode_decode_hiding_timer, nvtop_time tnow) { if (encode_decode_hiding_timer > 0. && nvtop_difftime(dev->last_encode_seen, tnow) > encode_decode_hiding_timer) { if (dev->enc_was_visible) { dev->enc_was_visible = false; if (dev->dec_was_visible) { werase_and_wnoutrefresh(dev->gpu_util_enc_dec); werase_and_wnoutrefresh(dev->mem_util_enc_dec); } else { werase_and_wnoutrefresh(dev->gpu_util_no_enc_or_dec); werase_and_wnoutrefresh(dev->mem_util_no_enc_or_dec); } } return true; } else { return false; } } static bool cleaned_dec_window(struct device_window *dev, double encode_decode_hiding_timer, nvtop_time tnow) { if (encode_decode_hiding_timer > 0. && nvtop_difftime(dev->last_decode_seen, tnow) > encode_decode_hiding_timer) { if (dev->dec_was_visible) { dev->dec_was_visible = false; if (dev->enc_was_visible) { werase_and_wnoutrefresh(dev->gpu_util_enc_dec); werase_and_wnoutrefresh(dev->mem_util_enc_dec); } else { werase_and_wnoutrefresh(dev->gpu_util_no_enc_or_dec); werase_and_wnoutrefresh(dev->mem_util_no_enc_or_dec); } } return true; } else { return false; } } static void encode_decode_show_select(struct device_window *dev, bool encode_valid, bool decode_valid, unsigned encode_rate, unsigned decode_rate, double encode_decode_hiding_timer, bool encode_decode_shared, bool *display_encode, bool *display_decode) { nvtop_time tnow; nvtop_get_current_time(&tnow); if (encode_valid && encode_rate > 0) { *display_encode = true; dev->last_encode_seen = tnow; if (!dev->enc_was_visible) { dev->enc_was_visible = true; if (!dev->dec_was_visible) { werase_and_wnoutrefresh(dev->gpu_util_no_enc_and_dec); werase_and_wnoutrefresh(dev->mem_util_no_enc_and_dec); } else { werase_and_wnoutrefresh(dev->gpu_util_no_enc_or_dec); werase_and_wnoutrefresh(dev->mem_util_no_enc_or_dec); } } } else { *display_encode = !cleaned_enc_window(dev, encode_decode_hiding_timer, tnow); } // If shared, rely on decode *display_encode = *display_encode && !encode_decode_shared; if (decode_valid && decode_rate > 0) { *display_decode = true; dev->last_decode_seen = tnow; if (!dev->dec_was_visible) { dev->dec_was_visible = true; if (!dev->enc_was_visible) { werase_and_wnoutrefresh(dev->gpu_util_no_enc_and_dec); werase_and_wnoutrefresh(dev->mem_util_no_enc_and_dec); } else { werase_and_wnoutrefresh(dev->gpu_util_no_enc_or_dec); werase_and_wnoutrefresh(dev->mem_util_no_enc_or_dec); } } } else { *display_decode = !cleaned_dec_window(dev, encode_decode_hiding_timer, tnow); } } static void draw_devices(struct list_head *devices, struct nvtop_interface *interface) { struct gpu_info *device; unsigned dev_id = 0; list_for_each_entry(device, devices, list) { struct device_window *dev = &interface->devices_win[dev_id]; wcolor_set(dev->name_win, cyan_color, NULL); mvwprintw(dev->name_win, 0, 0, "Device %-2u", dev_id); wstandend(dev->name_win); if (GPUINFO_STATIC_FIELD_VALID(&device->static_info, device_name)) { wprintw(dev->name_win, "[%s]", device->static_info.device_name); wnoutrefresh(dev->name_win); } else { wprintw(dev->name_win, "[N/A]"); wnoutrefresh(dev->name_win); } bool display_encode = false; bool display_decode = false; encode_decode_show_select(dev, GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, encoder_rate), GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, decoder_rate), device->dynamic_info.encoder_rate, device->dynamic_info.decoder_rate, interface->options.encode_decode_hiding_timer, device->static_info.encode_decode_shared, &display_encode, &display_decode); WINDOW *gpu_util_win; WINDOW *mem_util_win; WINDOW *encode_win = dev->encode_util; WINDOW *decode_win = dev->decode_util; if ((display_encode && display_decode) || (display_decode && device->static_info.encode_decode_shared)) { gpu_util_win = dev->gpu_util_enc_dec; mem_util_win = dev->mem_util_enc_dec; if (device->static_info.encode_decode_shared) decode_win = dev->encdec_util; } else { if (display_encode || display_decode) { // If encode only, place at decode location encode_win = dev->decode_util; gpu_util_win = dev->gpu_util_no_enc_or_dec; mem_util_win = dev->mem_util_no_enc_or_dec; } else { gpu_util_win = dev->gpu_util_no_enc_and_dec; mem_util_win = dev->mem_util_no_enc_and_dec; } } char buff[1024]; if (display_encode) { unsigned rate = GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, encoder_rate) ? device->dynamic_info.encoder_rate : 0; snprintf(buff, 1024, "%u%%", rate); draw_percentage_meter(encode_win, "ENC", rate, buff); } if (display_decode) { unsigned rate = GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, decoder_rate) ? device->dynamic_info.decoder_rate : 0; snprintf(buff, 1024, "%u%%", rate); if (device->static_info.encode_decode_shared) draw_percentage_meter(decode_win, "ENC/DEC", rate, buff); else draw_percentage_meter(decode_win, "DEC", rate, buff); } if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_util_rate)) { snprintf(buff, 1024, "%u%%", device->dynamic_info.gpu_util_rate); draw_percentage_meter(gpu_util_win, "GPU", device->dynamic_info.gpu_util_rate, buff); } else { snprintf(buff, 1024, "N/A"); draw_percentage_meter(gpu_util_win, "GPU", 0, buff); } if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, total_memory) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, used_memory)) { double total_mem = device->dynamic_info.total_memory; double used_mem = device->dynamic_info.used_memory; double total_prefixed = total_mem, used_prefixed = used_mem; size_t prefix_off; for (prefix_off = 0; prefix_off < 5 && total_prefixed >= 1000.; ++prefix_off) { total_prefixed /= 1024.; used_prefixed /= 1024.; } snprintf(buff, 1024, "%.3f%s/%.3f%s", used_prefixed, memory_prefix[prefix_off], total_prefixed, memory_prefix[prefix_off]); draw_percentage_meter(mem_util_win, "MEM", (unsigned int)(100. * used_mem / total_mem), buff); } else if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, total_memory)) { double total_mem = device->dynamic_info.total_memory; double total_prefixed = total_mem; size_t prefix_off; for (prefix_off = 0; prefix_off < 5 && total_prefixed >= 1000.; ++prefix_off) { total_prefixed /= 1024.; } snprintf(buff, 1024, "N/A/%.3f%s", total_prefixed, memory_prefix[prefix_off]); draw_percentage_meter(mem_util_win, "MEM", 0, buff); } else { snprintf(buff, 1024, "N/A"); draw_percentage_meter(mem_util_win, "MEM", 0, buff); } if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_temp)) { if (!GPUINFO_STATIC_FIELD_VALID(&device->static_info, temperature_slowdown_threshold)) device->static_info.temperature_slowdown_threshold = 0; draw_temp_color(dev->temperature, device->dynamic_info.gpu_temp, device->static_info.temperature_slowdown_threshold, !interface->options.temperature_in_fahrenheit); } else { mvwprintw(dev->temperature, 0, 0, "TEMP N/A"); waddch(dev->temperature, ACS_DEGREE); if (interface->options.temperature_in_fahrenheit) waddch(dev->temperature, 'F'); else waddch(dev->temperature, 'C'); mvwchgat(dev->temperature, 0, 0, 4, 0, cyan_color, NULL); wnoutrefresh(dev->temperature); } // FAN if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, fan_speed)) { mvwprintw(dev->fan_speed, 0, 0, " FAN %3u%% ", device->dynamic_info.fan_speed > 100 ? 100 : device->dynamic_info.fan_speed); mvwchgat(dev->fan_speed, 0, 1, 3, 0, cyan_color, NULL); } else if (device->static_info.integrated_graphics) { mvwprintw(dev->fan_speed, 0, 0, " CPU-FAN "); mvwchgat(dev->fan_speed, 0, 2, 7, 0, cyan_color, NULL); } else if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, fan_rpm)) { mvwprintw(dev->fan_speed, 0, 0, "FAN %4uRPM", device->dynamic_info.fan_rpm > 9999 ? 9999 : device->dynamic_info.fan_rpm); mvwchgat(dev->fan_speed, 0, 0, 3, 0, cyan_color, NULL); } else { mvwprintw(dev->fan_speed, 0, 0, " FAN N/A "); mvwchgat(dev->fan_speed, 0, 2, 3, 0, cyan_color, NULL); } wnoutrefresh(dev->fan_speed); // GPU CLOCK werase(dev->gpu_clock_info); if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_clock_speed)) mvwprintw(dev->gpu_clock_info, 0, 0, "GPU %uMHz", device->dynamic_info.gpu_clock_speed); else mvwprintw(dev->gpu_clock_info, 0, 0, "GPU N/A MHz"); mvwchgat(dev->gpu_clock_info, 0, 0, 3, 0, cyan_color, NULL); wnoutrefresh(dev->gpu_clock_info); // MEM CLOCK werase(dev->mem_clock_info); if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, mem_clock_speed)) mvwprintw(dev->mem_clock_info, 0, 0, "MEM %uMHz", device->dynamic_info.mem_clock_speed); else mvwprintw(dev->mem_clock_info, 0, 0, "MEM N/A MHz"); mvwchgat(dev->mem_clock_info, 0, 0, 3, 0, cyan_color, NULL); wnoutrefresh(dev->mem_clock_info); // POWER werase(dev->power_info); if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw_max)) mvwprintw(dev->power_info, 0, 0, "POW %3u / %3u W", device->dynamic_info.power_draw / 1000, device->dynamic_info.power_draw_max / 1000); else if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw) && !GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw_max)) mvwprintw(dev->power_info, 0, 0, "POW %3u W", device->dynamic_info.power_draw / 1000); else if (!GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw_max)) mvwprintw(dev->power_info, 0, 0, "POW N/A / %3u W", device->dynamic_info.power_draw_max / 1000); else mvwprintw(dev->power_info, 0, 0, "POW N/A W"); mvwchgat(dev->power_info, 0, 0, 3, 0, cyan_color, NULL); wnoutrefresh(dev->power_info); // PICe throughput werase(dev->pcie_info); if (device->static_info.integrated_graphics) { wcolor_set(dev->pcie_info, cyan_color, NULL); mvwprintw(dev->pcie_info, 0, 0, "Integrated GPU"); } else { wcolor_set(dev->pcie_info, cyan_color, NULL); mvwprintw(dev->pcie_info, 0, 0, "PCIe "); wcolor_set(dev->pcie_info, magenta_color, NULL); wprintw(dev->pcie_info, "GEN "); wstandend(dev->pcie_info); if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, pcie_link_gen) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, pcie_link_width)) wprintw(dev->pcie_info, "%u@%2ux", device->dynamic_info.pcie_link_gen, device->dynamic_info.pcie_link_width); else wprintw(dev->pcie_info, "N/A"); } wcolor_set(dev->pcie_info, magenta_color, NULL); wprintw(dev->pcie_info, " RX: "); wstandend(dev->pcie_info); if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, pcie_rx)) print_pcie_at_scale(dev->pcie_info, device->dynamic_info.pcie_rx); else wprintw(dev->pcie_info, "N/A"); wcolor_set(dev->pcie_info, magenta_color, NULL); wprintw(dev->pcie_info, " TX: "); wstandend(dev->pcie_info); if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, pcie_tx)) print_pcie_at_scale(dev->pcie_info, device->dynamic_info.pcie_tx); else wprintw(dev->pcie_info, "N/A"); wnoutrefresh(dev->pcie_info); if (interface->options.has_gpu_info_bar) { // Number of shader cores werase(dev->shader_cores); wcolor_set(dev->shader_cores, cyan_color, NULL); mvwprintw(dev->shader_cores, 0, 0, "NSHC "); wstandend(dev->shader_cores); if (GPUINFO_STATIC_FIELD_VALID(&device->static_info, n_shared_cores)) wprintw(dev->shader_cores, "%u", device->static_info.n_shared_cores); else wprintw(dev->shader_cores, "N/A"); wnoutrefresh(dev->shader_cores); // L2 cache information werase(dev->l2_cache_size); wcolor_set(dev->l2_cache_size, cyan_color, NULL); mvwprintw(dev->l2_cache_size, 0, 0, "L2CF "); wstandend(dev->l2_cache_size); if (GPUINFO_STATIC_FIELD_VALID(&device->static_info, l2cache_size)) wprintw(dev->l2_cache_size, "%u", device->static_info.l2cache_size); else wprintw(dev->l2_cache_size, "N/A"); wnoutrefresh(dev->l2_cache_size); // Number of execution engines werase(dev->exec_engines); wcolor_set(dev->exec_engines, cyan_color, NULL); mvwprintw(dev->exec_engines, 0, 0, "NEXC "); wstandend(dev->exec_engines); if (GPUINFO_STATIC_FIELD_VALID(&device->static_info, n_exec_engines)) wprintw(dev->exec_engines, "%u", device->static_info.n_exec_engines); else wprintw(dev->exec_engines, "N/A"); wnoutrefresh(dev->exec_engines); } dev_id++; } } typedef struct { unsigned processes_count; struct gpuid_and_process { unsigned gpu_id; struct gpu_process *process; } *processes; } all_processes; static all_processes all_processes_array(struct list_head *devices) { unsigned total_processes_count = 0; struct gpu_info *device; unsigned dev_id = 0; list_for_each_entry(device, devices, list) { total_processes_count += device->processes_count; } all_processes merged_devices_processes; merged_devices_processes.processes_count = total_processes_count; if (total_processes_count) { merged_devices_processes.processes = malloc(total_processes_count * sizeof(*merged_devices_processes.processes)); if (!merged_devices_processes.processes) { perror("Cannot allocate memory: "); exit(EXIT_FAILURE); } } else { merged_devices_processes.processes = NULL; } size_t offset = 0; list_for_each_entry(device, devices, list) { for (unsigned int j = 0; j < device->processes_count; ++j) { merged_devices_processes.processes[offset].gpu_id = dev_id; merged_devices_processes.processes[offset++].process = &device->processes[j]; } dev_id++; } return merged_devices_processes; } static int compare_pid_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; return p1->process->pid >= p2->process->pid ? -1 : 1; } static int compare_pid_asc(const void *pp1, const void *pp2) { return compare_pid_desc(pp2, pp1); } static int compare_username_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, user_name) && GPUINFO_PROCESS_FIELD_VALID(p2->process, user_name)) return -strcmp(p1->process->user_name, p2->process->user_name); else return 0; } static int compare_username_asc(const void *pp1, const void *pp2) { return compare_username_desc(pp2, pp1); } static int compare_process_name_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, cmdline) && GPUINFO_PROCESS_FIELD_VALID(p2->process, cmdline)) return -strcmp(p1->process->cmdline, p2->process->cmdline); else return 0; } static int compare_process_name_asc(const void *pp1, const void *pp2) { return compare_process_name_desc(pp2, pp1); } static int compare_mem_usage_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, gpu_memory_usage) && GPUINFO_PROCESS_FIELD_VALID(p2->process, gpu_memory_usage)) return p1->process->gpu_memory_usage >= p2->process->gpu_memory_usage ? -1 : 1; else return 0; } static int compare_mem_usage_asc(const void *pp1, const void *pp2) { return compare_mem_usage_desc(pp2, pp1); } static int compare_cpu_usage_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, cpu_usage) && GPUINFO_PROCESS_FIELD_VALID(p2->process, cpu_usage)) return p1->process->cpu_usage >= p2->process->cpu_usage ? -1 : 1; else return 0; } static int compare_cpu_usage_asc(const void *pp1, const void *pp2) { return compare_cpu_usage_desc(pp2, pp1); } static int compare_cpu_mem_usage_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, cpu_memory_res) && GPUINFO_PROCESS_FIELD_VALID(p2->process, cpu_memory_res)) return p1->process->cpu_memory_res >= p2->process->cpu_memory_res ? -1 : 1; else return 0; } static int compare_cpu_mem_usage_asc(const void *pp1, const void *pp2) { return compare_cpu_mem_usage_desc(pp2, pp1); } static int compare_gpu_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; return p1->gpu_id >= p2->gpu_id ? -1 : 1; } static int compare_gpu_asc(const void *pp1, const void *pp2) { return -compare_gpu_desc(pp1, pp2); } static int compare_process_type_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; return (p1->process->type == gpu_process_graphical) != (p2->process->type == gpu_process_graphical); } static int compare_process_type_asc(const void *pp1, const void *pp2) { return -compare_process_name_desc(pp1, pp2); } static int compare_process_gpu_rate_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, gpu_usage) && GPUINFO_PROCESS_FIELD_VALID(p2->process, gpu_usage)) { return p1->process->gpu_usage > p2->process->gpu_usage ? -1 : 1; } else { if (GPUINFO_PROCESS_FIELD_VALID(p1->process, gpu_usage)) { return p1->process->gpu_usage > 0 ? -1 : 0; } else if (GPUINFO_PROCESS_FIELD_VALID(p2->process, gpu_usage)) { return p2->process->gpu_usage > 0 ? 1 : 0; } else { return 0; } } } static int compare_process_gpu_rate_asc(const void *pp1, const void *pp2) { return -compare_process_gpu_rate_desc(pp1, pp2); } static int compare_process_enc_rate_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, encode_usage) && GPUINFO_PROCESS_FIELD_VALID(p2->process, encode_usage)) { return p1->process->encode_usage >= p2->process->encode_usage ? -1 : 1; } else { if (GPUINFO_PROCESS_FIELD_VALID(p1->process, encode_usage)) { return p1->process->encode_usage > 0 ? -1 : 0; } else if (GPUINFO_PROCESS_FIELD_VALID(p2->process, encode_usage)) { return p2->process->encode_usage > 0 ? 1 : 0; } else { return 0; } } } static int compare_process_enc_rate_asc(const void *pp1, const void *pp2) { return -compare_process_enc_rate_desc(pp1, pp2); } static int compare_process_dec_rate_desc(const void *pp1, const void *pp2) { const struct gpuid_and_process *p1 = (const struct gpuid_and_process *)pp1; const struct gpuid_and_process *p2 = (const struct gpuid_and_process *)pp2; if (GPUINFO_PROCESS_FIELD_VALID(p1->process, decode_usage) && GPUINFO_PROCESS_FIELD_VALID(p2->process, decode_usage)) { return p1->process->decode_usage >= p2->process->decode_usage ? -1 : 1; } else { if (GPUINFO_PROCESS_FIELD_VALID(p1->process, decode_usage)) { return p1->process->decode_usage > 0 ? -1 : 0; } else if (GPUINFO_PROCESS_FIELD_VALID(p2->process, decode_usage)) { return p2->process->decode_usage > 0 ? 1 : 0; } else { return 0; } } } static int compare_process_dec_rate_asc(const void *pp1, const void *pp2) { return -compare_process_dec_rate_desc(pp1, pp2); } static void sort_process(all_processes all_procs, enum process_field criterion, bool asc_sort) { if (all_procs.processes_count == 0 || !all_procs.processes) return; int (*sort_fun)(const void *, const void *); switch (criterion) { case process_pid: if (asc_sort) sort_fun = compare_pid_asc; else sort_fun = compare_pid_desc; break; case process_user: if (asc_sort) sort_fun = compare_username_asc; else sort_fun = compare_username_desc; break; case process_gpu_id: if (asc_sort) sort_fun = compare_gpu_asc; else sort_fun = compare_gpu_desc; break; case process_type: if (asc_sort) sort_fun = compare_process_type_asc; else sort_fun = compare_process_type_desc; break; case process_memory: if (asc_sort) sort_fun = compare_mem_usage_asc; else sort_fun = compare_mem_usage_desc; break; case process_command: if (asc_sort) sort_fun = compare_process_name_asc; else sort_fun = compare_process_name_desc; break; case process_cpu_usage: if (asc_sort) sort_fun = compare_cpu_usage_asc; else sort_fun = compare_cpu_usage_desc; break; case process_cpu_mem_usage: if (asc_sort) sort_fun = compare_cpu_mem_usage_asc; else sort_fun = compare_cpu_mem_usage_desc; break; case process_gpu_rate: if (asc_sort) sort_fun = compare_process_gpu_rate_asc; else sort_fun = compare_process_gpu_rate_desc; break; case process_enc_rate: if (asc_sort) sort_fun = compare_process_enc_rate_asc; else sort_fun = compare_process_enc_rate_desc; break; case process_dec_rate: if (asc_sort) sort_fun = compare_process_dec_rate_asc; else sort_fun = compare_process_dec_rate_desc; break; case process_field_count: return; } qsort(all_procs.processes, all_procs.processes_count, sizeof(*all_procs.processes), sort_fun); } static void filter_out_nvtop_pid(all_processes *all_procs, struct nvtop_interface *interface) { if (interface->options.filter_nvtop_pid) { for (unsigned procId = 0; procId < all_procs->processes_count; ++procId) { if (all_procs->processes[procId].process->pid == nvtop_pid) { memmove(&all_procs->processes[procId], &all_procs->processes[procId + 1], (all_procs->processes_count - procId - 1) * sizeof(*all_procs->processes)); all_procs->processes_count = all_procs->processes_count - 1; break; } } } } static const char *columnName[process_field_count] = { "PID", "USER", "DEV", "TYPE", "GPU", "ENC", "DEC", "GPU MEM", "CPU", "HOST MEM", "Command", }; static void update_selected_offset_with_window_size(unsigned int *selected_row, unsigned int *offset, unsigned int row_available_to_draw, unsigned int num_to_draw) { if (!num_to_draw) return; if (*selected_row > num_to_draw - 1) *selected_row = num_to_draw - 1; if (*offset > *selected_row) *offset = *selected_row; if (*offset + row_available_to_draw - 1 < *selected_row) *offset = *selected_row - row_available_to_draw + 1; while (row_available_to_draw > num_to_draw - *offset && *offset != 0) *offset -= 1; } #define process_buffer_line_size 8192 static char process_print_buffer[process_buffer_line_size]; static void print_processes_on_screen(all_processes all_procs, struct process_window *process, enum process_field sort_criterion, process_field_displayed fields_to_display) { WINDOW *win = process->option_window.state == nvtop_option_state_hidden ? process->process_win : process->process_with_option_win; struct gpuid_and_process *processes = all_procs.processes; unsigned int rows, cols; getmaxyx(win, rows, cols); rows -= 1; update_selected_offset_with_window_size(&process->selected_row, &process->offset, rows, all_procs.processes_count); if (process->offset_column + cols >= process_buffer_line_size) process->offset_column = process_buffer_line_size - cols - 1; size_t special_row = process->selected_row; char pid_str[sizeof_process_field[process_pid] + 1]; char guid_str[sizeof_process_field[process_gpu_id] + 1]; char memory[sizeof_process_field[process_memory] + 1]; char cpu_percent[sizeof_process_field[process_cpu_usage] + 1]; char cpu_mem[sizeof_process_field[process_cpu_mem_usage] + 1]; unsigned int start_at_process = process->offset; unsigned int end_at_process = start_at_process + rows; int printed = 0; int column_sort_start = 0, column_sort_end = sizeof_process_field[0]; memset(process_print_buffer, 0, sizeof(process_print_buffer)); for (enum process_field i = process_pid; i < process_field_count; ++i) { if (i == sort_criterion) { column_sort_start = printed; column_sort_end = i == process_command ? process_buffer_line_size - 4 : column_sort_start + sizeof_process_field[i]; } if (process_is_field_displayed(i, fields_to_display)) printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[i], columnName[i]); } mvwprintw(win, 0, 0, "%.*s", cols, &process_print_buffer[process->offset_column]); wclrtoeol(win); mvwchgat(win, 0, 0, -1, A_STANDOUT, green_color, NULL); set_attribute_between(win, 0, column_sort_start - (int)process->offset_column, column_sort_end - (int)process->offset_column, A_STANDOUT, cyan_color); int start_col_process_type = 0; for (enum process_field i = process_pid; i < process_type; ++i) { if (process_is_field_displayed(i, fields_to_display)) start_col_process_type += sizeof_process_field[i] + 1; } int end_col_process_type = start_col_process_type + sizeof_process_field[process_type]; static unsigned printed_last_call = 0; unsigned last_line_printed = 0; for (unsigned int i = start_at_process; i < end_at_process && i < all_procs.processes_count; ++i) { memset(process_print_buffer, 0, sizeof(process_print_buffer)); printed = 0; if (process_is_field_displayed(process_pid, fields_to_display)) { size_t size = snprintf(pid_str, sizeof_process_field[process_pid] + 1, "%" PRIdMAX, (intmax_t)processes[i].process->pid); if (size == sizeof_process_field[process_pid] + 1) pid_str[sizeof_process_field[process_pid]] = '\0'; printed += snprintf(&process_print_buffer[printed], process_buffer_line_size, "%*s ", sizeof_process_field[process_pid], pid_str); } if (process_is_field_displayed(process_user, fields_to_display)) { const char *username; if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, user_name)) { username = processes[i].process->user_name; } else { username = "N/A"; } printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_user], username); } if (process_is_field_displayed(process_gpu_id, fields_to_display)) { size_t size = snprintf(guid_str, sizeof_process_field[process_gpu_id] + 1, "%u", processes[i].gpu_id); if (size >= sizeof_process_field[process_gpu_id] + 1) pid_str[sizeof_process_field[process_gpu_id]] = '\0'; printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_gpu_id], guid_str); } if (process_is_field_displayed(process_type, fields_to_display)) { if (processes[i].process->type == gpu_process_graphical_compute) { printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_type], "Both G+C"); } else if (processes[i].process->type == gpu_process_graphical) { printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_type], "Graphic"); } else { printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_type], "Compute"); } } if (process_is_field_displayed(process_gpu_rate, fields_to_display)) { unsigned gpu_usage = 0; if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, gpu_usage)) { gpu_usage = processes[i].process->gpu_usage; printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%3u%% ", gpu_usage); } else { printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "N/A "); } } if (process_is_field_displayed(process_enc_rate, fields_to_display)) { unsigned encoder_rate = 0; if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, encode_usage)) { encoder_rate = processes[i].process->encode_usage; printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%3u%% ", encoder_rate); } else { printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "N/A "); } } if (process_is_field_displayed(process_dec_rate, fields_to_display)) { unsigned decode_rate = 0; if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, decode_usage)) { decode_rate = processes[i].process->decode_usage; printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%3u%% ", decode_rate); } else { printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "N/A "); } } if (process_is_field_displayed(process_memory, fields_to_display)) { if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, gpu_memory_usage)) { if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, gpu_memory_percentage)) { snprintf(memory, 9 + 1, "%6uMiB", (unsigned)(processes[i].process->gpu_memory_usage / 1048576)); snprintf(memory + 9, sizeof_process_field[process_memory] - 9 + 1, " %3u%%", processes[i].process->gpu_memory_percentage); } else { snprintf(memory, sizeof_process_field[process_memory], "%6uMiB", (unsigned)(processes[i].process->gpu_memory_usage / 1048576)); } } else { snprintf(memory, sizeof_process_field[process_memory], "%s", "N/A"); } printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_memory], memory); } if (process_is_field_displayed(process_cpu_usage, fields_to_display)) { if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, cpu_usage)) snprintf(cpu_percent, sizeof_process_field[process_cpu_usage] + 1, "%u%%", processes[i].process->cpu_usage); else snprintf(cpu_percent, sizeof_process_field[process_cpu_usage] + 1, " N/A"); printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_cpu_usage], cpu_percent); } if (process_is_field_displayed(process_cpu_mem_usage, fields_to_display)) { if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, cpu_memory_res)) snprintf(cpu_mem, sizeof_process_field[process_cpu_mem_usage] + 1, "%zuMiB", processes[i].process->cpu_memory_res / 1048576); else snprintf(cpu_mem, sizeof_process_field[process_cpu_mem_usage] + 1, "N/A"); printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%*s ", sizeof_process_field[process_cpu_mem_usage], cpu_mem); } if (process_is_field_displayed(process_command, fields_to_display)) { if (GPUINFO_PROCESS_FIELD_VALID(processes[i].process, cmdline)) printed += snprintf(&process_print_buffer[printed], process_buffer_line_size - printed, "%.*s", process_buffer_line_size - printed, processes[i].process->cmdline); } unsigned int write_at = i - start_at_process + 1; mvwprintw(win, write_at, 0, "%.*s", cols, &process_print_buffer[process->offset_column]); unsigned row, col; getyx(win, row, col); (void)col; if (row == write_at) wclrtoeol(win); last_line_printed = write_at; if (i == special_row) { mvwchgat(win, write_at, 0, -1, A_STANDOUT, cyan_color, NULL); } else { if (process_is_field_displayed(process_type, fields_to_display)) { if (processes[i].process->type == gpu_process_graphical_compute) { set_attribute_between(win, write_at, start_col_process_type - (int)process->offset_column, start_col_process_type - (int)process->offset_column + 4, 0, cyan_color); set_attribute_between(win, write_at, end_col_process_type - (int)process->offset_column - 3, end_col_process_type - (int)process->offset_column - 2, 0, yellow_color); set_attribute_between(win, write_at, end_col_process_type - (int)process->offset_column - 1, end_col_process_type - (int)process->offset_column, 0, magenta_color); } else if (processes[i].process->type == gpu_process_graphical) { set_attribute_between(win, write_at, start_col_process_type - (int)process->offset_column, end_col_process_type - (int)process->offset_column, 0, yellow_color); } else { set_attribute_between(win, write_at, start_col_process_type - (int)process->offset_column, end_col_process_type - (int)process->offset_column, 0, magenta_color); } } } } if (printed_last_call > last_line_printed) { for (unsigned i = last_line_printed + 1; i <= rows && i <= printed_last_call; ++i) { wmove(win, i, 0); wclrtoeol(win); } } printed_last_call = last_line_printed; wnoutrefresh(win); } static void update_process_option_win(struct nvtop_interface *interface); static void draw_processes(struct list_head *devices, struct nvtop_interface *interface) { if (interface->options.hide_processes_list) return; if (interface->process.process_win == NULL) return; if (interface->process.option_window.state != interface->process.option_window.previous_state) { werase(interface->process.option_window.option_win); wclear(interface->process.process_win); wclear(interface->process.process_with_option_win); wnoutrefresh(interface->process.option_window.option_win); } if (interface->process.option_window.state != nvtop_option_state_hidden) update_process_option_win(interface); all_processes all_procs = all_processes_array(devices); filter_out_nvtop_pid(&all_procs, interface); sort_process(all_procs, interface->options.sort_processes_by, !interface->options.sort_descending_order); if (all_procs.processes_count > 0) { if (interface->process.selected_row >= all_procs.processes_count) interface->process.selected_row = all_procs.processes_count - 1; interface->process.selected_pid = all_procs.processes[interface->process.selected_row].process->pid; } else { interface->process.selected_row = 0; interface->process.selected_pid = -1; } unsigned largest_username = 4; for (unsigned i = 0; i < all_procs.processes_count; ++i) { if (GPUINFO_PROCESS_FIELD_VALID(all_procs.processes[i].process, user_name)) { unsigned length = strlen(all_procs.processes[i].process->user_name); if (length > largest_username) largest_username = length; } } sizeof_process_field[process_user] = largest_username; print_processes_on_screen(all_procs, &interface->process, interface->options.sort_processes_by, interface->options.process_fields_displayed); free(all_procs.processes); } static const char *signalNames[] = { "Cancel", "SIGHUP", "SIGINT", "SIGQUIT", "SIGILL", "SIGTRAP", "SIGABRT", "SIGBUS", "SIGFPE", "SIGKILL", "SIGUSR1", "SIGSEGV", "SIGUSR2", "SIGPIPE", "SIGALRM", "SIGTERM", "SIGCHLD", "SIGCONT", "SIGSTOP", "SIGTSTP", "SIGTTIN", "SIGTTOU", "SIGURG", "SIGXCPU", "SIGXFSZ", "SIGVTALRM", "SIGPROF", "SIGWINCH", "SIGIO", "SIGPWR", "SIGSYS", }; // SIGPWR does not exist on FreeBSD or Apple, while it is a synonym for SIGINFO on Linux #if defined(__FreeBSD__) || defined(__APPLE__) #define SIGPWR SIGINFO #endif static const int signalValues[ARRAY_SIZE(signalNames)] = { -1, SIGHUP, SIGINT, SIGQUIT, SIGILL, SIGTRAP, SIGABRT, SIGBUS, SIGFPE, SIGKILL, SIGUSR1, SIGSEGV, SIGUSR2, SIGPIPE, SIGALRM, SIGTERM, SIGCHLD, SIGCONT, SIGSTOP, SIGTSTP, SIGTTIN, SIGTTOU, SIGURG, SIGXCPU, SIGXFSZ, SIGVTALRM, SIGPROF, SIGWINCH, SIGIO, SIGPWR, SIGSYS, }; static const size_t nvtop_num_signals = ARRAY_SIZE(signalNames) - 1; static void draw_kill_option(struct nvtop_interface *interface) { WINDOW *win = interface->process.option_window.option_win; wattr_set(win, A_REVERSE, green_color, NULL); mvwprintw(win, 0, 0, "Send signal:"); wstandend(win); wprintw(win, " "); int rows, cols; getmaxyx(win, rows, cols); size_t start_at_option = interface->process.option_window.offset; size_t end_at_option = start_at_option + rows - 1; for (size_t i = start_at_option; i < end_at_option && i <= nvtop_num_signals; ++i) { if (i == interface->process.option_window.selected_row) { wattr_set(win, A_STANDOUT, cyan_color, NULL); } wprintw(win, "%*zu %s", 2, i, signalNames[i]); getyx(win, rows, cols); for (unsigned int j = cols; j < option_window_size; ++j) wprintw(win, " "); if (i == interface->process.option_window.selected_row) { wstandend(win); mvwprintw(win, rows, option_window_size - 1, " "); } } wnoutrefresh(win); } static void draw_sort_option(struct nvtop_interface *interface) { WINDOW *win = interface->process.option_window.option_win; wattr_set(win, A_REVERSE, green_color, NULL); mvwprintw(win, 0, 0, "Sort by "); wstandend(win); wprintw(win, " "); int rows, cols; if (interface->process.option_window.offset == 0) { if (interface->process.option_window.selected_row == 0) { wattr_set(win, A_STANDOUT, cyan_color, NULL); } wprintw(win, "Cancel"); getyx(win, rows, cols); for (unsigned int j = cols; j < option_window_size; ++j) wprintw(win, " "); if (interface->process.option_window.selected_row == 0) { wstandend(win); mvwprintw(win, rows, option_window_size - 1, " "); } } getmaxyx(win, rows, cols); size_t start_at_option = interface->process.option_window.offset == 0 ? interface->process.option_window.offset : interface->process.option_window.offset - 1; size_t end_at_option = interface->process.option_window.offset == 0 ? start_at_option + rows - 2 : start_at_option + rows - 1; unsigned option_index = 0; for (enum process_field field = process_pid; field < process_field_count; ++field) { if (process_is_field_displayed(field, interface->options.process_fields_displayed)) { if (option_index >= start_at_option && option_index < end_at_option) { if (option_index + 1 == interface->process.option_window.selected_row) { wattr_set(win, A_STANDOUT, cyan_color, NULL); } wprintw(win, "%s", columnName[field]); getyx(win, rows, cols); for (unsigned int j = cols; j < option_window_size; ++j) wprintw(win, " "); if (option_index + 1 == interface->process.option_window.selected_row) { wstandend(win); mvwprintw(win, rows, option_window_size - 1, " "); } } option_index++; } } wnoutrefresh(win); } static void update_process_option_win(struct nvtop_interface *interface) { unsigned int rows, cols; getmaxyx(interface->process.option_window.option_win, rows, cols); rows -= 1; (void)cols; unsigned int num_options = 0; switch (interface->process.option_window.state) { case nvtop_option_state_kill: num_options = nvtop_num_signals + 1; // Option + Cancel break; case nvtop_option_state_sort_by: num_options = process_field_displayed_count(interface->options.process_fields_displayed) + 1; // Option + Cancel break; case nvtop_option_state_hidden: default: break; } update_selected_offset_with_window_size(&interface->process.option_window.selected_row, &interface->process.option_window.offset, rows, num_options); switch (interface->process.option_window.state) { case nvtop_option_state_kill: draw_kill_option(interface); break; case nvtop_option_state_sort_by: draw_sort_option(interface); break; case nvtop_option_state_hidden: default: break; } } static const char *option_selection_hidden[] = { "Setup", "Sort", "Kill", "Quit", "Save Config", }; static const char *option_selection_hidden_num[] = { "2", "6", "9", "10", "12", }; static const char *option_selection_sort[][2] = { {"Enter", "Sort"}, {"ESC", "Cancel"}, {"+", "Ascending"}, {"-", "Descending"}, }; static const char *option_selection_kill[][2] = { {"Enter", "Send"}, {"ESC", "Cancel"}, }; static const unsigned int option_selection_width = 8; static void draw_process_shortcuts(struct nvtop_interface *interface) { if (interface->process.option_window.state == interface->process.option_window.previous_state) return; WINDOW *win = interface->shortcut_window; enum nvtop_option_window_state current_state = interface->process.option_window.state; wmove(win, 0, 0); switch (current_state) { case nvtop_option_state_hidden: for (size_t i = 0; i < ARRAY_SIZE(option_selection_hidden); ++i) { if (interface->options.hide_processes_list && (strcmp(option_selection_hidden_num[i], "6") == 0 || strcmp(option_selection_hidden_num[i], "9") == 0)) continue; if (process_field_displayed_count(interface->options.process_fields_displayed) > 0 || (i != 1 && i != 2)) { wprintw(win, "F%s", option_selection_hidden_num[i]); wattr_set(win, A_STANDOUT, cyan_color, NULL); wprintw(win, "%-*s", option_selection_width, option_selection_hidden[i]); wstandend(win); } } break; case nvtop_option_state_kill: for (size_t i = 0; i < ARRAY_SIZE(option_selection_kill); ++i) { wprintw(win, "%s", option_selection_kill[i][0]); wattr_set(win, A_STANDOUT, cyan_color, NULL); wprintw(win, "%-*s", option_selection_width, option_selection_kill[i][1]); wstandend(win); } break; case nvtop_option_state_sort_by: for (size_t i = 0; i < ARRAY_SIZE(option_selection_sort); ++i) { wprintw(win, "%s", option_selection_sort[i][0]); wattr_set(win, A_STANDOUT, cyan_color, NULL); wprintw(win, "%-*s", option_selection_width, option_selection_sort[i][1]); wstandend(win); } break; default: break; } wclrtoeol(win); unsigned int cur_col, tmp; (void)tmp; getyx(win, tmp, cur_col); mvwchgat(win, 0, cur_col, -1, A_STANDOUT, cyan_color, NULL); wnoutrefresh(win); interface->process.option_window.previous_state = current_state; } static void draw_shortcuts(struct nvtop_interface *interface) { if (interface->setup_win.visible) { draw_setup_window_shortcuts(interface); } else { draw_process_shortcuts(interface); } } void save_current_data_to_ring(struct list_head *devices, struct nvtop_interface *interface) { struct gpu_info *device; unsigned dev_id = 0; list_for_each_entry(device, devices, list) { unsigned data_index = 0; for (enum plot_information info = plot_gpu_rate; info < plot_information_count; ++info) { if (plot_isset_draw_info(info, interface->options.gpu_specific_opts[dev_id].to_draw)) { unsigned data_val = 0; switch (info) { case plot_gpu_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_util_rate)) data_val = device->dynamic_info.gpu_util_rate; break; case plot_gpu_mem_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, mem_util_rate)) data_val = device->dynamic_info.mem_util_rate; break; case plot_encoder_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, encoder_rate)) data_val = device->dynamic_info.encoder_rate; break; case plot_decoder_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, decoder_rate)) data_val = device->dynamic_info.decoder_rate; break; case plot_gpu_temperature: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_temp)) { data_val = device->dynamic_info.gpu_temp; if (data_val > 100) data_val = 100u; } break; case plot_gpu_power_draw_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw_max)) { data_val = device->dynamic_info.power_draw * 100 / device->dynamic_info.power_draw_max; if (data_val > 100) data_val = 100u; } break; case plot_fan_speed: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, fan_speed)) { data_val = device->dynamic_info.fan_speed; } break; case plot_gpu_clock_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_clock_speed) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_clock_speed_max)) { data_val = device->dynamic_info.gpu_clock_speed * 100 / device->dynamic_info.gpu_clock_speed_max; } break; case plot_gpu_mem_clock_rate: if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, mem_clock_speed) && GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, mem_clock_speed_max)) { data_val = device->dynamic_info.mem_clock_speed * 100 / device->dynamic_info.mem_clock_speed_max; } break; case plot_information_count: break; } interface_ring_buffer_push(&interface->saved_data_ring, dev_id, data_index, data_val); data_index++; } } dev_id++; } } static unsigned populate_plot_data_from_ring_buffer(const struct nvtop_interface *interface, struct plot_window *plot_win, unsigned size_data_buff, double data[size_data_buff], char plot_legend[MAX_LINES_PER_PLOT][PLOT_MAX_LEGEND_SIZE]) { memset(data, 0, size_data_buff * sizeof(*data)); unsigned total_to_draw = 0; for (unsigned i = 0; i < plot_win->num_devices_to_plot; ++i) { unsigned dev_id = plot_win->devices_ids[i]; plot_info_to_draw to_draw = interface->options.gpu_specific_opts[dev_id].to_draw; total_to_draw += plot_count_draw_info(to_draw); } assert(total_to_draw > 0); assert(size_data_buff % total_to_draw == 0); unsigned max_data_to_copy = size_data_buff / total_to_draw; double(*data_split)[total_to_draw] = (double(*)[total_to_draw])data; unsigned in_processing = 0; for (unsigned i = 0; i < plot_win->num_devices_to_plot; ++i) { unsigned dev_id = plot_win->devices_ids[i]; plot_info_to_draw to_draw = interface->options.gpu_specific_opts[dev_id].to_draw; unsigned data_ring_index = 0; for (enum plot_information info = plot_gpu_rate; info < plot_information_count; ++info) { if (plot_isset_draw_info(info, to_draw)) { // Populate the legend switch (info) { case plot_gpu_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u %%", dev_id); break; case plot_gpu_mem_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u mem%%", dev_id); break; case plot_encoder_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u encode%%", dev_id); break; case plot_decoder_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u decode%%", dev_id); break; case plot_gpu_temperature: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u temp(c)", dev_id); break; case plot_gpu_power_draw_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u power%%", dev_id); break; case plot_fan_speed: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u fan%%", dev_id); break; case plot_gpu_clock_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u clock%%", dev_id); break; case plot_gpu_mem_clock_rate: snprintf(plot_legend[in_processing], PLOT_MAX_LEGEND_SIZE, "GPU%u mem clock%%", dev_id); break; case plot_information_count: break; } // Copy the data unsigned data_in_ring = interface_ring_buffer_data_stored(&interface->saved_data_ring, dev_id, data_ring_index); if (interface->options.plot_left_to_right) { for (unsigned j = 0; j < data_in_ring && j < max_data_to_copy; ++j) { data_split[j][in_processing] = interface_ring_buffer_get(&interface->saved_data_ring, dev_id, data_ring_index, data_in_ring - j - 1); } } else { for (unsigned j = 0; j < data_in_ring && j < max_data_to_copy; ++j) { data_split[max_data_to_copy - j - 1][in_processing] = interface_ring_buffer_get(&interface->saved_data_ring, dev_id, data_ring_index, data_in_ring - j - 1); } } data_ring_index++; in_processing++; } } } return total_to_draw; } static void draw_plots(struct nvtop_interface *interface) { for (unsigned plot_id = 0; plot_id < interface->num_plots; ++plot_id) { werase(interface->plots[plot_id].plot_window); char plot_legend[MAX_LINES_PER_PLOT][PLOT_MAX_LEGEND_SIZE]; unsigned num_lines = populate_plot_data_from_ring_buffer(interface, &interface->plots[plot_id], interface->plots[plot_id].num_data, interface->plots[plot_id].data, plot_legend); nvtop_line_plot(interface->plots[plot_id].plot_window, interface->plots[plot_id].num_data, interface->plots[plot_id].data, num_lines, !interface->options.plot_left_to_right, plot_legend); wnoutrefresh(interface->plots[plot_id].plot_window); } } void draw_gpu_info_ncurses(unsigned devices_count, struct list_head *devices, struct nvtop_interface *interface) { draw_devices(devices, interface); if (!interface->setup_win.visible) { draw_plots(interface); draw_processes(devices, interface); } else { draw_setup_window(devices_count, devices, interface); } draw_shortcuts(interface); doupdate(); } void update_window_size_to_terminal_size(struct nvtop_interface *inter) { endwin(); erase(); refresh(); refresh(); delete_all_windows(inter); initialize_all_windows(inter); } bool is_escape_for_quit(struct nvtop_interface *interface) { if (interface->process.option_window.state == nvtop_option_state_hidden && !interface->setup_win.visible) return true; else return false; } static void option_do_kill(struct nvtop_interface *interface) { if (interface->process.option_window.selected_row == 0) return; pid_t pid = interface->process.selected_pid; int sig = signalValues[interface->process.option_window.selected_row]; if (pid > 0) { kill(pid, sig); } } static void option_change_sort(struct nvtop_interface *interface) { if (interface->process.option_window.selected_row == 0) return; unsigned index = 0; for (enum process_field i = process_pid; i < process_field_count; ++i) { if (process_is_field_displayed(i, interface->options.process_fields_displayed)) { if (index == interface->process.option_window.selected_row - 1) { interface->options.sort_processes_by = i; return; } index++; } } } void interface_key(int keyId, struct nvtop_interface *interface) { if (interface->setup_win.visible) { handle_setup_win_keypress(keyId, interface); return; } switch (keyId) { case KEY_F(2): if (interface->process.option_window.state == nvtop_option_state_hidden && !interface->setup_win.visible) { show_setup_window(interface); } break; case KEY_F(12): save_interface_options_to_config_file(interface->total_dev_count, &interface->options); break; case KEY_F(9): if (process_field_displayed_count(interface->options.process_fields_displayed) > 0 && interface->process.option_window.state == nvtop_option_state_hidden) { interface->process.option_window.state = nvtop_option_state_kill; interface->process.option_window.selected_row = 0; } break; case KEY_F(6): if (process_field_displayed_count(interface->options.process_fields_displayed) > 0 && interface->process.option_window.state == nvtop_option_state_hidden) { interface->process.option_window.state = nvtop_option_state_sort_by; interface->process.option_window.selected_row = 0; } break; case 'l': case KEY_RIGHT: if (interface->process.option_window.state == nvtop_option_state_hidden) interface->process.offset_column += 4; break; case 'h': case KEY_LEFT: if (interface->process.option_window.state == nvtop_option_state_hidden && interface->process.offset_column >= 4) interface->process.offset_column -= 4; break; case 'k': case KEY_UP: switch (interface->process.option_window.state) { case nvtop_option_state_kill: case nvtop_option_state_sort_by: if (interface->process.option_window.selected_row != 0) interface->process.option_window.selected_row--; break; case nvtop_option_state_hidden: if (interface->process.selected_row != 0) interface->process.selected_row--; break; default: break; } break; case 'j': case KEY_DOWN: switch (interface->process.option_window.state) { case nvtop_option_state_kill: case nvtop_option_state_sort_by: interface->process.option_window.selected_row++; break; case nvtop_option_state_hidden: interface->process.selected_row++; break; default: break; } break; case '+': interface->options.sort_descending_order = false; break; case '-': interface->options.sort_descending_order = true; break; case '\n': case KEY_ENTER: switch (interface->process.option_window.state) { case nvtop_option_state_kill: option_do_kill(interface); interface->process.option_window.state = nvtop_option_state_hidden; break; case nvtop_option_state_sort_by: option_change_sort(interface); interface->process.option_window.state = nvtop_option_state_hidden; break; case nvtop_option_state_hidden: default: break; } break; case 27: interface->process.option_window.state = nvtop_option_state_hidden; break; default: break; } } bool interface_freeze_processes(struct nvtop_interface *interface) { return interface->process.option_window.state == nvtop_option_state_kill; } extern inline void set_attribute_between(WINDOW *win, int startY, int startX, int endX, attr_t attr, short pair); int interface_update_interval(const struct nvtop_interface *interface) { return interface->options.update_interval; } unsigned interface_largest_gpu_name(struct list_head *devices) { struct gpu_info *gpuinfo; unsigned max_size = 4; list_for_each_entry(gpuinfo, devices, list) { if (GPUINFO_STATIC_FIELD_VALID(&gpuinfo->static_info, device_name)) { unsigned name_len = strlen(gpuinfo->static_info.device_name); max_size = name_len > max_size ? name_len : max_size; } } return max_size; } void interface_check_monitored_gpu_change(struct nvtop_interface **interface, unsigned allDevCount, unsigned *num_monitored_gpus, struct list_head *monitoredGpus, struct list_head *nonMonitoredGpus) { if (!(*interface)->setup_win.visible && (*interface)->options.has_monitored_set_changed) { nvtop_interface_option options_copy = (*interface)->options; options_copy.has_monitored_set_changed = false; memset(&(*interface)->options, 0, sizeof(options_copy)); *num_monitored_gpus = interface_check_and_fix_monitored_gpus(allDevCount, monitoredGpus, nonMonitoredGpus, &options_copy); clean_ncurses(*interface); *interface = initialize_curses(allDevCount, *num_monitored_gpus, interface_largest_gpu_name(monitoredGpus), options_copy); timeout(interface_update_interval(*interface)); } } static char dontShowAgain[] = ""; static char okay[] = ""; static char interactKeys[] = "Press Enter to select, arrows \">\" and \"<\" to switch options"; static unsigned message_lines(unsigned message_size, unsigned cols) { return (message_size + cols - 1) / cols; } bool show_information_messages(unsigned num_messages, const char **messages) { if (!num_messages) return false; bool exit = false; bool dontShowAgainOption = false; while (!exit) { initscr(); clear(); refresh(); initialize_colors(); cbreak(); noecho(); keypad(stdscr, TRUE); curs_set(0); int rows, cols; getmaxyx(stdscr, rows, cols); unsigned messages_lines = num_messages / 2; for (unsigned i = 0; i < num_messages; ++i) { messages_lines += message_lines(strlen(messages[i]), cols) + 1; } int row = (rows - messages_lines + 1) / 2; for (unsigned i = 0; i < num_messages; ++i) { int col = (cols - strlen(messages[i]) - 1) / 2; col = col < 0 ? 0 : col; mvprintw(row, col, "%s", messages[i]); row += message_lines(strlen(messages[i]), cols) + 1; } size_t sizeQuitOptions = sizeof(dontShowAgain) + sizeof(okay); int quitOptionsRow = row; int quitOptionsCol = (cols - sizeQuitOptions) / 2; quitOptionsCol = quitOptionsCol < 0 ? 0 : quitOptionsCol; mvprintw(quitOptionsRow, quitOptionsCol, "%s %s", dontShowAgain, okay); refresh(); if (dontShowAgainOption) { mvchgat(quitOptionsRow, quitOptionsCol, sizeof(dontShowAgain) - 1, 0, green_color, NULL); mvchgat(quitOptionsRow, quitOptionsCol + sizeof(dontShowAgain), sizeof(okay) - 1, 0, 0, NULL); } else { mvchgat(quitOptionsRow, quitOptionsCol, sizeof(dontShowAgain) - 1, 0, 0, NULL); mvchgat(quitOptionsRow, quitOptionsCol + sizeof(dontShowAgain), sizeof(okay) - 1, 0, green_color, NULL); } int interactKeyCol = (cols - sizeof(interactKeys) - 1) / 2; interactKeyCol = interactKeyCol < 0 ? 0 : interactKeyCol; mvprintw(quitOptionsRow + 1, interactKeyCol, "%s", interactKeys); int input_char = getch(); switch (input_char) { case 27: // ESC case 'q': case KEY_ENTER: case '\n': exit = true; break; case KEY_RIGHT: dontShowAgainOption = false; break; case KEY_LEFT: dontShowAgainOption = true; break; default: break; } endwin(); } return dontShowAgainOption; } void print_snapshot(struct list_head *devices, bool use_fahrenheit_option) { gpuinfo_populate_static_infos(devices); gpuinfo_refresh_dynamic_info(devices); struct gpu_info *device; printf("[\n"); list_for_each_entry(device, devices, list) { const char *indent_level_two = " "; const char *indent_level_four = " "; const char *device_name_field = "device_name"; const char *gpu_clock_field = "gpu_clock"; const char *mem_clock_field = "mem_clock"; const char *temp_field = "temp"; const char *fan_field = "fan_speed"; const char *power_field = "power_draw"; const char *gpu_util_field = "gpu_util"; const char *mem_util_field = "mem_util"; printf("%s{\n", indent_level_two); // Device Name if (GPUINFO_STATIC_FIELD_VALID(&device->static_info, device_name)) printf("%s\"%s\": \"%s\",\n", indent_level_four, device_name_field, device->static_info.device_name); else printf("%s\"%s\": null,\n", indent_level_four, device_name_field); // GPU Clock Speed if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_clock_speed)) printf("%s\"%s\": \"%uMHz\",\n", indent_level_four, gpu_clock_field, device->dynamic_info.gpu_clock_speed); else printf("%s\"%s\": null,\n", indent_level_four, gpu_clock_field); // MEM Clock Speed if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, mem_clock_speed)) printf("%s\"%s\": \"%uMHz\",\n", indent_level_four, mem_clock_field, device->dynamic_info.mem_clock_speed); else printf("%s\"%s\": null,\n", indent_level_four, mem_clock_field); // GPU Temperature if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_temp)) { unsigned int temp_convert; if (!use_fahrenheit_option) temp_convert = device->dynamic_info.gpu_temp; else temp_convert = (unsigned)(32 + nearbyint(device->dynamic_info.gpu_temp * 1.8)); printf("%s\"%s\": \"%u%s\",\n", indent_level_four, temp_field, temp_convert, use_fahrenheit_option ? "F" : "C"); } else { printf("%s\"%s\": null,\n", indent_level_four, temp_field); } // Fan speed if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, fan_speed)) printf("%s\"%s\": \"%u%%\",\n", indent_level_four, fan_field, device->dynamic_info.fan_speed > 100 ? 100 : device->dynamic_info.fan_speed); else if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, fan_rpm)) printf("%s\"%s\": \"%uRPM\",\n", indent_level_four, fan_field, device->dynamic_info.fan_rpm > 9999 ? 9999 : device->dynamic_info.fan_rpm); else if (device->static_info.integrated_graphics) printf("%s\"%s\": \"CPU Fan\",\n", indent_level_four, fan_field); else printf("%s\"%s\": null,\n", indent_level_four, fan_field); // Power draw if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, power_draw)) printf("%s\"%s\": \"%uW\",\n", indent_level_four, power_field, device->dynamic_info.power_draw / 1000); else printf("%s\"%s\": null,\n", indent_level_four, power_field); // GPU Utilization if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, gpu_util_rate)) printf("%s\"%s\": \"%u%%\",\n", indent_level_four, gpu_util_field, device->dynamic_info.gpu_util_rate); else printf("%s\"%s\": null,\n", indent_level_four, gpu_util_field); // Memory Utilization if (GPUINFO_DYNAMIC_FIELD_VALID(&device->dynamic_info, mem_util_rate)) printf("%s\"%s\": \"%u%%\"\n", indent_level_four, mem_util_field, device->dynamic_info.mem_util_rate); else printf("%s\"%s\": null\n", indent_level_four, mem_util_field); if (device->list.next == devices) printf("%s}\n", indent_level_two); else printf("%s},\n", indent_level_two); } printf("]\n"); } nvtop-3.2.0/src/interface_layout_selection.c000066400000000000000000000377411477175131100212420ustar00rootroot00000000000000#include "nvtop/interface_layout_selection.h" #include "nvtop/interface.h" #include "nvtop/interface_options.h" #include #include #include #include #include #include #define max(a, b) ((a) > (b) ? (a) : (b)) #define min(a, b) ((a) < (b) ? (a) : (b)) static unsigned min_rows_taken_by_process(unsigned rows, unsigned num_devices) { return 1 + max(5, min(rows / 4, num_devices * 3)); } static const unsigned cols_needed_box_drawing = 5; static const unsigned min_plot_rows = 7; static unsigned min_plot_cols(unsigned num_data_info_to_plot) { return cols_needed_box_drawing + 10 * num_data_info_to_plot; } // If true, returns two plot indices that yields to the lowest number of info in // a plot when merged. // In case of ties, plots at the end of the list are prioritized. static bool who_to_merge(unsigned max_merge_size, unsigned plot_count, unsigned num_info_per_plot[plot_count], unsigned merge_ids[2]) { unsigned smallest_merge = UINT_MAX; for (unsigned notEmptyPlotIdx = plot_count - 1; notEmptyPlotIdx < plot_count; --notEmptyPlotIdx) { if (!num_info_per_plot[notEmptyPlotIdx]) continue; // We want to preserve the devices order when merging, hence we only look // for the closest non empty neighbor for each plot. unsigned merge_with = notEmptyPlotIdx; for (unsigned j = notEmptyPlotIdx - 1; j < notEmptyPlotIdx; --j) { if (num_info_per_plot[j]) { merge_with = j; break; } } unsigned num_info_merged = num_info_per_plot[notEmptyPlotIdx] + num_info_per_plot[merge_with]; if (merge_with < notEmptyPlotIdx && num_info_merged <= max_merge_size && num_info_merged < smallest_merge) { smallest_merge = num_info_merged; merge_ids[0] = merge_with; merge_ids[1] = notEmptyPlotIdx; } } return smallest_merge != UINT_MAX; } static bool move_plot_to_stack(unsigned stack_max_cols, unsigned plot_id, unsigned destination_stack, unsigned plot_count, unsigned stack_count, const unsigned num_info_per_plot[plot_count], unsigned cols_allocated_in_stacks[stack_count], unsigned plot_in_stack[plot_count]) { if (plot_in_stack[plot_id] == destination_stack) return false; unsigned cols_used_by_plot_id = min_plot_cols(num_info_per_plot[plot_id]); unsigned cols_after_merge = cols_allocated_in_stacks[destination_stack] + cols_used_by_plot_id; if (cols_after_merge > stack_max_cols) { return false; } else { cols_allocated_in_stacks[plot_in_stack[plot_id]] -= cols_used_by_plot_id; cols_allocated_in_stacks[destination_stack] += cols_used_by_plot_id; plot_in_stack[plot_id] = destination_stack; return true; } } static unsigned info_in_plot(unsigned plot_id, unsigned devices_count, const unsigned map_device_to_plot[devices_count], const nvtop_interface_gpu_opts gpuOpts[devices_count]) { unsigned sum = 0; for (unsigned dev_id = 0; dev_id < devices_count; ++dev_id) { if (map_device_to_plot[dev_id] == plot_id) sum += plot_count_draw_info(gpuOpts[dev_id].to_draw); } assert(sum > 0); return sum; } static unsigned cols_used_by_stack(unsigned stack_id, unsigned plot_count, const unsigned num_info_per_plot[plot_count], const unsigned plot_in_stack[plot_count]) { unsigned sum = 0; for (unsigned plot_id = 0; plot_id < plot_count; ++plot_id) { if (plot_in_stack[plot_id] == stack_id) sum += min_plot_cols(num_info_per_plot[plot_id]); } return sum; } static unsigned size_differences_between_stacks(unsigned plot_count, unsigned stack_count, unsigned cols_allocated_in_stacks[plot_count]) { unsigned sum = 0; for (unsigned i = 0; i < stack_count; ++i) { for (unsigned j = i + 1; j < stack_count; ++j) { if (cols_allocated_in_stacks[i] > cols_allocated_in_stacks[j]) { sum += cols_allocated_in_stacks[i] - cols_allocated_in_stacks[j]; } else { sum += cols_allocated_in_stacks[j] - cols_allocated_in_stacks[i]; } } } return sum; } static void preliminary_plot_positioning(unsigned rows_for_plots, unsigned plot_total_cols, unsigned devices_count, const nvtop_interface_gpu_opts gpuOpts[devices_count], unsigned map_device_to_plot[devices_count], unsigned plot_in_stack[devices_count], unsigned *num_plots, unsigned *plot_stack_count) { // Used to handle the merging process unsigned num_info_per_plot[MAX_CHARTS]; bool plot_anything = false; for (unsigned i = 0; i < devices_count; ++i) { num_info_per_plot[i] = plot_count_draw_info(gpuOpts[i].to_draw); map_device_to_plot[i] = i; if (num_info_per_plot[i]) plot_anything = true; } // Get the most packed configuration possible with one chart per device if // possible. // If there is not enough place, merge the charts and retry. unsigned num_plot_stacks = 0; bool search_a_window_configuration = plot_anything && rows_for_plots >= min_plot_rows; while (search_a_window_configuration) { search_a_window_configuration = false; unsigned plot_id = 0; num_plot_stacks = 1; unsigned cols_used_in_stack = 0; unsigned rows_left_to_allocate = rows_for_plots - min_plot_rows; for (unsigned i = 0; i < devices_count; ++i) { unsigned num_info_for_this_plot = num_info_per_plot[i]; if (num_info_for_this_plot == 0) continue; unsigned cols_this_plot = min_plot_cols(num_info_for_this_plot); // If there is enough horizontal space left, allocate side by side if (plot_total_cols >= cols_this_plot + cols_used_in_stack) { cols_used_in_stack += cols_this_plot; plot_in_stack[plot_id] = num_plot_stacks - 1; plot_id++; } else { // This plot is too wide for an empty stack, abort if (cols_used_in_stack == 0) { num_plot_stacks = 0; break; } // Else allocate a new stack and retry if (rows_left_to_allocate >= min_plot_rows) { rows_left_to_allocate -= min_plot_rows; num_plot_stacks++; cols_used_in_stack = 0; i--; } else { // Not enough space for a stack: retry and merge one more unsigned to_merge[2]; if (who_to_merge(MAX_LINES_PER_PLOT, devices_count, num_info_per_plot, to_merge)) { num_info_per_plot[to_merge[0]] += num_info_per_plot[to_merge[1]]; num_info_per_plot[to_merge[1]] = 0; unsigned oldLocation = map_device_to_plot[to_merge[1]]; for (unsigned devId = 0; devId < devices_count; ++devId) { if (map_device_to_plot[devId] == oldLocation) map_device_to_plot[devId] = map_device_to_plot[to_merge[0]]; } search_a_window_configuration = true; } else { // No merge left num_plot_stacks = 0; } break; } } } } // Compute the number of plots, the mapping and the size *num_plots = 0; *plot_stack_count = num_plot_stacks; if (num_plot_stacks > 0) { // Move non-empty plots over empty ones caused by merges for (unsigned idx = 0; idx < devices_count; ++idx) { if (!num_info_per_plot[idx]) { // Search next non-empty and move it here for (unsigned nextIdx = idx + 1; nextIdx < devices_count; ++nextIdx) { if (num_info_per_plot[nextIdx]) { num_info_per_plot[idx] = num_info_per_plot[nextIdx]; num_info_per_plot[nextIdx] = 0; for (unsigned devId = 0; devId < devices_count; ++devId) { if (map_device_to_plot[devId] == nextIdx) map_device_to_plot[devId] = idx; } (*num_plots)++; break; } } } else { (*num_plots)++; } } } } static void balance_info_on_stacks_preserving_plot_order(unsigned stack_max_cols, unsigned stack_count, unsigned plot_count, unsigned num_info_per_plot[plot_count], unsigned cols_allocated_in_stacks[stack_count], unsigned plot_in_stack[plot_count]) { if (stack_count > plot_count) { stack_count = plot_count; } unsigned moving_plot_id = plot_count - 1; while (moving_plot_id < plot_count) { unsigned to_stack = plot_in_stack[moving_plot_id] + 1; if (to_stack < stack_count) { unsigned diff_sum_before = size_differences_between_stacks(plot_count, stack_count, cols_allocated_in_stacks); unsigned stack_before = plot_in_stack[moving_plot_id]; if (move_plot_to_stack(stack_max_cols, moving_plot_id, to_stack, plot_count, stack_count, num_info_per_plot, cols_allocated_in_stacks, plot_in_stack)) { unsigned diff_sum_after = size_differences_between_stacks(plot_count, stack_count, cols_allocated_in_stacks); if (diff_sum_after <= diff_sum_before) { moving_plot_id = plot_count; } else { // Move back move_plot_to_stack(stack_max_cols, moving_plot_id, stack_before, plot_count, stack_count, num_info_per_plot, cols_allocated_in_stacks, plot_in_stack); } } } moving_plot_id--; } } void compute_sizes_from_layout(unsigned devices_count, unsigned device_header_rows, unsigned device_header_cols, unsigned rows, unsigned cols, const nvtop_interface_gpu_opts *gpuOpts, process_field_displayed process_displayed, struct window_position *device_positions, unsigned *num_plots, struct window_position plot_positions[MAX_CHARTS], unsigned *map_device_to_plot, struct window_position *process_position, struct window_position *setup_position, bool process_win_hide) { unsigned min_rows_for_header = 0, header_stacks = 0, num_device_per_row = 0; num_device_per_row = max(1, cols / device_header_cols); header_stacks = max(1, devices_count / num_device_per_row + ((devices_count % num_device_per_row) > 0)); if (devices_count % header_stacks == 0) num_device_per_row = devices_count / header_stacks; min_rows_for_header = header_stacks * device_header_rows; unsigned min_rows_for_process = process_field_displayed_count(process_displayed) ? min_rows_taken_by_process(rows, devices_count) : 0; // Not enough room for the header and process if (rows < min_rows_for_header + min_rows_for_process) { if (rows >= min_rows_for_header + 2 && process_field_displayed_count(process_displayed)) { // Shrink process min_rows_for_process = rows - min_rows_for_header; } else { // Only header if possible min_rows_for_header = rows; min_rows_for_process = 0; } } if (process_win_hide) min_rows_for_process = 0; unsigned rows_for_header = min_rows_for_header; unsigned rows_for_process = min_rows_for_process; unsigned rows_for_plots = rows - min_rows_for_header - min_rows_for_process; unsigned num_plot_stacks = 0; unsigned plot_in_stack[MAX_CHARTS]; preliminary_plot_positioning(rows_for_plots, cols, devices_count, gpuOpts, map_device_to_plot, plot_in_stack, num_plots, &num_plot_stacks); // Transfer some lines to the header to separate the devices unsigned transferable_lines = rows_for_plots - num_plot_stacks * min_plot_rows; unsigned space_for_header = header_stacks == 0 ? 0 : header_stacks - 1; bool space_between_header_stack = false; if (transferable_lines >= space_for_header) { rows_for_header += space_for_header; rows_for_plots -= space_for_header; space_between_header_stack = true; } // Allocate additional plot stacks if there is enough vertical room if (num_plot_stacks > 0) { while (num_plot_stacks < *num_plots && rows_for_plots / (num_plot_stacks + 1) >= 11 && (num_plot_stacks + 1) * min_plot_rows <= rows_for_plots) num_plot_stacks++; } // Compute the cols used in each stacks to prepare balancing unsigned num_info_per_plot[MAX_CHARTS]; for (unsigned i = 0; i < *num_plots; ++i) { num_info_per_plot[i] = info_in_plot(i, devices_count, map_device_to_plot, gpuOpts); } unsigned cols_allocated_in_stacks[MAX_CHARTS]; for (unsigned i = 0; i < num_plot_stacks; ++i) { cols_allocated_in_stacks[i] = cols_used_by_stack(i, *num_plots, num_info_per_plot, plot_in_stack); } // Keep the plot order of apparition, but spread the plot on different stacks balance_info_on_stacks_preserving_plot_order(cols, num_plot_stacks, *num_plots, num_info_per_plot, cols_allocated_in_stacks, plot_in_stack); // Device Information Header unsigned cols_header_left = cols - num_device_per_row * device_header_cols; bool space_between_header_col = false; bool space_before_header = false; if (cols_header_left > num_device_per_row) { space_between_header_col = true; cols_header_left -= num_device_per_row - 1; } if (cols_header_left > 0) space_before_header = true; unsigned num_this_row = 0; unsigned headerPosX = space_before_header; unsigned headerPosY = 0; for (unsigned i = 0; i < devices_count; ++i) { device_positions[i].posX = headerPosX; device_positions[i].posY = headerPosY; device_positions[i].sizeX = device_header_cols; device_positions[i].sizeY = device_header_rows; num_this_row++; if (num_this_row == num_device_per_row) { headerPosX = space_before_header; headerPosY += device_header_rows + space_between_header_stack; num_this_row = 0; } else { headerPosX += device_header_cols + space_between_header_col; } } unsigned rows_left_for_process = 0; if (*num_plots > 0) { unsigned rows_per_stack = rows_for_plots / num_plot_stacks; if (!process_win_hide && rows_per_stack > 23) rows_per_stack = 23; unsigned num_plot_done = 0; unsigned currentPosX = 0, currentPosY = rows_for_header; for (unsigned stack_id = 0; stack_id < num_plot_stacks; ++stack_id) { unsigned plot_in_this_stack = 0; unsigned lines_to_draw = 0; for (unsigned j = 0; j < *num_plots; ++j) { if (plot_in_stack[j] == stack_id) { plot_in_this_stack++; lines_to_draw += num_info_per_plot[j]; } } unsigned cols_for_line_drawing = cols - plot_in_this_stack * cols_needed_box_drawing; for (unsigned j = 0; j < *num_plots; ++j) { if (plot_in_stack[j] == stack_id) { unsigned max_plot_cols = cols_needed_box_drawing + cols_for_line_drawing * num_info_per_plot[j] / lines_to_draw; unsigned plot_cols = max_plot_cols - (max_plot_cols - cols_needed_box_drawing) % num_info_per_plot[j]; plot_positions[num_plot_done].posX = currentPosX; plot_positions[num_plot_done].posY = currentPosY; plot_positions[num_plot_done].sizeX = plot_cols; plot_positions[num_plot_done].sizeY = rows_per_stack; currentPosX += max_plot_cols; num_plot_done++; } } currentPosY += rows_per_stack; currentPosX = 0; } if (process_field_displayed_count(process_displayed) > 0) rows_left_for_process = rows_for_plots - rows_per_stack * num_plot_stacks; } else { // No plot displayed, allocate the leftover space to the processes if (process_field_displayed_count(process_displayed) > 0 && rows_for_plots > 0) rows_for_process += rows_for_plots - 1; } process_position->posX = 0; process_position->posY = rows - rows_for_process - rows_left_for_process; process_position->sizeY = rows_for_process + rows_left_for_process; process_position->sizeX = cols; setup_position->posX = 0; setup_position->posY = rows_for_header; setup_position->sizeY = rows - rows_for_header; setup_position->sizeX = cols; } nvtop-3.2.0/src/interface_options.c000066400000000000000000000506531477175131100173500ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/interface_options.h" #include "ini.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/interface_common.h" #include #include #include #include #include #include #include #include char config_file_path[PATH_MAX]; const char config_file_location[] = "nvtop/interface.ini"; const char config_conf_path[] = ".config"; static const char *default_config_path(void) { char *xdg_config_dir = getenv("XDG_CONFIG_HOME"); size_t conf_path_length = 0; if (!xdg_config_dir) { // XDG config dir not set, default to $HOME/.config xdg_config_dir = getenv("HOME"); if (!xdg_config_dir) return NULL; conf_path_length = sizeof(config_conf_path); } size_t xdg_path_length = strlen(xdg_config_dir); if (xdg_path_length < PATH_MAX - conf_path_length - sizeof(config_file_location)) { strcpy(config_file_path, xdg_config_dir); config_file_path[xdg_path_length] = '/'; if (conf_path_length) { strcpy(config_file_path + xdg_path_length + 1, config_conf_path); config_file_path[xdg_path_length + conf_path_length] = '/'; } strcpy(config_file_path + xdg_path_length + 1 + conf_path_length, config_file_location); return config_file_path; } else { return NULL; } } unsigned interface_check_and_fix_monitored_gpus(unsigned num_devices, struct list_head *monitoredGpu, struct list_head *nonMonitoredGpu, nvtop_interface_option *options) { // The array in options->gpu_specifi_opts is kept in sync with the lists unsigned idx = 0; struct gpu_info *device, *list_tmp; list_for_each_entry_safe(device, list_tmp, monitoredGpu, list) { assert(idx <= num_devices); if (options->gpu_specific_opts[idx].doNotMonitor) { list_move_tail(&device->list, nonMonitoredGpu); nvtop_interface_gpu_opts saveInfo = options->gpu_specific_opts[idx]; memmove(&options->gpu_specific_opts[idx], &options->gpu_specific_opts[idx + 1], (num_devices - idx - 1) * sizeof(*options->gpu_specific_opts)); options->gpu_specific_opts[num_devices - 1] = saveInfo; } else { idx++; } } unsigned numMonitored = idx; list_for_each_entry_safe(device, list_tmp, nonMonitoredGpu, list) { assert(idx <= num_devices); if (!options->gpu_specific_opts[idx].doNotMonitor) { list_move_tail(&device->list, monitoredGpu); nvtop_interface_gpu_opts saveInfo = options->gpu_specific_opts[idx]; for (unsigned nonMonPred = idx; nonMonPred > numMonitored; --nonMonPred) { options->gpu_specific_opts[nonMonPred] = options->gpu_specific_opts[nonMonPred - 1]; } options->gpu_specific_opts[numMonitored] = saveInfo; numMonitored++; } idx++; } assert(idx == num_devices); // We keep at least one monitored gpu at all times if (num_devices > 0 && numMonitored == 0) { assert(list_empty(monitoredGpu)); list_move(&list_first_entry(nonMonitoredGpu, struct gpu_info, list)->list, monitoredGpu); options->gpu_specific_opts[0].doNotMonitor = false; numMonitored++; } list_for_each_entry(device, monitoredGpu, list) { processinfo_enable_disable_callback_for(device, true); } list_for_each_entry(device, nonMonitoredGpu, list) { processinfo_enable_disable_callback_for(device, false); } return numMonitored; } void alloc_interface_options_internals(char *config_location, unsigned num_devices, struct list_head *devices, nvtop_interface_option *options) { options->gpu_specific_opts = calloc(num_devices, sizeof(*options->gpu_specific_opts)); if (!options->gpu_specific_opts) { perror("Cannot allocate memory: "); exit(EXIT_FAILURE); } unsigned idx = 0; struct gpu_info *device; list_for_each_entry(device, devices, list) { options->gpu_specific_opts[idx++].linkedGpu = device; } options->plot_left_to_right = false; options->use_color = true; options->encode_decode_hiding_timer = 30.; options->temperature_in_fahrenheit = false; options->config_file_location = NULL; options->sort_processes_by = process_memory; options->sort_descending_order = true; options->update_interval = 1000; options->process_fields_displayed = 0; options->has_monitored_set_changed = false; options->show_startup_messages = true; options->filter_nvtop_pid = true; options->has_gpu_info_bar = false; if (config_location) { options->config_file_location = malloc(strlen(config_location) + 1); if (!options->config_file_location) { perror("Cannot allocate memory: "); exit(EXIT_FAILURE); } strcpy(options->config_file_location, config_location); } else { const char *default_path = default_config_path(); if (default_path) { options->config_file_location = malloc(strlen(default_path) + 1); if (!options->config_file_location) { perror("Cannot allocate memory: "); exit(EXIT_FAILURE); } strcpy(options->config_file_location, default_path); } } } struct nvtop_option_ini_data { unsigned num_devices; unsigned selectedGpu; nvtop_interface_option *options; }; static const char do_not_modify_notice[] = "; Please do not edit this file.\n" "; The file is automatically generated and modified by nvtop by pressing " "F12.\n" "; If you wish to modify an option, use nvtop's setup window (F2) and " "follow " "up by saving the preference (F12).\n"; static const char general_section[] = "GeneralOption"; static const char general_value_use_color[] = "UseColor"; static const char general_value_update_interval[] = "UpdateInterval"; static const char general_show_messages[] = "ShowInfoMessages"; static const char header_section[] = "HeaderOption"; static const char header_value_use_fahrenheit[] = "UseFahrenheit"; static const char header_value_encode_decode_timer[] = "EncodeHideTimer"; static const char header_value_gpu_info_bar[] = "GPUInfoBar"; static const char chart_section[] = "ChartOption"; static const char chart_value_reverse[] = "ReverseChart"; static const char process_list_section[] = "ProcessListOption"; static const char process_hide_nvtop_process_list[] = "HideNvtopProcessList"; static const char process_hide_nvtop_process[] = "HideNvtopProcess"; static const char process_value_sortby[] = "SortBy"; static const char process_value_display_field[] = "DisplayField"; static const char *process_sortby_vals[process_field_count + 1] = { "pId", "user", "gpuId", "type", "gpuRate", "encRate", "decRate", "memory", "cpuUsage", "cpuMem", "cmdline", "none"}; static const char process_value_sort_order[] = "SortOrder"; static const char process_sort_descending[] = "descending"; static const char process_sort_ascending[] = "ascending"; static const char device_section[] = "Device"; static const char device_pdev[] = "Pdev"; static const char device_monitor[] = "Monitor"; static const char device_shown_value[] = "ShownInfo"; static const char *device_draw_vals[plot_information_count + 1] = { "gpuRate", "gpuMemRate", "encodeRate", "decodeRate", "temperature", "powerDrawRate", "fanSpeed", "gpuClockRate", "gpuMemClockRate", "none"}; static int nvtop_option_ini_handler(void *user, const char *section, const char *name, const char *value) { struct nvtop_option_ini_data *ini_data = (struct nvtop_option_ini_data *)user; // General Options if (strcmp(section, general_section) == 0) { if (strcmp(name, general_value_use_color) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->use_color = true; } if (strcmp(value, "false") == 0) { ini_data->options->use_color = false; } } if (strcmp(name, general_value_update_interval) == 0) { int update_interval; if (sscanf(value, "%d", &update_interval) == 1) ini_data->options->update_interval = update_interval; } if (strcmp(name, general_show_messages) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->show_startup_messages = true; } if (strcmp(value, "false") == 0) { ini_data->options->show_startup_messages = false; } } } // Header Options if (strcmp(section, header_section) == 0) { if (strcmp(name, header_value_use_fahrenheit) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->temperature_in_fahrenheit = true; } if (strcmp(value, "false") == 0) { ini_data->options->temperature_in_fahrenheit = false; } } if (strcmp(name, header_value_encode_decode_timer) == 0) { double value_double; if (sscanf(value, "%le", &value_double) == 1) ini_data->options->encode_decode_hiding_timer = value_double; } if (strcmp(name, header_value_gpu_info_bar) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->has_gpu_info_bar = true; } if (strcmp(value, "false") == 0) { ini_data->options->has_gpu_info_bar = false; } } } // Chart Options if (strcmp(section, chart_section) == 0) { if (strcmp(name, chart_value_reverse) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->plot_left_to_right = true; } if (strcmp(value, "false") == 0) { ini_data->options->plot_left_to_right = false; } } } // Process List Options if (strcmp(section, process_list_section) == 0) { if (strcmp(name, process_hide_nvtop_process_list) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->hide_processes_list = true; } if (strcmp(value, "false") == 0) { ini_data->options->hide_processes_list = false; } } if (strcmp(name, process_hide_nvtop_process) == 0) { if (strcmp(value, "true") == 0) { ini_data->options->filter_nvtop_pid = true; } if (strcmp(value, "false") == 0) { ini_data->options->filter_nvtop_pid = false; } } if (strcmp(name, process_value_sortby) == 0) { for (enum process_field i = process_pid; i < process_field_count; ++i) { if (strcmp(value, process_sortby_vals[i]) == 0) { ini_data->options->sort_processes_by = i; } } } if (strcmp(name, process_value_display_field) == 0) { for (enum process_field i = process_pid; i < process_field_count + 1; ++i) { if (strcmp(value, process_sortby_vals[i]) == 0) { ini_data->options->process_fields_displayed = process_add_field_to_display(i, ini_data->options->process_fields_displayed); ini_data->options->process_fields_displayed = process_add_field_to_display(process_field_count, ini_data->options->process_fields_displayed); } } } if (strcmp(name, process_value_sort_order) == 0) { if (strcmp(value, process_sort_descending) == 0) { ini_data->options->sort_descending_order = true; } if (strcmp(value, process_sort_ascending) == 0) { ini_data->options->sort_descending_order = false; } } } // Per-Device Sections if (strcmp(section, device_section) == 0) { if (strcmp(name, device_pdev) == 0) { ini_data->selectedGpu = ini_data->num_devices; for (unsigned i = 0; i < ini_data->num_devices; ++i) { if (strcmp(ini_data->options->gpu_specific_opts[i].linkedGpu->pdev, value) == 0) { ini_data->selectedGpu = i; break; } } } if (ini_data->selectedGpu < ini_data->num_devices) { if (strcmp(name, device_shown_value) == 0) { for (enum plot_information j = plot_gpu_rate; j < plot_information_count + 1; ++j) { if (strcmp(value, device_draw_vals[j]) == 0) { ini_data->options->gpu_specific_opts[ini_data->selectedGpu].to_draw = plot_add_draw_info(j, ini_data->options->gpu_specific_opts[ini_data->selectedGpu].to_draw); ini_data->options->gpu_specific_opts[ini_data->selectedGpu].to_draw = plot_add_draw_info( plot_information_count, ini_data->options->gpu_specific_opts[ini_data->selectedGpu].to_draw); } } } if (strcmp(name, device_monitor) == 0) { if (strcmp(value, "true") == 0) ini_data->options->gpu_specific_opts[ini_data->selectedGpu].doNotMonitor = false; if (strcmp(value, "false") == 0) ini_data->options->gpu_specific_opts[ini_data->selectedGpu].doNotMonitor = true; } } } return 1; } bool load_interface_options_from_config_file(unsigned num_devices, nvtop_interface_option *options) { FILE *option_file = fopen(options->config_file_location, "r"); if (!option_file) return false; struct nvtop_option_ini_data ini_data = {num_devices, num_devices, options}; int retval = ini_parse_file(option_file, nvtop_option_ini_handler, &ini_data); fclose(option_file); if (!process_is_field_displayed(options->sort_processes_by, options->process_fields_displayed)) { options->sort_processes_by = process_default_sort_by_from(options->process_fields_displayed); } return retval >= 0; } static bool create_config_directory_rec(char *config_directory) { for (char *index = config_directory + 1; *index != '\0'; ++index) { if (*index == '/') { *index = '\0'; if (mkdir(config_directory, S_IRWXU | S_IRGRP | S_IXGRP | S_IROTH | S_IXOTH)) { if (errno != EEXIST) { char *error_str = strerror(errno); fprintf(stderr, "Could not create directory \"%s\": %s\n", config_directory, error_str); return false; } } *index = '/'; } } if (mkdir(config_directory, S_IRWXU | S_IRGRP | S_IXGRP | S_IROTH | S_IXOTH)) { if (errno != EEXIST) { char *error_str = strerror(errno); fprintf(stderr, "Could not create directory \"%s\": %s\n", config_directory, error_str); return false; } } return true; } static const char *boolean_string(bool value) { return value ? "true" : "false"; } bool save_interface_options_to_config_file(unsigned total_dev_count, const nvtop_interface_option *options) { if (!options->config_file_location) return false; char folder_path[PATH_MAX]; strcpy(folder_path, options->config_file_location); char *config_directory = dirname(folder_path); if (!create_config_directory_rec(config_directory)) return false; FILE *config_file = fopen(options->config_file_location, "w"); if (!config_file) { char *error_str = strerror(errno); fprintf(stderr, "Could not create config file \"%s\": %s\n", options->config_file_location, error_str); return false; } fprintf(config_file, "%s", do_not_modify_notice); // General Options fprintf(config_file, "[%s]\n", general_section); fprintf(config_file, "%s = %s\n", general_value_use_color, boolean_string(options->use_color)); fprintf(config_file, "%s = %d\n", general_value_update_interval, options->update_interval); fprintf(config_file, "%s = %s\n", general_show_messages, boolean_string(options->show_startup_messages)); // Header Options fprintf(config_file, "\n[%s]\n", header_section); fprintf(config_file, "%s = %s\n", header_value_use_fahrenheit, boolean_string(options->temperature_in_fahrenheit)); fprintf(config_file, "%s = %e\n", header_value_encode_decode_timer, options->encode_decode_hiding_timer); fprintf(config_file, "%s = %s\n", header_value_gpu_info_bar, boolean_string(options->has_gpu_info_bar)); // Chart Options fprintf(config_file, "\n[%s]\n", chart_section); fprintf(config_file, "%s = %s\n", chart_value_reverse, boolean_string(options->plot_left_to_right)); // Process Options fprintf(config_file, "\n[%s]\n", process_list_section); fprintf(config_file, "%s = %s\n", process_hide_nvtop_process_list, boolean_string(options->hide_processes_list)); fprintf(config_file, "%s = %s\n", process_hide_nvtop_process, boolean_string(options->filter_nvtop_pid)); fprintf(config_file, "%s = %s\n", process_value_sort_order, options->sort_descending_order ? process_sort_descending : process_sort_ascending); fprintf(config_file, "%s = %s\n", process_value_sortby, process_sortby_vals[options->sort_processes_by]); bool display_any_field = false; for (enum process_field field = process_pid; field < process_field_count; ++field) { if (process_is_field_displayed(field, options->process_fields_displayed)) { fprintf(config_file, "%s = %s\n", process_value_display_field, process_sortby_vals[field]); display_any_field = true; } } if (!display_any_field) fprintf(config_file, "%s = %s\n", process_value_display_field, process_sortby_vals[process_field_count]); // Per-Device Sections for (unsigned i = 0; i < total_dev_count; ++i) { fprintf(config_file, "\n[%s]\n", device_section); fprintf(config_file, "%s = %s\n", device_pdev, options->gpu_specific_opts[i].linkedGpu->pdev); fprintf(config_file, "%s = %s\n", device_monitor, boolean_string(!options->gpu_specific_opts[i].doNotMonitor)); bool draw_any = false; for (enum plot_information j = plot_gpu_rate; j < plot_information_count; ++j) { if (plot_isset_draw_info(j, options->gpu_specific_opts[i].to_draw)) { fprintf(config_file, "%s = %s\n", device_shown_value, device_draw_vals[j]); draw_any = true; } } if (!draw_any) fprintf(config_file, "%s = %s\n", device_shown_value, device_draw_vals[plot_information_count]); fprintf(config_file, "\n"); } fclose(config_file); return true; } extern inline plot_info_to_draw plot_add_draw_info(enum plot_information set_info, plot_info_to_draw to_draw); extern inline plot_info_to_draw plot_remove_draw_info(enum plot_information set_info, plot_info_to_draw to_draw); extern inline plot_info_to_draw plot_default_draw_info(void); extern inline bool plot_isset_draw_info(enum plot_information check_info, plot_info_to_draw to_draw); extern inline unsigned plot_count_draw_info(plot_info_to_draw to_draw); extern inline bool process_is_field_displayed(enum process_field field, process_field_displayed cols_displayed); extern inline process_field_displayed process_remove_field_to_display(enum process_field field, process_field_displayed cols_displayed); extern inline process_field_displayed process_add_field_to_display(enum process_field field, process_field_displayed cols_displayed); extern inline process_field_displayed process_default_displayed_field(void); extern inline unsigned process_field_displayed_count(process_field_displayed fields_displayed); enum process_field process_default_sort_by_from(process_field_displayed fields_displayed) { if (process_is_field_displayed(process_memory, fields_displayed)) return process_memory; if (process_is_field_displayed(process_cpu_mem_usage, fields_displayed)) return process_cpu_mem_usage; if (process_is_field_displayed(process_gpu_rate, fields_displayed)) return process_gpu_rate; if (process_is_field_displayed(process_cpu_usage, fields_displayed)) return process_cpu_usage; if (process_is_field_displayed(process_command, fields_displayed)) return process_command; if (process_is_field_displayed(process_type, fields_displayed)) return process_type; if (process_is_field_displayed(process_enc_rate, fields_displayed)) return process_enc_rate; if (process_is_field_displayed(process_dec_rate, fields_displayed)) return process_dec_rate; if (process_is_field_displayed(process_user, fields_displayed)) return process_user; if (process_is_field_displayed(process_gpu_id, fields_displayed)) return process_gpu_id; if (process_is_field_displayed(process_pid, fields_displayed)) return process_pid; return process_field_count; } nvtop-3.2.0/src/interface_ring_buffer.c000066400000000000000000000040701477175131100201350ustar00rootroot00000000000000 #include "nvtop/interface_ring_buffer.h" #include "stdio.h" #include "stdlib.h" void interface_alloc_ring_buffer(unsigned devices_count, unsigned per_device_data_saved, unsigned buffer_size, interface_ring_buffer *ring_buffer) { ring_buffer->ring_buffer[0] = calloc(1, sizeof(unsigned[devices_count][per_device_data_saved][2])); if (!ring_buffer->ring_buffer[0]) { perror("Cannot allocate memory: "); exit(EXIT_FAILURE); } ring_buffer->ring_buffer[1] = malloc(sizeof(unsigned[devices_count][per_device_data_saved][buffer_size])); if (!ring_buffer->ring_buffer[1]) { perror("Cannot allocate memory: "); exit(EXIT_FAILURE); } ring_buffer->buffer_size = buffer_size; ring_buffer->per_device_data_saved = per_device_data_saved; ring_buffer->monitored_dev_count = devices_count; } void interface_free_ring_buffer(interface_ring_buffer *buffer) { free(buffer->ring_buffer[0]); free(buffer->ring_buffer[1]); } extern inline unsigned interface_ring_buffer_data_stored(const interface_ring_buffer *buff, unsigned device, unsigned which_data); extern inline unsigned interface_index_in_ring(const interface_ring_buffer *buff, unsigned device, unsigned which_data, unsigned index); extern inline unsigned interface_ring_buffer_get(const interface_ring_buffer *buff, unsigned device, unsigned which_data, unsigned index); extern inline void interface_ring_buffer_push(interface_ring_buffer *buff, unsigned device, unsigned which_data, unsigned value); extern inline void interface_ring_buffer_pop(interface_ring_buffer *buff, unsigned device, unsigned which_data); extern inline void interface_ring_buffer_empty_select(interface_ring_buffer *buff, unsigned device, unsigned which_data); extern inline void interface_ring_buffer_empty(interface_ring_buffer *buff, unsigned device); nvtop-3.2.0/src/interface_setup_win.c000066400000000000000000001162001477175131100176610ustar00rootroot00000000000000/* * * Copyright (C) 2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/interface_setup_win.h" #include "nvtop/interface.h" #include "nvtop/interface_internal_common.h" #include "nvtop/interface_options.h" #include "nvtop/interface_ring_buffer.h" #include static char *setup_window_category_names[setup_window_selection_count] = {"General", "Devices", "Chart", "Processes", "GPU Select"}; // All the windows used to display the setup enum setup_window_type { setup_window_type_setup, setup_window_type_single, setup_window_type_split_left, setup_window_type_split_right, setup_window_type_count }; // General Options enum setup_general_options { setup_general_color, setup_general_show_startup_support_messages, setup_general_update_interval, setup_general_options_count }; static const char *setup_general_option_description[setup_general_options_count] = { "Disable color (requires save and restart)", "Show support messages on startup", "Update interval (seconds)"}; // Header Options enum setup_header_options { setup_header_toggle_fahrenheit, setup_header_enc_dec_timer, setup_header_gpu_info_bar, setup_header_options_count }; static const char *setup_header_option_descriptions[setup_header_options_count] = { "Temperature in fahrenheit", "Keep displaying Encoder/Decoder rate (after reaching an idle state)", "Display extra GPU info bar"}; // Chart Options enum setup_chart_options { setup_chart_reverse, setup_chart_all_gpu, setup_chart_start_gpu_list, setup_chart_options_count }; static const char *setup_chart_options_descriptions[setup_chart_options_count] = { "Reverse plot direction", "Displayed all GPUs", "Displayed GPU"}; static const char *setup_chart_gpu_value_descriptions[plot_information_count] = { "GPU utilization rate", "GPU memory utilization rate", "GPU encoder rate", "GPU decoder rate", "GPU temperature", "Power draw rate (current/max)", "Fan speed", "GPU clock rate", "GPU memory clock rate"}; // Process List Options enum setup_proc_list_options { setup_proc_list_hide_process_list, setup_proc_list_hide_nvtop_process, setup_proc_list_sort_ascending, setup_proc_list_sort_by, setup_proc_list_display, setup_proc_list_options_count }; static const char *setup_proc_list_option_description[setup_proc_list_options_count] = { "Don't display the process list", "Hide nvtop in the process list", "Sort Ascending", "Sort by", "Field Displayed"}; static const char *setup_proc_list_value_descriptions[process_field_count] = { "Process Id", "User name", "Device Id", "Workload type", "GPU usage", "Encoder usage", "Decoder usage", "GPU memory usage", "CPU usage", "CPU memory usage", "Command"}; static unsigned int sizeof_setup_windows[setup_window_type_count] = {[setup_window_type_setup] = 11, [setup_window_type_single] = 0, [setup_window_type_split_left] = 26, [setup_window_type_split_right] = 0}; // For toggle options // Show * if on, - if partial and nothing if off enum option_state { option_off, option_on, option_partially_active, }; static char option_state_char(enum option_state state) { switch (state) { case option_on: return '*'; case option_partially_active: return '-'; case option_off: return ' '; default: return ' '; } } void alloc_setup_window(struct window_position *position, struct setup_window *setup_win) { setup_win->visible = false; setup_win->clean_space = newwin(position->sizeY, position->sizeX, position->posY, position->posX); sizeof_setup_windows[setup_window_type_single] = position->sizeX - sizeof_setup_windows[setup_window_type_setup] - 1; if (sizeof_setup_windows[setup_window_type_single] > position->sizeX) sizeof_setup_windows[setup_window_type_single] = 0; sizeof_setup_windows[setup_window_type_split_right] = position->sizeX - sizeof_setup_windows[setup_window_type_setup] - sizeof_setup_windows[setup_window_type_split_left] - 2; if (sizeof_setup_windows[setup_window_type_split_right] > position->sizeX) sizeof_setup_windows[setup_window_type_split_right] = 0; setup_win->setup = newwin(position->sizeY, sizeof_setup_windows[setup_window_type_setup], position->posY, position->posX); setup_win->single = newwin(position->sizeY, sizeof_setup_windows[setup_window_type_single], position->posY, position->posX + sizeof_setup_windows[setup_window_type_setup] + 1); setup_win->split[0] = newwin(position->sizeY, sizeof_setup_windows[setup_window_type_split_left], position->posY, position->posX + sizeof_setup_windows[setup_window_type_setup] + 1); setup_win->split[1] = newwin(position->sizeY, sizeof_setup_windows[setup_window_type_split_right], position->posY, position->posX + sizeof_setup_windows[setup_window_type_setup] + sizeof_setup_windows[setup_window_type_split_left] + 2); } void free_setup_window(struct setup_window *setup_win) { delwin(setup_win->clean_space); delwin(setup_win->setup); delwin(setup_win->single); delwin(setup_win->split[0]); delwin(setup_win->split[1]); } void show_setup_window(struct nvtop_interface *interface) { interface->setup_win.visible = true; touchwin(interface->setup_win.clean_space); wnoutrefresh(interface->setup_win.clean_space); interface->setup_win.selected_section = setup_general_selected; interface->setup_win.indentation_level = 0; interface->setup_win.options_selected[0] = 0; interface->setup_win.options_selected[1] = 0; } void hide_setup_window(struct nvtop_interface *interface) { interface->setup_win.visible = false; } static void draw_setup_window_setup(struct nvtop_interface *interface) { werase(interface->setup_win.setup); mvwprintw(interface->setup_win.setup, 0, 0, "Setup"); mvwchgat(interface->setup_win.setup, 0, 0, sizeof_setup_windows[setup_window_type_setup], A_STANDOUT, green_color, NULL); for (enum setup_window_section category = setup_general_selected; category < setup_window_selection_count; ++category) { mvwprintw(interface->setup_win.setup, category + 1, 0, "%s", setup_window_category_names[category]); if (interface->setup_win.selected_section == category) { if (interface->setup_win.indentation_level == 0) { set_attribute_between(interface->setup_win.setup, category + 1, 0, sizeof_setup_windows[setup_window_type_setup], A_STANDOUT, cyan_color); } else { mvwprintw(interface->setup_win.setup, category + 1, sizeof_setup_windows[setup_window_type_setup] - 1, ">"); set_attribute_between(interface->setup_win.setup, category + 1, 0, sizeof_setup_windows[setup_window_type_setup], A_BOLD, cyan_color); } } } wnoutrefresh(interface->setup_win.setup); } static void draw_setup_window_general(struct nvtop_interface *interface) { if (interface->setup_win.indentation_level > 1) interface->setup_win.indentation_level = 1; if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] >= setup_general_options_count) interface->setup_win.options_selected[0] = setup_general_options_count - 1; wattr_set(interface->setup_win.single, A_STANDOUT, green_color, NULL); mvwprintw(interface->setup_win.single, 0, 0, "General Options"); wstandend(interface->setup_win.single); unsigned int cur_col, maxcols, tmp; (void)tmp; getmaxyx(interface->setup_win.single, tmp, maxcols); getyx(interface->setup_win.single, tmp, cur_col); mvwchgat(interface->setup_win.single, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); enum option_state option_state = !interface->options.use_color; mvwprintw(interface->setup_win.single, setup_general_color + 1, 0, "[%c] %s", option_state_char(option_state), setup_general_option_description[setup_general_color]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_general_color) { mvwchgat(interface->setup_win.single, setup_general_color + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } option_state = interface->options.show_startup_messages; mvwprintw(interface->setup_win.single, setup_general_show_startup_support_messages + 1, 0, "[%c] %s", option_state_char(option_state), setup_general_option_description[setup_general_show_startup_support_messages]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_general_show_startup_support_messages) { mvwchgat(interface->setup_win.single, setup_general_show_startup_support_messages + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } int update_deciseconds = (interface->options.update_interval / 100) % 10; int update_seconds = interface->options.update_interval / 1000; mvwprintw(interface->setup_win.single, setup_general_update_interval + 1, 0, "[%2u.%u] %s", update_seconds, update_deciseconds, setup_general_option_description[setup_general_update_interval]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_general_update_interval) { mvwchgat(interface->setup_win.single, setup_general_update_interval + 1, 0, 6, A_STANDOUT, cyan_color, NULL); } wnoutrefresh(interface->setup_win.single); } static void draw_setup_window_header(struct nvtop_interface *interface) { if (interface->setup_win.indentation_level > 1) interface->setup_win.indentation_level = 1; if (interface->setup_win.options_selected[0] >= setup_header_options_count) interface->setup_win.options_selected[0] = setup_header_options_count - 1; WINDOW *options_win = interface->setup_win.single; wattr_set(options_win, A_STANDOUT, green_color, NULL); mvwprintw(options_win, 0, 0, "Devices Display Options"); wstandend(options_win); unsigned int cur_col, maxcols, tmp; (void)tmp; getmaxyx(options_win, tmp, maxcols); getyx(options_win, tmp, cur_col); mvwchgat(options_win, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); enum option_state option_state; // Fahrenheit Option option_state = interface->options.temperature_in_fahrenheit; mvwprintw(options_win, setup_header_toggle_fahrenheit + 1, 0, "[%c] %s", option_state_char(option_state), setup_header_option_descriptions[setup_header_toggle_fahrenheit]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_header_toggle_fahrenheit) { mvwchgat(options_win, setup_header_toggle_fahrenheit + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } // Encode/Decode hiding timer if (interface->options.encode_decode_hiding_timer > 0) { mvwprintw(options_win, setup_header_enc_dec_timer + 1, 0, "[%3.0fsec] %s", interface->options.encode_decode_hiding_timer, setup_header_option_descriptions[setup_header_enc_dec_timer]); } else { mvwprintw(options_win, setup_header_enc_dec_timer + 1, 0, "[always] %s", setup_header_option_descriptions[setup_header_enc_dec_timer]); } if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_header_enc_dec_timer) { mvwchgat(options_win, setup_header_enc_dec_timer + 1, 0, 8, A_STANDOUT, cyan_color, NULL); } // Extra GPU info bar option_state = interface->options.has_gpu_info_bar; mvwprintw(options_win, setup_header_gpu_info_bar + 1, 0, "[%c] %s", option_state_char(option_state), setup_header_option_descriptions[setup_header_gpu_info_bar]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_header_gpu_info_bar) { mvwchgat(options_win, setup_header_gpu_info_bar + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } wnoutrefresh(options_win); } static void draw_setup_window_chart(unsigned devices_count, struct list_head *devices, struct nvtop_interface *interface) { WINDOW *option_list_win; // Fix indices for this window if (interface->setup_win.options_selected[0] > devices_count + 1) interface->setup_win.options_selected[0] = devices_count + 1; if (interface->setup_win.options_selected[0] > 0) { if (interface->setup_win.options_selected[1] >= plot_information_count) interface->setup_win.options_selected[1] = plot_information_count - 1; option_list_win = interface->setup_win.split[0]; } else { if (interface->setup_win.indentation_level > 1) interface->setup_win.indentation_level = 1; option_list_win = interface->setup_win.single; } werase(interface->setup_win.single); wnoutrefresh(interface->setup_win.single); touchwin(interface->setup_win.split[0]); touchwin(interface->setup_win.split[1]); wattr_set(option_list_win, A_STANDOUT, green_color, NULL); mvwprintw(option_list_win, 0, 0, "Chart Options"); wstandend(option_list_win); unsigned int cur_col, maxcols, tmp; (void)tmp; getmaxyx(option_list_win, tmp, maxcols); getyx(option_list_win, tmp, cur_col); mvwchgat(option_list_win, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); enum option_state option_state; // Reverse plot option_state = interface->options.plot_left_to_right; mvwprintw(option_list_win, setup_chart_reverse + 1, 0, "[%c] %s", option_state_char(option_state), setup_chart_options_descriptions[setup_chart_reverse]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_chart_reverse) { mvwchgat(option_list_win, setup_chart_reverse + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } // Set for all GPUs at once if (interface->setup_win.options_selected[0] == setup_chart_all_gpu) { if (interface->setup_win.indentation_level == 1) wattr_set(option_list_win, A_STANDOUT, cyan_color, NULL); if (interface->setup_win.indentation_level == 2) wattr_set(option_list_win, A_BOLD, cyan_color, NULL); } mvwaddch(option_list_win, setup_chart_all_gpu + 1, 1, ACS_HLINE); waddch(option_list_win, '>'); wstandend(option_list_win); wprintw(option_list_win, " %s", setup_chart_options_descriptions[setup_chart_all_gpu]); // GPUs as a list for (unsigned i = 0; i < devices_count; ++i) { if (interface->setup_win.options_selected[0] == setup_chart_start_gpu_list + i) { if (interface->setup_win.indentation_level == 1) wattr_set(option_list_win, A_STANDOUT, cyan_color, NULL); if (interface->setup_win.indentation_level == 2) wattr_set(option_list_win, A_BOLD, cyan_color, NULL); } mvwaddch(option_list_win, setup_chart_start_gpu_list + 1 + i, 1, ACS_HLINE); waddch(option_list_win, '>'); wstandend(option_list_win); wprintw(option_list_win, " %s %u", setup_chart_options_descriptions[setup_chart_start_gpu_list], i); } wnoutrefresh(option_list_win); // Window of list of metric to display in chart (4 maximum) if (interface->setup_win.options_selected[0] >= setup_chart_all_gpu) { WINDOW *value_list_win = interface->setup_win.split[1]; wattr_set(value_list_win, A_STANDOUT, green_color, NULL); mvwprintw(value_list_win, 0, 0, "Metric Displayed in Graph"); getmaxyx(value_list_win, tmp, maxcols); unsigned selected_gpu = interface->setup_win.options_selected[0] - setup_chart_start_gpu_list; if (interface->setup_win.options_selected[0] == setup_chart_all_gpu) { wprintw(value_list_win, " (All GPUs)"); } else { // Get the selected device struct gpu_info *device; unsigned index = 0; list_for_each_entry(device, devices, list) { if (index == selected_gpu) break; index++; } if (IS_VALID(gpuinfo_device_name_valid, device->static_info.valid)) { getyx(value_list_win, tmp, cur_col); wprintw(value_list_win, " (%.*s)", maxcols - cur_col - 3, device->static_info.device_name); } else wprintw(value_list_win, " (GPU %u)", selected_gpu); } wclrtoeol(value_list_win); getyx(value_list_win, tmp, cur_col); mvwchgat(value_list_win, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); wattr_set(value_list_win, A_NORMAL, magenta_color, NULL); mvwprintw(value_list_win, 1, 0, "Maximum of 4 metrics per GPU"); wstandend(value_list_win); for (enum plot_information i = plot_gpu_rate; i < plot_information_count; ++i) { if (interface->setup_win.options_selected[0] == setup_chart_all_gpu) { plot_info_to_draw draw_union = 0, draw_intersection = 0xffff; for (unsigned j = 0; j < devices_count; ++j) { draw_union |= interface->options.gpu_specific_opts[j].to_draw; draw_intersection = draw_intersection & interface->options.gpu_specific_opts[j].to_draw; } if (plot_isset_draw_info(i, draw_intersection)) { option_state = option_on; } else { if (plot_isset_draw_info(i, draw_union)) option_state = option_partially_active; else option_state = option_off; } } else { option_state = plot_isset_draw_info(i, interface->options.gpu_specific_opts[selected_gpu].to_draw); } mvwprintw(value_list_win, i + 2, 0, "[%c] %s", option_state_char(option_state), setup_chart_gpu_value_descriptions[i]); if (interface->setup_win.indentation_level == 2 && interface->setup_win.options_selected[1] == i) { mvwchgat(value_list_win, i + 2, 0, 3, A_STANDOUT, cyan_color, NULL); } } wnoutrefresh(value_list_win); } } static void draw_setup_window_proc_list(struct nvtop_interface *interface) { WINDOW *option_list_win; if (interface->setup_win.options_selected[0] >= setup_proc_list_options_count) interface->setup_win.options_selected[0] = setup_proc_list_options_count - 1; if (interface->setup_win.options_selected[0] < setup_proc_list_sort_by) { option_list_win = interface->setup_win.single; if (interface->setup_win.indentation_level > 1) interface->setup_win.indentation_level = 1; } else { option_list_win = interface->setup_win.split[0]; if (interface->setup_win.options_selected[0] == setup_proc_list_sort_by) { unsigned fields_count = process_field_displayed_count(interface->options.process_fields_displayed); if (!fields_count) { if (interface->setup_win.indentation_level > 1) interface->setup_win.indentation_level = 1; } else { if (interface->setup_win.options_selected[1] >= fields_count) interface->setup_win.options_selected[1] = fields_count - 1; } } if (interface->setup_win.options_selected[0] == setup_proc_list_display) { if (interface->setup_win.options_selected[1] >= process_field_count) interface->setup_win.options_selected[1] = process_field_count - 1; } } werase(interface->setup_win.single); wnoutrefresh(interface->setup_win.single); touchwin(interface->setup_win.split[0]); touchwin(interface->setup_win.split[1]); wattr_set(option_list_win, A_STANDOUT, green_color, NULL); mvwprintw(option_list_win, 0, 0, "Process List Options"); wstandend(option_list_win); unsigned int cur_col, maxcols, tmp; (void)tmp; getmaxyx(option_list_win, tmp, maxcols); getyx(option_list_win, tmp, cur_col); mvwchgat(option_list_win, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); // Sort Ascending enum option_state option_state = interface->options.hide_processes_list; mvwprintw(option_list_win, setup_proc_list_hide_process_list + 1, 0, "[%c] %s", option_state_char(option_state), setup_proc_list_option_description[setup_proc_list_hide_process_list]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_proc_list_hide_process_list) { mvwchgat(option_list_win, setup_proc_list_hide_process_list + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } option_state = interface->options.filter_nvtop_pid; mvwprintw(option_list_win, setup_proc_list_hide_nvtop_process + 1, 0, "[%c] %s", option_state_char(option_state), setup_proc_list_option_description[setup_proc_list_hide_nvtop_process]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_proc_list_hide_nvtop_process) { mvwchgat(option_list_win, setup_proc_list_hide_nvtop_process + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } option_state = !interface->options.sort_descending_order; mvwprintw(option_list_win, setup_proc_list_sort_ascending + 1, 0, "[%c] %s", option_state_char(option_state), setup_proc_list_option_description[setup_proc_list_sort_ascending]); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == setup_proc_list_sort_ascending) { mvwchgat(option_list_win, setup_proc_list_sort_ascending + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } for (enum setup_proc_list_options i = setup_proc_list_sort_by; i < setup_proc_list_options_count; ++i) { if (interface->setup_win.options_selected[0] == i) { if (interface->setup_win.indentation_level == 1) wattr_set(option_list_win, A_STANDOUT, cyan_color, NULL); if (interface->setup_win.indentation_level == 2) wattr_set(option_list_win, A_BOLD, cyan_color, NULL); } mvwaddch(option_list_win, i + 1, 1, ACS_HLINE); waddch(option_list_win, '>'); wstandend(option_list_win); wprintw(option_list_win, " %s", setup_proc_list_option_description[i]); wnoutrefresh(option_list_win); } if (interface->setup_win.options_selected[0] >= setup_proc_list_sort_by) { WINDOW *value_list_win = interface->setup_win.split[1]; // Sort by if (interface->setup_win.options_selected[0] == setup_proc_list_sort_by) { wattr_set(value_list_win, A_STANDOUT, green_color, NULL); mvwprintw(value_list_win, 0, 0, "Processes are sorted by:"); wstandend(value_list_win); wclrtoeol(value_list_win); getmaxyx(value_list_win, tmp, maxcols); getyx(value_list_win, tmp, cur_col); mvwchgat(value_list_win, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); unsigned index = 0; for (enum process_field field = process_pid; field < process_field_count; ++field) { if (process_is_field_displayed(field, interface->options.process_fields_displayed)) { option_state = interface->options.sort_processes_by == field; mvwprintw(value_list_win, index + 1, 0, "[%c] %s", option_state_char(option_state), setup_proc_list_value_descriptions[field]); wclrtoeol(value_list_win); if (interface->setup_win.indentation_level == 2 && interface->setup_win.options_selected[1] == index) { mvwchgat(value_list_win, index + 1, 0, 3, A_STANDOUT, cyan_color, NULL); wmove(value_list_win, field + 2, 0); } index++; } } if (!index) { // Nothing displayed wcolor_set(value_list_win, magenta_color, NULL); mvwprintw(value_list_win, 1, 0, "Nothing to sort: none of the process fields are displayed"); wstandend(value_list_win); } } // Process field displayed if (interface->setup_win.options_selected[0] == setup_proc_list_display) { wattr_set(value_list_win, A_STANDOUT, green_color, NULL); mvwprintw(value_list_win, 0, 0, "Process Field Displayed:"); wstandend(value_list_win); wclrtoeol(value_list_win); getmaxyx(value_list_win, tmp, maxcols); getyx(value_list_win, tmp, cur_col); mvwchgat(value_list_win, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); for (enum process_field field = process_pid; field < process_field_count; ++field) { option_state = process_is_field_displayed(field, interface->options.process_fields_displayed); mvwprintw(value_list_win, field + 1, 0, "[%c] %s", option_state_char(option_state), setup_proc_list_value_descriptions[field]); wclrtoeol(value_list_win); if (interface->setup_win.indentation_level == 2 && interface->setup_win.options_selected[1] == field) { mvwchgat(value_list_win, field + 1, 0, 3, A_STANDOUT, cyan_color, NULL); wmove(value_list_win, field + 2, 0); } } } wclrtobot(value_list_win); wnoutrefresh(value_list_win); } } static void draw_setup_window_gpu_select(struct nvtop_interface *interface) { if (interface->setup_win.indentation_level > 1) interface->setup_win.indentation_level = 1; if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] >= interface->total_dev_count) interface->setup_win.options_selected[0] = interface->total_dev_count - 1; wattr_set(interface->setup_win.single, A_STANDOUT, green_color, NULL); mvwprintw(interface->setup_win.single, 0, 0, "Select Monitored GPUs"); wstandend(interface->setup_win.single); unsigned int cur_col, maxcols, tmp; (void)tmp; getmaxyx(interface->setup_win.single, tmp, maxcols); getyx(interface->setup_win.single, tmp, cur_col); mvwchgat(interface->setup_win.single, 0, cur_col, maxcols - cur_col, A_STANDOUT, green_color, NULL); for (unsigned devId = 0; devId < interface->total_dev_count; ++devId) { mvwprintw(interface->setup_win.single, devId + 1, 0, "[%c] %s", option_state_char(!interface->options.gpu_specific_opts[devId].doNotMonitor), interface->options.gpu_specific_opts[devId].linkedGpu->static_info.device_name); if (interface->setup_win.indentation_level == 1 && interface->setup_win.options_selected[0] == devId) mvwchgat(interface->setup_win.single, devId + 1, 0, 3, A_STANDOUT, cyan_color, NULL); } wnoutrefresh(interface->setup_win.single); } static const char *setup_window_shortcuts[] = {"Enter", "ESC", "Arrow keys", "+/-", "F12"}; static const char *setup_window_shortcut_description[] = {"Toggle", "Exit", "Navigate Menu", "Increment/Decrement Values", "Save Config"}; void draw_setup_window_shortcuts(struct nvtop_interface *interface) { WINDOW *window = interface->shortcut_window; wmove(window, 0, 0); for (size_t i = 0; i < ARRAY_SIZE(setup_window_shortcuts); ++i) { wprintw(window, "%s", setup_window_shortcuts[i]); wattr_set(window, A_STANDOUT, cyan_color, NULL); wprintw(window, "%s ", setup_window_shortcut_description[i]); wstandend(window); } wclrtoeol(window); unsigned int cur_col, tmp; (void)tmp; getyx(window, tmp, cur_col); mvwchgat(window, 0, cur_col, -1, A_STANDOUT, cyan_color, NULL); wnoutrefresh(window); } void draw_setup_window(unsigned devices_count, struct list_head *devices, struct nvtop_interface *interface) { draw_setup_window_setup(interface); switch (interface->setup_win.selected_section) { case setup_general_selected: draw_setup_window_general(interface); break; case setup_header_selected: draw_setup_window_header(interface); break; case setup_chart_selected: draw_setup_window_chart(devices_count, devices, interface); break; case setup_process_list_selected: draw_setup_window_proc_list(interface); break; case setup_monitored_gpu_list_selected: draw_setup_window_gpu_select(interface); break; default: break; } } void handle_setup_win_keypress(int keyId, struct nvtop_interface *interface) { if (interface->setup_win.visible) { switch (keyId) { case 'l': case KEY_RIGHT: if (interface->setup_win.indentation_level < 2) interface->setup_win.indentation_level++; break; case 'h': case KEY_LEFT: if (interface->setup_win.indentation_level > 0) interface->setup_win.indentation_level--; break; case 'k': case KEY_UP: if (interface->setup_win.indentation_level == 0) { if (interface->setup_win.selected_section != setup_general_selected) { interface->setup_win.selected_section--; interface->setup_win.options_selected[0] = 0; interface->setup_win.options_selected[1] = 0; werase(interface->setup_win.single); werase(interface->setup_win.split[0]); werase(interface->setup_win.split[1]); wnoutrefresh(interface->setup_win.single); } } else { if (interface->setup_win.indentation_level == 1) interface->setup_win.options_selected[1] = 0; if (interface->setup_win.options_selected[interface->setup_win.indentation_level - 1] != 0) interface->setup_win.options_selected[interface->setup_win.indentation_level - 1]--; } break; case 'j': case KEY_DOWN: if (interface->setup_win.indentation_level == 0) { if (interface->setup_win.selected_section + 1 != setup_window_selection_count) { interface->setup_win.selected_section++; interface->setup_win.options_selected[0] = 0; interface->setup_win.options_selected[1] = 0; werase(interface->setup_win.single); werase(interface->setup_win.split[0]); werase(interface->setup_win.split[1]); wnoutrefresh(interface->setup_win.single); } } else { if (interface->setup_win.indentation_level == 1) interface->setup_win.options_selected[1] = 0; interface->setup_win.options_selected[interface->setup_win.indentation_level - 1]++; } break; case '+': // General Options if (interface->setup_win.selected_section == setup_general_selected) { if (interface->setup_win.options_selected[0] == setup_general_update_interval) { if (interface->options.update_interval <= 99800) interface->options.update_interval += 100; } } // Header options if (interface->setup_win.selected_section == setup_header_selected) { if (interface->setup_win.indentation_level == 1) { if (interface->setup_win.options_selected[0] == setup_header_enc_dec_timer) { interface->options.encode_decode_hiding_timer += 5.; } } } break; case '-': // General Options if (interface->setup_win.selected_section == setup_general_selected) { if (interface->setup_win.options_selected[0] == setup_general_update_interval) { if (interface->options.update_interval >= 200) interface->options.update_interval -= 100; } } // Header options if (interface->setup_win.selected_section == setup_header_selected) { if (interface->setup_win.indentation_level == 1) { if (interface->setup_win.options_selected[0] == setup_header_enc_dec_timer) { interface->options.encode_decode_hiding_timer -= 5.; if (interface->options.encode_decode_hiding_timer < 0.) { interface->options.encode_decode_hiding_timer = 0.; } } } } break; case '\n': case KEY_ENTER: if (interface->setup_win.indentation_level == 0) { handle_setup_win_keypress(KEY_RIGHT, interface); return; } // General Options if (interface->setup_win.selected_section == setup_general_selected) { if (interface->setup_win.options_selected[0] == setup_general_color) { interface->options.use_color = !interface->options.use_color; } if (interface->setup_win.options_selected[0] == setup_general_show_startup_support_messages) { interface->options.show_startup_messages = !interface->options.show_startup_messages; } if (interface->setup_win.options_selected[0] == setup_general_update_interval) { } } // Header Options if (interface->setup_win.selected_section == setup_header_selected) { if (interface->setup_win.indentation_level == 1) { if (interface->setup_win.options_selected[0] == setup_header_toggle_fahrenheit) { interface->options.temperature_in_fahrenheit = !interface->options.temperature_in_fahrenheit; } if (interface->setup_win.options_selected[0] == setup_header_enc_dec_timer) { if (interface->options.encode_decode_hiding_timer > 0.) { interface->options.encode_decode_hiding_timer = 0.; } else { interface->options.encode_decode_hiding_timer = 30.; } } if (interface->setup_win.options_selected[0] == setup_header_gpu_info_bar) { interface->options.has_gpu_info_bar = !interface->options.has_gpu_info_bar; } } } // Chart Options if (interface->setup_win.selected_section == setup_chart_selected) { if (interface->setup_win.indentation_level == 1) { if (interface->setup_win.options_selected[0] == setup_chart_reverse) { interface->options.plot_left_to_right = !interface->options.plot_left_to_right; } if (interface->setup_win.options_selected[0] >= setup_chart_all_gpu) { handle_setup_win_keypress(KEY_RIGHT, interface); } } else if (interface->setup_win.indentation_level == 2) { if (interface->setup_win.options_selected[0] == setup_chart_all_gpu) { plot_info_to_draw draw_intersection = 0xffff; for (unsigned j = 0; j < interface->monitored_dev_count; ++j) { draw_intersection = draw_intersection & interface->options.gpu_specific_opts[j].to_draw; } if (plot_isset_draw_info(interface->setup_win.options_selected[1], draw_intersection)) { for (unsigned i = 0; i < interface->monitored_dev_count; ++i) { interface->options.gpu_specific_opts[i].to_draw = plot_remove_draw_info( interface->setup_win.options_selected[1], interface->options.gpu_specific_opts[i].to_draw); interface_ring_buffer_empty(&interface->saved_data_ring, i); } } else { for (unsigned i = 0; i < interface->monitored_dev_count; ++i) { interface->options.gpu_specific_opts[i].to_draw = plot_add_draw_info( interface->setup_win.options_selected[1], interface->options.gpu_specific_opts[i].to_draw); interface_ring_buffer_empty(&interface->saved_data_ring, i); } } } if (interface->setup_win.options_selected[0] > setup_chart_all_gpu) { unsigned selected_gpu = interface->setup_win.options_selected[0] - setup_chart_start_gpu_list; if (plot_isset_draw_info(interface->setup_win.options_selected[1], interface->options.gpu_specific_opts[selected_gpu].to_draw)) interface->options.gpu_specific_opts[selected_gpu].to_draw = plot_remove_draw_info( interface->setup_win.options_selected[1], interface->options.gpu_specific_opts[selected_gpu].to_draw); else interface->options.gpu_specific_opts[selected_gpu].to_draw = plot_add_draw_info( interface->setup_win.options_selected[1], interface->options.gpu_specific_opts[selected_gpu].to_draw); interface_ring_buffer_empty(&interface->saved_data_ring, selected_gpu); } } } // Process List Options if (interface->setup_win.selected_section == setup_process_list_selected) { if (interface->setup_win.indentation_level == 1) { if (interface->setup_win.options_selected[0] == setup_proc_list_sort_ascending) { interface->options.sort_descending_order = !interface->options.sort_descending_order; } else if (interface->setup_win.options_selected[0] == setup_proc_list_hide_nvtop_process) { interface->options.filter_nvtop_pid = !interface->options.filter_nvtop_pid; } else if (interface->setup_win.options_selected[0] == setup_proc_list_hide_process_list) { interface->options.hide_processes_list = !interface->options.hide_processes_list; } else if (interface->setup_win.options_selected[0] == setup_proc_list_sort_by) { handle_setup_win_keypress(KEY_RIGHT, interface); } } else if (interface->setup_win.indentation_level == 2) { if (interface->setup_win.options_selected[0] == setup_proc_list_sort_by) { unsigned index = 0; for (enum process_field field = process_pid; field < process_field_count; ++field) { if (process_is_field_displayed(field, interface->options.process_fields_displayed)) { if (index == interface->setup_win.options_selected[1]) interface->options.sort_processes_by = field; index++; } } } if (interface->setup_win.options_selected[0] == setup_proc_list_display) { if (process_is_field_displayed(interface->setup_win.options_selected[1], interface->options.process_fields_displayed)) { interface->options.process_fields_displayed = process_remove_field_to_display( interface->setup_win.options_selected[1], interface->options.process_fields_displayed); } else { interface->options.process_fields_displayed = process_add_field_to_display( interface->setup_win.options_selected[1], interface->options.process_fields_displayed); } if (!process_is_field_displayed(interface->options.sort_processes_by, interface->options.process_fields_displayed)) { interface->options.sort_processes_by = process_default_sort_by_from(interface->options.process_fields_displayed); } } } } if (interface->setup_win.selected_section == setup_monitored_gpu_list_selected) { if (interface->setup_win.indentation_level == 1) { interface->options.gpu_specific_opts[interface->setup_win.options_selected[0]].doNotMonitor = !interface->options.gpu_specific_opts[interface->setup_win.options_selected[0]].doNotMonitor; interface->options.has_monitored_set_changed = true; } } break; case KEY_F(2): case 27: interface->setup_win.visible = false; update_window_size_to_terminal_size(interface); break; case KEY_F(12): save_interface_options_to_config_file(interface->total_dev_count, &interface->options); break; default: break; } } } nvtop-3.2.0/src/mali_common.h000066400000000000000000000112511477175131100161230ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * This file is part of Nvtop and adapted from the msm implementation. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/device_discovery.h" #include "nvtop/extract_gpuinfo_common.h" #include "nvtop/extract_processinfo_fdinfo.h" #include "nvtop/time.h" #include #include #define MAX_ERR_STRING_LEN 256 // Declaration not present in xf86drm.h on Ubuntu 20.04 extern int drmGetDeviceFromDevId(dev_t dev_id, uint32_t flags, drmDevicePtr *device); struct drmFuncTable { typeof(drmGetDevices) *drmGetDevices; typeof(drmGetDevices2) *drmGetDevices2; typeof(drmFreeDevices) *drmFreeDevices; typeof(drmGetVersion) *drmGetVersion; typeof(drmFreeVersion) *drmFreeVersion; typeof(drmGetMagic) *drmGetMagic; typeof(drmAuthMagic) *drmAuthMagic; typeof(drmDropMaster) *drmDropMaster; typeof(drmCommandWriteRead) *drmCommandWriteRead; typeof(drmGetDeviceFromDevId) *drmGetDeviceFromDevId; typeof(drmIoctl) *drmIoctl; }; enum mali_version { MALI_PANFROST, MALI_PANTHOR, MALI_VERSIONS, }; struct mali_process_info_cache; struct panfrost_driver_data { bool original_profiling_state; bool profiler_enabled; char *sysfs_filename; }; struct panthor_driver_data { uint32_t unused; }; struct gpu_info_mali { drmVersionPtr drmVersion; enum mali_version version; struct gpu_info base; int fd; // Cached processes info struct mali_process_info_cache *last_update_process_cache; struct mali_process_info_cache *current_update_process_cache; union { struct panfrost_driver_data panfrost; struct panthor_driver_data panthor; } model; }; struct mali_gpu_state { unsigned mali_gpu_count; struct gpu_info_mali *gpu_infos; void *libdrm_handle; FILE *meminfo_file; int last_libdrm_return_status; char *didnt_call_gpuinfo_init; char *local_error_string; }; typedef void (*check_fdinfo_keys)(bool *is_engine, bool *is_cycles, bool *is_maxfreq, bool *is_curfreq, bool *is_resident, char *key); struct fdinfo_data { uint64_t total_cycles; bool client_id_set; unsigned int engine_count; unsigned cid; }; #define HASH_FIND_CLIENT(head, key_ptr, out_ptr) HASH_FIND(hh, head, key_ptr, sizeof(struct unique_cache_id), out_ptr) #define HASH_ADD_CLIENT(head, in_ptr) HASH_ADD(hh, head, client_id, sizeof(struct unique_cache_id), in_ptr) #define SET_MALI_CACHE(cachePtr, field, value) SET_VALUE(cachePtr, field, value, mali_cache_) #define RESET_PANFROST_CACHE(cachePtr, field) INVALIDATE_VALUE(cachePtr, field, mali_cache_) #define MALI_CACHE_FIELD_VALID(cachePtr, field) VALUE_IS_VALID(cachePtr, field, mali_cache_) uint64_t parse_memory_multiplier(const char *str); bool mali_init_drm_funcs(struct drmFuncTable *drmFuncs, struct mali_gpu_state *state); void mali_deinit_drm(struct mali_gpu_state *state); void mali_shutdown_common(struct mali_gpu_state *state, struct drmFuncTable *funcs); const char *mali_common_last_error_string(struct mali_gpu_state *state, const char *drivername, char error_str[]); bool mali_common_get_device_handles(struct mali_gpu_state *state, struct drmFuncTable *funcs, struct gpu_vendor *vendor, processinfo_fdinfo_callback callback, struct list_head *devices, unsigned *count, bool (*handle_model) (struct gpu_info_mali *), enum mali_version version); void mali_common_refresh_dynamic_info(struct gpuinfo_dynamic_info *dynamic_info, struct mali_gpu_state *state, const char *meminfo_total, const char *meminfo_available); void mali_common_get_running_processes(struct gpu_info *_gpu_info, enum mali_version version); void mali_common_parse_fdinfo_handle_cache(struct gpu_info_mali *gpu_info, struct gpu_process *process_info, nvtop_time current_time, uint64_t total_cycles, unsigned cid, bool engine_count); bool mali_common_parse_drm_fdinfo(struct gpu_info *info, FILE *fdinfo_file, struct gpu_process *process_info, struct gpuinfo_dynamic_info *dynamic_info, check_fdinfo_keys match_keys, struct fdinfo_data *fid); nvtop-3.2.0/src/nvtop.c000066400000000000000000000307721477175131100150030ustar00rootroot00000000000000/* * * Copyright (C) 2017-2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/extract_gpuinfo.h" #include "nvtop/info_messages.h" #include "nvtop/interface.h" #include "nvtop/interface_common.h" #include "nvtop/interface_options.h" #include "nvtop/time.h" #include "nvtop/version.h" #include #include #include #include #include #include #include #include #include static volatile sig_atomic_t signal_exit = 0; static volatile sig_atomic_t signal_resize_win = 0; static void exit_handler(int signum) { (void)signum; signal_exit = 1; } static void resize_handler(int signum) { (void)signum; signal_resize_win = 1; } static const char helpstring[] = "Available options:\n" " -d --delay : Select the refresh rate (1 == 0.1s)\n" " -v --version : Print the version and exit\n" " -c --config-file : Provide a custom config file location to load/save " "preferences\n" " -p --no-plot : Disable bar plot\n" " -P --no-processes : Disable process list\n" " -r --reverse-abs : Reverse abscissa: plot the recent data left and " "older on the right\n" " -C --no-color : No colors\n" "line information\n" " -f --freedom-unit : Use fahrenheit\n" " -i --gpu-info : Show bar with additional GPU parametres\n" " -E --encode-hide : Set encode/decode auto hide time in seconds " "(default 30s, negative = always on screen)\n" " -h --help : Print help and exit\n" " -s --snapshot : Output the current gpu stats without ncurses" "(useful for scripting)\n"; static const char versionString[] = "nvtop version " NVTOP_VERSION_STRING; static const struct option long_opts[] = { {.name = "delay", .has_arg = required_argument, .flag = NULL, .val = 'd'}, {.name = "version", .has_arg = no_argument, .flag = NULL, .val = 'v'}, {.name = "help", .has_arg = no_argument, .flag = NULL, .val = 'h'}, {.name = "config-file", .has_arg = required_argument, .flag = NULL, .val = 'c'}, {.name = "no-color", .has_arg = no_argument, .flag = NULL, .val = 'C'}, {.name = "no-colour", .has_arg = no_argument, .flag = NULL, .val = 'C'}, {.name = "freedom-unit", .has_arg = no_argument, .flag = NULL, .val = 'f'}, {.name = "gpu-info", .has_arg = no_argument, .flag = NULL, .val = 'i'}, {.name = "encode-hide", .has_arg = required_argument, .flag = NULL, .val = 'E'}, {.name = "no-plot", .has_arg = no_argument, .flag = NULL, .val = 'p'}, {.name = "no-processes", .has_arg = no_argument, .flag = NULL, .val = 'P'}, {.name = "reverse-abs", .has_arg = no_argument, .flag = NULL, .val = 'r'}, {.name = "snapshot", .has_arg = no_argument, .flag = NULL, .val = 's'}, {0, 0, 0, 0}, }; static const char opts[] = "hvd:c:CfE:pPris"; int main(int argc, char **argv) { (void)setlocale(LC_CTYPE, ""); opterr = 0; bool update_interval_option_set = false; int update_interval_option; bool no_color_option = false; bool use_fahrenheit_option = false; bool hide_plot_option = false; bool hide_processes_option = false; bool reverse_plot_direction_option = false; bool encode_decode_timer_option_set = false; bool show_gpu_info_bar = false; bool show_snapshot = false; double encode_decode_hide_time = -1.; char *custom_config_file_path = NULL; while (true) { int optchar = getopt_long(argc, argv, opts, long_opts, NULL); if (optchar == -1) break; switch (optchar) { case 'd': { char *endptr = NULL; long int delay_val = strtol(optarg, &endptr, 0); if (endptr == optarg) { fprintf(stderr, "Error: The delay must be a positive value " "representing tenths of seconds\n"); exit(EXIT_FAILURE); } if (delay_val < 0) { fprintf(stderr, "Error: A negative delay requires a time machine!\n"); exit(EXIT_FAILURE); } update_interval_option_set = true; update_interval_option = (int)delay_val * 100u; if (update_interval_option > 99900) update_interval_option = 99900; if (update_interval_option < 100) update_interval_option = 100; } break; case 'v': printf("%s\n", versionString); exit(EXIT_SUCCESS); case 'h': printf("%s\n%s", versionString, helpstring); exit(EXIT_SUCCESS); case 'c': custom_config_file_path = optarg; break; case 'C': no_color_option = true; break; case 'f': use_fahrenheit_option = true; break; case 'i': show_gpu_info_bar = true; break; case 'E': { if (sscanf(optarg, "%lf", &encode_decode_hide_time) == EOF) { fprintf(stderr, "Invalid format for encode/decode hide time: %s\n", optarg); exit(EXIT_FAILURE); } encode_decode_timer_option_set = true; } break; case 'p': hide_plot_option = true; break; case 'P': hide_processes_option = true; break; case 'r': reverse_plot_direction_option = true; break; case 's': show_snapshot = true; break; case ':': case '?': switch (optopt) { case 'd': fprintf(stderr, "Error: The delay option takes a positive value " "representing tenths of seconds\n"); break; default: fprintf(stderr, "Unhandled error in getopt missing argument\n"); exit(EXIT_FAILURE); break; } exit(EXIT_FAILURE); } } setenv("ESCDELAY", "10", 1); struct sigaction siga; siga.sa_flags = 0; sigemptyset(&siga.sa_mask); siga.sa_handler = exit_handler; if (sigaction(SIGINT, &siga, NULL) != 0) { perror("Impossible to set signal handler for SIGINT: "); exit(EXIT_FAILURE); } if (sigaction(SIGQUIT, &siga, NULL) != 0) { perror("Impossible to set signal handler for SIGQUIT: "); exit(EXIT_FAILURE); } siga.sa_handler = resize_handler; if (sigaction(SIGWINCH, &siga, NULL) != 0) { perror("Impossible to set signal handler for SIGWINCH: "); exit(EXIT_FAILURE); } unsigned allDevCount = 0; LIST_HEAD(monitoredGpus); LIST_HEAD(nonMonitoredGpus); if (!gpuinfo_init_info_extraction(&allDevCount, &monitoredGpus)) return EXIT_FAILURE; if (allDevCount == 0) { fprintf(stdout, "No GPU to monitor.\n"); return EXIT_SUCCESS; } if (show_snapshot) { print_snapshot(&monitoredGpus, use_fahrenheit_option); gpuinfo_shutdown_info_extraction(&monitoredGpus); return EXIT_SUCCESS; } unsigned numWarningMessages = 0; const char **warningMessages; get_info_messages(&monitoredGpus, &numWarningMessages, &warningMessages); nvtop_interface_option allDevicesOptions; alloc_interface_options_internals(custom_config_file_path, allDevCount, &monitoredGpus, &allDevicesOptions); load_interface_options_from_config_file(allDevCount, &allDevicesOptions); for (unsigned i = 0; i < allDevCount; ++i) { // Nothing specified in the file if (!plot_isset_draw_info(plot_information_count, allDevicesOptions.gpu_specific_opts[i].to_draw)) { allDevicesOptions.gpu_specific_opts[i].to_draw = plot_default_draw_info(); } else { allDevicesOptions.gpu_specific_opts[i].to_draw = plot_remove_draw_info(plot_information_count, allDevicesOptions.gpu_specific_opts[i].to_draw); } } if (!process_is_field_displayed(process_field_count, allDevicesOptions.process_fields_displayed)) { allDevicesOptions.process_fields_displayed = process_default_displayed_field(); } else { allDevicesOptions.process_fields_displayed = process_remove_field_to_display(process_field_count, allDevicesOptions.process_fields_displayed); } if (no_color_option) allDevicesOptions.use_color = false; if (hide_plot_option) { for (unsigned i = 0; i < allDevCount; ++i) { allDevicesOptions.gpu_specific_opts[i].to_draw = 0; } } allDevicesOptions.hide_processes_list = hide_processes_option; if (encode_decode_timer_option_set) { allDevicesOptions.encode_decode_hiding_timer = encode_decode_hide_time; if (allDevicesOptions.encode_decode_hiding_timer < 0.) allDevicesOptions.encode_decode_hiding_timer = 0.; } if (reverse_plot_direction_option) allDevicesOptions.plot_left_to_right = true; if (use_fahrenheit_option) allDevicesOptions.temperature_in_fahrenheit = true; if (update_interval_option_set) allDevicesOptions.update_interval = update_interval_option; allDevicesOptions.has_gpu_info_bar = allDevicesOptions.has_gpu_info_bar || show_gpu_info_bar; gpuinfo_populate_static_infos(&monitoredGpus); unsigned numMonitoredGpus = interface_check_and_fix_monitored_gpus(allDevCount, &monitoredGpus, &nonMonitoredGpus, &allDevicesOptions); if (allDevicesOptions.show_startup_messages) { bool dont_show_again = show_information_messages(numWarningMessages, warningMessages); if (dont_show_again) { allDevicesOptions.show_startup_messages = false; save_interface_options_to_config_file(allDevCount, &allDevicesOptions); } } struct nvtop_interface *interface = initialize_curses(allDevCount, numMonitoredGpus, interface_largest_gpu_name(&monitoredGpus), allDevicesOptions); timeout(interface_update_interval(interface)); double time_slept = interface_update_interval(interface); while (!signal_exit) { if (signal_resize_win) { signal_resize_win = 0; update_window_size_to_terminal_size(interface); } interface_check_monitored_gpu_change(&interface, allDevCount, &numMonitoredGpus, &monitoredGpus, &nonMonitoredGpus); if (time_slept >= interface_update_interval(interface)) { gpuinfo_refresh_dynamic_info(&monitoredGpus); if (!interface_freeze_processes(interface)) { gpuinfo_refresh_processes(&monitoredGpus); gpuinfo_utilisation_rate(&monitoredGpus); gpuinfo_fix_dynamic_info_from_process_info(&monitoredGpus); } save_current_data_to_ring(&monitoredGpus, interface); timeout(interface_update_interval(interface)); time_slept = 0.; } else { int next_sleep = interface_update_interval(interface) - (int)time_slept; timeout(next_sleep); } draw_gpu_info_ncurses(numMonitoredGpus, &monitoredGpus, interface); nvtop_time time_before_sleep, time_after_sleep; nvtop_get_current_time(&time_before_sleep); int input_char = getch(); nvtop_get_current_time(&time_after_sleep); time_slept += nvtop_difftime(time_before_sleep, time_after_sleep) * 1000; switch (input_char) { case 27: // ESC { timeout(0); int in = getch(); if (in == ERR) { // ESC alone if (is_escape_for_quit(interface)) signal_exit = 1; else interface_key(27, interface); } // else ALT key } break; case KEY_F(10): if (is_escape_for_quit(interface)) signal_exit = 1; break; case 'q': signal_exit = 1; break; case KEY_F(2): case KEY_F(9): case KEY_F(6): case KEY_F(12): case '+': case '-': interface_key(input_char, interface); break; case 'k': case KEY_UP: case 'j': case KEY_DOWN: case 'h': case KEY_LEFT: case 'l': case KEY_RIGHT: case KEY_ENTER: case '\n': interface_key(input_char, interface); break; case ERR: default: break; } } clean_ncurses(interface); gpuinfo_shutdown_info_extraction(&monitoredGpus); return EXIT_SUCCESS; } nvtop-3.2.0/src/panfrost_drm.h000066400000000000000000000204361477175131100163340ustar00rootroot00000000000000/* SPDX-License-Identifier: MIT */ /* * Copyright © 2014-2018 Broadcom * Copyright © 2019 Collabora ltd. */ #ifndef _PANFROST_DRM_H_ #define _PANFROST_DRM_H_ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif #define DRM_PANFROST_SUBMIT 0x00 #define DRM_PANFROST_WAIT_BO 0x01 #define DRM_PANFROST_CREATE_BO 0x02 #define DRM_PANFROST_MMAP_BO 0x03 #define DRM_PANFROST_GET_PARAM 0x04 #define DRM_PANFROST_GET_BO_OFFSET 0x05 #define DRM_PANFROST_PERFCNT_ENABLE 0x06 #define DRM_PANFROST_PERFCNT_DUMP 0x07 #define DRM_PANFROST_MADVISE 0x08 #define DRM_IOCTL_PANFROST_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit) #define DRM_IOCTL_PANFROST_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo) #define DRM_IOCTL_PANFROST_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_CREATE_BO, struct drm_panfrost_create_bo) #define DRM_IOCTL_PANFROST_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MMAP_BO, struct drm_panfrost_mmap_bo) #define DRM_IOCTL_PANFROST_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_PARAM, struct drm_panfrost_get_param) #define DRM_IOCTL_PANFROST_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset) #define DRM_IOCTL_PANFROST_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MADVISE, struct drm_panfrost_madvise) /* * Unstable ioctl(s): only exposed when the unsafe unstable_ioctls module * param is set to true. * All these ioctl(s) are subject to deprecation, so please don't rely on * them for anything but debugging purpose. */ #define DRM_IOCTL_PANFROST_PERFCNT_ENABLE DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_ENABLE, struct drm_panfrost_perfcnt_enable) #define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump) #define PANFROST_JD_REQ_FS (1 << 0) /** * struct drm_panfrost_submit - ioctl argument for submitting commands to the 3D * engine. * * This asks the kernel to have the GPU execute a render command list. */ struct drm_panfrost_submit { /** Address to GPU mapping of job descriptor */ __u64 jc; /** An optional array of sync objects to wait on before starting this job. */ __u64 in_syncs; /** Number of sync objects to wait on before starting this job. */ __u32 in_sync_count; /** An optional sync object to place the completion fence in. */ __u32 out_sync; /** Pointer to a u32 array of the BOs that are referenced by the job. */ __u64 bo_handles; /** Number of BO handles passed in (size is that times 4). */ __u32 bo_handle_count; /** A combination of PANFROST_JD_REQ_* */ __u32 requirements; }; /** * struct drm_panfrost_wait_bo - ioctl argument for waiting for * completion of the last DRM_PANFROST_SUBMIT on a BO. * * This is useful for cases where multiple processes might be * rendering to a BO and you want to wait for all rendering to be * completed. */ struct drm_panfrost_wait_bo { __u32 handle; __u32 pad; __s64 timeout_ns; /* absolute */ }; /* Valid flags to pass to drm_panfrost_create_bo */ #define PANFROST_BO_NOEXEC 1 #define PANFROST_BO_HEAP 2 /** * struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs. * * The flags argument is a bit mask of PANFROST_BO_* flags. */ struct drm_panfrost_create_bo { __u32 size; __u32 flags; /** Returned GEM handle for the BO. */ __u32 handle; /* Pad, must be zero-filled. */ __u32 pad; /** * Returned offset for the BO in the GPU address space. This offset * is private to the DRM fd and is valid for the lifetime of the GEM * handle. * * This offset value will always be nonzero, since various HW * units treat 0 specially. */ __u64 offset; }; /** * struct drm_panfrost_mmap_bo - ioctl argument for mapping Panfrost BOs. * * This doesn't actually perform an mmap. Instead, it returns the * offset you need to use in an mmap on the DRM device node. This * means that tools like valgrind end up knowing about the mapped * memory. * * There are currently no values for the flags argument, but it may be * used in a future extension. */ struct drm_panfrost_mmap_bo { /** Handle for the object being mapped. */ __u32 handle; __u32 flags; /** offset into the drm node to use for subsequent mmap call. */ __u64 offset; }; enum drm_panfrost_param { DRM_PANFROST_PARAM_GPU_PROD_ID, DRM_PANFROST_PARAM_GPU_REVISION, DRM_PANFROST_PARAM_SHADER_PRESENT, DRM_PANFROST_PARAM_TILER_PRESENT, DRM_PANFROST_PARAM_L2_PRESENT, DRM_PANFROST_PARAM_STACK_PRESENT, DRM_PANFROST_PARAM_AS_PRESENT, DRM_PANFROST_PARAM_JS_PRESENT, DRM_PANFROST_PARAM_L2_FEATURES, DRM_PANFROST_PARAM_CORE_FEATURES, DRM_PANFROST_PARAM_TILER_FEATURES, DRM_PANFROST_PARAM_MEM_FEATURES, DRM_PANFROST_PARAM_MMU_FEATURES, DRM_PANFROST_PARAM_THREAD_FEATURES, DRM_PANFROST_PARAM_MAX_THREADS, DRM_PANFROST_PARAM_THREAD_MAX_WORKGROUP_SZ, DRM_PANFROST_PARAM_THREAD_MAX_BARRIER_SZ, DRM_PANFROST_PARAM_COHERENCY_FEATURES, DRM_PANFROST_PARAM_TEXTURE_FEATURES0, DRM_PANFROST_PARAM_TEXTURE_FEATURES1, DRM_PANFROST_PARAM_TEXTURE_FEATURES2, DRM_PANFROST_PARAM_TEXTURE_FEATURES3, DRM_PANFROST_PARAM_JS_FEATURES0, DRM_PANFROST_PARAM_JS_FEATURES1, DRM_PANFROST_PARAM_JS_FEATURES2, DRM_PANFROST_PARAM_JS_FEATURES3, DRM_PANFROST_PARAM_JS_FEATURES4, DRM_PANFROST_PARAM_JS_FEATURES5, DRM_PANFROST_PARAM_JS_FEATURES6, DRM_PANFROST_PARAM_JS_FEATURES7, DRM_PANFROST_PARAM_JS_FEATURES8, DRM_PANFROST_PARAM_JS_FEATURES9, DRM_PANFROST_PARAM_JS_FEATURES10, DRM_PANFROST_PARAM_JS_FEATURES11, DRM_PANFROST_PARAM_JS_FEATURES12, DRM_PANFROST_PARAM_JS_FEATURES13, DRM_PANFROST_PARAM_JS_FEATURES14, DRM_PANFROST_PARAM_JS_FEATURES15, DRM_PANFROST_PARAM_NR_CORE_GROUPS, DRM_PANFROST_PARAM_THREAD_TLS_ALLOC, DRM_PANFROST_PARAM_AFBC_FEATURES, DRM_PANFROST_PARAM_MAX_FREQ, }; struct drm_panfrost_get_param { __u32 param; __u32 pad; __u64 value; }; /** * Returns the offset for the BO in the GPU address space for this DRM fd. * This is the same value returned by drm_panfrost_create_bo, if that was called * from this DRM fd. */ struct drm_panfrost_get_bo_offset { __u32 handle; __u32 pad; __u64 offset; }; struct drm_panfrost_perfcnt_enable { __u32 enable; /* * On bifrost we have 2 sets of counters, this parameter defines the * one to track. */ __u32 counterset; }; struct drm_panfrost_perfcnt_dump { __u64 buf_ptr; }; /* madvise provides a way to tell the kernel in case a buffers contents * can be discarded under memory pressure, which is useful for userspace * bo cache where we want to optimistically hold on to buffer allocate * and potential mmap, but allow the pages to be discarded under memory * pressure. * * Typical usage would involve madvise(DONTNEED) when buffer enters BO * cache, and madvise(WILLNEED) if trying to recycle buffer from BO cache. * In the WILLNEED case, 'retained' indicates to userspace whether the * backing pages still exist. */ #define PANFROST_MADV_WILLNEED 0 /* backing pages are needed, status returned in 'retained' */ #define PANFROST_MADV_DONTNEED 1 /* backing pages not needed */ struct drm_panfrost_madvise { __u32 handle; /* in, GEM handle */ __u32 madv; /* in, PANFROST_MADV_x */ __u32 retained; /* out, whether backing store still exists */ }; /* Definitions for coredump decoding in user space */ #define PANFROSTDUMP_MAJOR 1 #define PANFROSTDUMP_MINOR 0 #define PANFROSTDUMP_MAGIC 0x464E4150 /* PANF */ #define PANFROSTDUMP_BUF_REG 0 #define PANFROSTDUMP_BUF_BOMAP (PANFROSTDUMP_BUF_REG + 1) #define PANFROSTDUMP_BUF_BO (PANFROSTDUMP_BUF_BOMAP + 1) #define PANFROSTDUMP_BUF_TRAILER (PANFROSTDUMP_BUF_BO + 1) /* * This structure is the native endianness of the dumping machine, tools can * detect the endianness by looking at the value in 'magic'. */ struct panfrost_dump_object_header { __u32 magic; __u32 type; __u32 file_size; __u32 file_offset; union { struct { __u64 jc; __u32 gpu_id; __u32 major; __u32 minor; __u64 nbos; } reghdr; struct { __u32 valid; __u64 iova; __u32 data[2]; } bomap; /* * Force same size in case we want to expand the header * with new fields and also keep it 512-byte aligned */ __u32 sizer[496]; }; }; /* Registers object, an array of these */ struct panfrost_dump_registers { __u32 reg; __u32 value; }; #if defined(__cplusplus) } #endif #endif /* _PANFROST_DRM_H_ */ nvtop-3.2.0/src/panfrost_utils.h000066400000000000000000000016701477175131100167110ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include const char * panfrost_parse_marketing_name(uint64_t gpu_id); unsigned int util_last_bit(unsigned int u); unsigned int get_number_engines(uint32_t gpu_id, int core_count, uint32_t core_features, uint32_t thread_features); nvtop-3.2.0/src/panthor_drm.h000066400000000000000000000624431477175131100161570ustar00rootroot00000000000000/* SPDX-License-Identifier: MIT */ /* Copyright (C) 2023 Collabora ltd. */ #ifndef _PANTHOR_DRM_H_ #define _PANTHOR_DRM_H_ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif /** * DOC: Introduction * * This documentation describes the Panthor IOCTLs. * * Just a few generic rules about the data passed to the Panthor IOCTLs: * * - Structures must be aligned on 64-bit/8-byte. If the object is not * naturally aligned, a padding field must be added. * - Fields must be explicitly aligned to their natural type alignment with * pad[0..N] fields. * - All padding fields will be checked by the driver to make sure they are * zeroed. * - Flags can be added, but not removed/replaced. * - New fields can be added to the main structures (the structures * directly passed to the ioctl). Those fields can be added at the end of * the structure, or replace existing padding fields. Any new field being * added must preserve the behavior that existed before those fields were * added when a value of zero is passed. * - New fields can be added to indirect objects (objects pointed by the * main structure), iff those objects are passed a size to reflect the * size known by the userspace driver (see drm_panthor_obj_array::stride * or drm_panthor_dev_query::size). * - If the kernel driver is too old to know some fields, those will be * ignored if zero, and otherwise rejected (and so will be zero on output). * - If userspace is too old to know some fields, those will be zeroed * (input) before the structure is parsed by the kernel driver. * - Each new flag/field addition must come with a driver version update so * the userspace driver doesn't have to trial and error to know which * flags are supported. * - Structures should not contain unions, as this would defeat the * extensibility of such structures. * - IOCTLs can't be removed or replaced. New IOCTL IDs should be placed * at the end of the drm_panthor_ioctl_id enum. */ /** * DOC: MMIO regions exposed to userspace. * * .. c:macro:: DRM_PANTHOR_USER_MMIO_OFFSET * * File offset for all MMIO regions being exposed to userspace. Don't use * this value directly, use DRM_PANTHOR_USER__OFFSET values instead. * pgoffset passed to mmap2() is an unsigned long, which forces us to use a * different offset on 32-bit and 64-bit systems. * * .. c:macro:: DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET * * File offset for the LATEST_FLUSH_ID register. The Userspace driver controls * GPU cache flushing through CS instructions, but the flush reduction * mechanism requires a flush_id. This flush_id could be queried with an * ioctl, but Arm provides a well-isolated register page containing only this * read-only register, so let's expose this page through a static mmap offset * and allow direct mapping of this MMIO region so we can avoid the * user <-> kernel round-trip. */ #define DRM_PANTHOR_USER_MMIO_OFFSET_32BIT (1ull << 43) #define DRM_PANTHOR_USER_MMIO_OFFSET_64BIT (1ull << 56) #define DRM_PANTHOR_USER_MMIO_OFFSET (sizeof(unsigned long) < 8 ? \ DRM_PANTHOR_USER_MMIO_OFFSET_32BIT : \ DRM_PANTHOR_USER_MMIO_OFFSET_64BIT) #define DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET (DRM_PANTHOR_USER_MMIO_OFFSET | 0) /** * DOC: IOCTL IDs * * enum drm_panthor_ioctl_id - IOCTL IDs * * Place new ioctls at the end, don't re-order, don't replace or remove entries. * * These IDs are not meant to be used directly. Use the DRM_IOCTL_PANTHOR_xxx * definitions instead. */ enum drm_panthor_ioctl_id { /** @DRM_PANTHOR_DEV_QUERY: Query device information. */ DRM_PANTHOR_DEV_QUERY = 0, /** @DRM_PANTHOR_VM_CREATE: Create a VM. */ DRM_PANTHOR_VM_CREATE, /** @DRM_PANTHOR_VM_DESTROY: Destroy a VM. */ DRM_PANTHOR_VM_DESTROY, /** @DRM_PANTHOR_VM_BIND: Bind/unbind memory to a VM. */ DRM_PANTHOR_VM_BIND, /** @DRM_PANTHOR_BO_CREATE: Create a buffer object. */ DRM_PANTHOR_BO_CREATE, /** * @DRM_PANTHOR_BO_MMAP_OFFSET: Get the file offset to pass to * mmap to map a GEM object. */ DRM_PANTHOR_BO_MMAP_OFFSET, /** @DRM_PANTHOR_GROUP_CREATE: Create a scheduling group. */ DRM_PANTHOR_GROUP_CREATE, /** @DRM_PANTHOR_GROUP_DESTROY: Destroy a scheduling group. */ DRM_PANTHOR_GROUP_DESTROY, /** * @DRM_PANTHOR_GROUP_SUBMIT: Submit jobs to queues belonging * to a specific scheduling group. */ DRM_PANTHOR_GROUP_SUBMIT, /** @DRM_PANTHOR_GROUP_GET_STATE: Get the state of a scheduling group. */ DRM_PANTHOR_GROUP_GET_STATE, /** @DRM_PANTHOR_TILER_HEAP_CREATE: Create a tiler heap. */ DRM_PANTHOR_TILER_HEAP_CREATE, /** @DRM_PANTHOR_TILER_HEAP_DESTROY: Destroy a tiler heap. */ DRM_PANTHOR_TILER_HEAP_DESTROY, }; /** * DRM_IOCTL_PANTHOR() - Build a Panthor IOCTL number * @__access: Access type. Must be R, W or RW. * @__id: One of the DRM_PANTHOR_xxx id. * @__type: Suffix of the type being passed to the IOCTL. * * Don't use this macro directly, use the DRM_IOCTL_PANTHOR_xxx * values instead. * * Return: An IOCTL number to be passed to ioctl() from userspace. */ #define DRM_IOCTL_PANTHOR(__access, __id, __type) \ DRM_IO ## __access(DRM_COMMAND_BASE + DRM_PANTHOR_ ## __id, \ struct drm_panthor_ ## __type) #define DRM_IOCTL_PANTHOR_DEV_QUERY \ DRM_IOCTL_PANTHOR(WR, DEV_QUERY, dev_query) #define DRM_IOCTL_PANTHOR_VM_CREATE \ DRM_IOCTL_PANTHOR(WR, VM_CREATE, vm_create) #define DRM_IOCTL_PANTHOR_VM_DESTROY \ DRM_IOCTL_PANTHOR(WR, VM_DESTROY, vm_destroy) #define DRM_IOCTL_PANTHOR_VM_BIND \ DRM_IOCTL_PANTHOR(WR, VM_BIND, vm_bind) #define DRM_IOCTL_PANTHOR_BO_CREATE \ DRM_IOCTL_PANTHOR(WR, BO_CREATE, bo_create) #define DRM_IOCTL_PANTHOR_BO_MMAP_OFFSET \ DRM_IOCTL_PANTHOR(WR, BO_MMAP_OFFSET, bo_mmap_offset) #define DRM_IOCTL_PANTHOR_GROUP_CREATE \ DRM_IOCTL_PANTHOR(WR, GROUP_CREATE, group_create) #define DRM_IOCTL_PANTHOR_GROUP_DESTROY \ DRM_IOCTL_PANTHOR(WR, GROUP_DESTROY, group_destroy) #define DRM_IOCTL_PANTHOR_GROUP_SUBMIT \ DRM_IOCTL_PANTHOR(WR, GROUP_SUBMIT, group_submit) #define DRM_IOCTL_PANTHOR_GROUP_GET_STATE \ DRM_IOCTL_PANTHOR(WR, GROUP_GET_STATE, group_get_state) #define DRM_IOCTL_PANTHOR_TILER_HEAP_CREATE \ DRM_IOCTL_PANTHOR(WR, TILER_HEAP_CREATE, tiler_heap_create) #define DRM_IOCTL_PANTHOR_TILER_HEAP_DESTROY \ DRM_IOCTL_PANTHOR(WR, TILER_HEAP_DESTROY, tiler_heap_destroy) /** * DOC: IOCTL arguments */ /** * struct drm_panthor_obj_array - Object array. * * This object is used to pass an array of objects whose size is subject to changes in * future versions of the driver. In order to support this mutability, we pass a stride * describing the size of the object as known by userspace. * * You shouldn't fill drm_panthor_obj_array fields directly. You should instead use * the DRM_PANTHOR_OBJ_ARRAY() macro that takes care of initializing the stride to * the object size. */ struct drm_panthor_obj_array { /** @stride: Stride of object struct. Used for versioning. */ __u32 stride; /** @count: Number of objects in the array. */ __u32 count; /** @array: User pointer to an array of objects. */ __u64 array; }; /** * DRM_PANTHOR_OBJ_ARRAY() - Initialize a drm_panthor_obj_array field. * @cnt: Number of elements in the array. * @ptr: Pointer to the array to pass to the kernel. * * Macro initializing a drm_panthor_obj_array based on the object size as known * by userspace. */ #define DRM_PANTHOR_OBJ_ARRAY(cnt, ptr) \ { .stride = sizeof((ptr)[0]), .count = (cnt), .array = (__u64)(uintptr_t)(ptr) } /** * enum drm_panthor_sync_op_flags - Synchronization operation flags. */ enum drm_panthor_sync_op_flags { /** @DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_MASK: Synchronization handle type mask. */ DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_MASK = 0xff, /** @DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_SYNCOBJ: Synchronization object type. */ DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_SYNCOBJ = 0, /** * @DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_TIMELINE_SYNCOBJ: Timeline synchronization * object type. */ DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_TIMELINE_SYNCOBJ = 1, /** @DRM_PANTHOR_SYNC_OP_WAIT: Wait operation. */ DRM_PANTHOR_SYNC_OP_WAIT = 0 << 31, /** @DRM_PANTHOR_SYNC_OP_SIGNAL: Signal operation. */ DRM_PANTHOR_SYNC_OP_SIGNAL = (int)(1u << 31), }; /** * struct drm_panthor_sync_op - Synchronization operation. */ struct drm_panthor_sync_op { /** @flags: Synchronization operation flags. Combination of DRM_PANTHOR_SYNC_OP values. */ __u32 flags; /** @handle: Sync handle. */ __u32 handle; /** * @timeline_value: MBZ if * (flags & DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_MASK) != * DRM_PANTHOR_SYNC_OP_HANDLE_TYPE_TIMELINE_SYNCOBJ. */ __u64 timeline_value; }; /** * enum drm_panthor_dev_query_type - Query type * * Place new types at the end, don't re-order, don't remove or replace. */ enum drm_panthor_dev_query_type { /** @DRM_PANTHOR_DEV_QUERY_GPU_INFO: Query GPU information. */ DRM_PANTHOR_DEV_QUERY_GPU_INFO = 0, /** @DRM_PANTHOR_DEV_QUERY_CSIF_INFO: Query command-stream interface information. */ DRM_PANTHOR_DEV_QUERY_CSIF_INFO, }; /** * struct drm_panthor_gpu_info - GPU information * * Structure grouping all queryable information relating to the GPU. */ struct drm_panthor_gpu_info { /** @gpu_id : GPU ID. */ __u32 gpu_id; #define DRM_PANTHOR_ARCH_MAJOR(x) ((x) >> 28) #define DRM_PANTHOR_ARCH_MINOR(x) (((x) >> 24) & 0xf) #define DRM_PANTHOR_ARCH_REV(x) (((x) >> 20) & 0xf) #define DRM_PANTHOR_PRODUCT_MAJOR(x) (((x) >> 16) & 0xf) #define DRM_PANTHOR_VERSION_MAJOR(x) (((x) >> 12) & 0xf) #define DRM_PANTHOR_VERSION_MINOR(x) (((x) >> 4) & 0xff) #define DRM_PANTHOR_VERSION_STATUS(x) ((x) & 0xf) /** @gpu_rev: GPU revision. */ __u32 gpu_rev; /** @csf_id: Command stream frontend ID. */ __u32 csf_id; #define DRM_PANTHOR_CSHW_MAJOR(x) (((x) >> 26) & 0x3f) #define DRM_PANTHOR_CSHW_MINOR(x) (((x) >> 20) & 0x3f) #define DRM_PANTHOR_CSHW_REV(x) (((x) >> 16) & 0xf) #define DRM_PANTHOR_MCU_MAJOR(x) (((x) >> 10) & 0x3f) #define DRM_PANTHOR_MCU_MINOR(x) (((x) >> 4) & 0x3f) #define DRM_PANTHOR_MCU_REV(x) ((x) & 0xf) /** @l2_features: L2-cache features. */ __u32 l2_features; /** @tiler_features: Tiler features. */ __u32 tiler_features; /** @mem_features: Memory features. */ __u32 mem_features; /** @mmu_features: MMU features. */ __u32 mmu_features; #define DRM_PANTHOR_MMU_VA_BITS(x) ((x) & 0xff) /** @thread_features: Thread features. */ __u32 thread_features; /** @max_threads: Maximum number of threads. */ __u32 max_threads; /** @thread_max_workgroup_size: Maximum workgroup size. */ __u32 thread_max_workgroup_size; /** * @thread_max_barrier_size: Maximum number of threads that can wait * simultaneously on a barrier. */ __u32 thread_max_barrier_size; /** @coherency_features: Coherency features. */ __u32 coherency_features; /** @texture_features: Texture features. */ __u32 texture_features[4]; /** @as_present: Bitmask encoding the number of address-space exposed by the MMU. */ __u32 as_present; /** @shader_present: Bitmask encoding the shader cores exposed by the GPU. */ __u64 shader_present; /** @l2_present: Bitmask encoding the L2 caches exposed by the GPU. */ __u64 l2_present; /** @tiler_present: Bitmask encoding the tiler units exposed by the GPU. */ __u64 tiler_present; }; /** * struct drm_panthor_csif_info - Command stream interface information * * Structure grouping all queryable information relating to the command stream interface. */ struct drm_panthor_csif_info { /** @csg_slot_count: Number of command stream group slots exposed by the firmware. */ __u32 csg_slot_count; /** @cs_slot_count: Number of command stream slots per group. */ __u32 cs_slot_count; /** @cs_reg_count: Number of command stream registers. */ __u32 cs_reg_count; /** @scoreboard_slot_count: Number of scoreboard slots. */ __u32 scoreboard_slot_count; /** * @unpreserved_cs_reg_count: Number of command stream registers reserved by * the kernel driver to call a userspace command stream. * * All registers can be used by a userspace command stream, but the * [cs_slot_count - unpreserved_cs_reg_count .. cs_slot_count] registers are * used by the kernel when DRM_PANTHOR_IOCTL_GROUP_SUBMIT is called. */ __u32 unpreserved_cs_reg_count; /** * @pad: Padding field, set to zero. */ __u32 pad; }; /** * struct drm_panthor_dev_query - Arguments passed to DRM_PANTHOR_IOCTL_DEV_QUERY */ struct drm_panthor_dev_query { /** @type: the query type (see drm_panthor_dev_query_type). */ __u32 type; /** * @size: size of the type being queried. * * If pointer is NULL, size is updated by the driver to provide the * output structure size. If pointer is not NULL, the driver will * only copy min(size, actual_structure_size) bytes to the pointer, * and update the size accordingly. This allows us to extend query * types without breaking userspace. */ __u32 size; /** * @pointer: user pointer to a query type struct. * * Pointer can be NULL, in which case, nothing is copied, but the * actual structure size is returned. If not NULL, it must point to * a location that's large enough to hold size bytes. */ __u64 pointer; }; /** * struct drm_panthor_vm_create - Arguments passed to DRM_PANTHOR_IOCTL_VM_CREATE */ struct drm_panthor_vm_create { /** @flags: VM flags, MBZ. */ __u32 flags; /** @id: Returned VM ID. */ __u32 id; /** * @user_va_range: Size of the VA space reserved for user objects. * * The kernel will pick the remaining space to map kernel-only objects to the * VM (heap chunks, heap context, ring buffers, kernel synchronization objects, * ...). If the space left for kernel objects is too small, kernel object * allocation will fail further down the road. One can use * drm_panthor_gpu_info::mmu_features to extract the total virtual address * range, and chose a user_va_range that leaves some space to the kernel. * * If user_va_range is zero, the kernel will pick a sensible value based on * TASK_SIZE and the virtual range supported by the GPU MMU (the kernel/user * split should live enough VA space for userspace processes to support SVM, * while still allowing the kernel to map some amount of kernel objects in * the kernel VA range). The value chosen by the driver will be returned in * @user_va_range. * * User VA space always starts at 0x0, kernel VA space is always placed after * the user VA range. */ __u64 user_va_range; }; /** * struct drm_panthor_vm_destroy - Arguments passed to DRM_PANTHOR_IOCTL_VM_DESTROY */ struct drm_panthor_vm_destroy { /** @id: ID of the VM to destroy. */ __u32 id; /** @pad: MBZ. */ __u32 pad; }; /** * enum drm_panthor_vm_bind_op_flags - VM bind operation flags */ enum drm_panthor_vm_bind_op_flags { /** * @DRM_PANTHOR_VM_BIND_OP_MAP_READONLY: Map the memory read-only. * * Only valid with DRM_PANTHOR_VM_BIND_OP_TYPE_MAP. */ DRM_PANTHOR_VM_BIND_OP_MAP_READONLY = 1 << 0, /** * @DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC: Map the memory not-executable. * * Only valid with DRM_PANTHOR_VM_BIND_OP_TYPE_MAP. */ DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC = 1 << 1, /** * @DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED: Map the memory uncached. * * Only valid with DRM_PANTHOR_VM_BIND_OP_TYPE_MAP. */ DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED = 1 << 2, /** * @DRM_PANTHOR_VM_BIND_OP_TYPE_MASK: Mask used to determine the type of operation. */ DRM_PANTHOR_VM_BIND_OP_TYPE_MASK = (int)(0xfu << 28), /** @DRM_PANTHOR_VM_BIND_OP_TYPE_MAP: Map operation. */ DRM_PANTHOR_VM_BIND_OP_TYPE_MAP = 0 << 28, /** @DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP: Unmap operation. */ DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP = 1 << 28, }; /** * struct drm_panthor_vm_bind_op - VM bind operation */ struct drm_panthor_vm_bind_op { /** @flags: Combination of drm_panthor_vm_bind_op_flags flags. */ __u32 flags; /** * @bo_handle: Handle of the buffer object to map. * MBZ for unmap operations. */ __u32 bo_handle; /** * @bo_offset: Buffer object offset. * MBZ for unmap operations. */ __u64 bo_offset; /** * @va: Virtual address to map/unmap. */ __u64 va; /** @size: Size to map/unmap. */ __u64 size; /** * @syncs: Array of struct drm_panthor_sync_op synchronization * operations. * * This array must be empty if %DRM_PANTHOR_VM_BIND_ASYNC is not set on * the drm_panthor_vm_bind object containing this VM bind operation. */ struct drm_panthor_obj_array syncs; }; /** * enum drm_panthor_vm_bind_flags - VM bind flags */ enum drm_panthor_vm_bind_flags { /** * @DRM_PANTHOR_VM_BIND_ASYNC: VM bind operations are queued to the VM * queue instead of being executed synchronously. */ DRM_PANTHOR_VM_BIND_ASYNC = 1 << 0, }; /** * struct drm_panthor_vm_bind - Arguments passed to DRM_IOCTL_PANTHOR_VM_BIND */ struct drm_panthor_vm_bind { /** @vm_id: VM targeted by the bind request. */ __u32 vm_id; /** @flags: Combination of drm_panthor_vm_bind_flags flags. */ __u32 flags; /** @ops: Array of struct drm_panthor_vm_bind_op bind operations. */ struct drm_panthor_obj_array ops; }; /** * enum drm_panthor_bo_flags - Buffer object flags, passed at creation time. */ enum drm_panthor_bo_flags { /** @DRM_PANTHOR_BO_NO_MMAP: The buffer object will never be CPU-mapped in userspace. */ DRM_PANTHOR_BO_NO_MMAP = (1 << 0), }; /** * struct drm_panthor_bo_create - Arguments passed to DRM_IOCTL_PANTHOR_BO_CREATE. */ struct drm_panthor_bo_create { /** * @size: Requested size for the object * * The (page-aligned) allocated size for the object will be returned. */ __u64 size; /** * @flags: Flags. Must be a combination of drm_panthor_bo_flags flags. */ __u32 flags; /** * @exclusive_vm_id: Exclusive VM this buffer object will be mapped to. * * If not zero, the field must refer to a valid VM ID, and implies that: * - the buffer object will only ever be bound to that VM * - cannot be exported as a PRIME fd */ __u32 exclusive_vm_id; /** * @handle: Returned handle for the object. * * Object handles are nonzero. */ __u32 handle; /** @pad: MBZ. */ __u32 pad; }; /** * struct drm_panthor_bo_mmap_offset - Arguments passed to DRM_IOCTL_PANTHOR_BO_MMAP_OFFSET. */ struct drm_panthor_bo_mmap_offset { /** @handle: Handle of the object we want an mmap offset for. */ __u32 handle; /** @pad: MBZ. */ __u32 pad; /** @offset: The fake offset to use for subsequent mmap calls. */ __u64 offset; }; /** * struct drm_panthor_queue_create - Queue creation arguments. */ struct drm_panthor_queue_create { /** * @priority: Defines the priority of queues inside a group. Goes from 0 to 15, * 15 being the highest priority. */ __u8 priority; /** @pad: Padding fields, MBZ. */ __u8 pad[3]; /** @ringbuf_size: Size of the ring buffer to allocate to this queue. */ __u32 ringbuf_size; }; /** * enum drm_panthor_group_priority - Scheduling group priority */ enum drm_panthor_group_priority { /** @PANTHOR_GROUP_PRIORITY_LOW: Low priority group. */ PANTHOR_GROUP_PRIORITY_LOW = 0, /** @PANTHOR_GROUP_PRIORITY_MEDIUM: Medium priority group. */ PANTHOR_GROUP_PRIORITY_MEDIUM, /** @PANTHOR_GROUP_PRIORITY_HIGH: High priority group. */ PANTHOR_GROUP_PRIORITY_HIGH, }; /** * struct drm_panthor_group_create - Arguments passed to DRM_IOCTL_PANTHOR_GROUP_CREATE */ struct drm_panthor_group_create { /** @queues: Array of drm_panthor_queue_create elements. */ struct drm_panthor_obj_array queues; /** * @max_compute_cores: Maximum number of cores that can be used by compute * jobs across CS queues bound to this group. * * Must be less or equal to the number of bits set in @compute_core_mask. */ __u8 max_compute_cores; /** * @max_fragment_cores: Maximum number of cores that can be used by fragment * jobs across CS queues bound to this group. * * Must be less or equal to the number of bits set in @fragment_core_mask. */ __u8 max_fragment_cores; /** * @max_tiler_cores: Maximum number of tilers that can be used by tiler jobs * across CS queues bound to this group. * * Must be less or equal to the number of bits set in @tiler_core_mask. */ __u8 max_tiler_cores; /** @priority: Group priority (see enum drm_panthor_group_priority). */ __u8 priority; /** @pad: Padding field, MBZ. */ __u32 pad; /** * @compute_core_mask: Mask encoding cores that can be used for compute jobs. * * This field must have at least @max_compute_cores bits set. * * The bits set here should also be set in drm_panthor_gpu_info::shader_present. */ __u64 compute_core_mask; /** * @fragment_core_mask: Mask encoding cores that can be used for fragment jobs. * * This field must have at least @max_fragment_cores bits set. * * The bits set here should also be set in drm_panthor_gpu_info::shader_present. */ __u64 fragment_core_mask; /** * @tiler_core_mask: Mask encoding cores that can be used for tiler jobs. * * This field must have at least @max_tiler_cores bits set. * * The bits set here should also be set in drm_panthor_gpu_info::tiler_present. */ __u64 tiler_core_mask; /** * @vm_id: VM ID to bind this group to. * * All submission to queues bound to this group will use this VM. */ __u32 vm_id; /** * @group_handle: Returned group handle. Passed back when submitting jobs or * destroying a group. */ __u32 group_handle; }; /** * struct drm_panthor_group_destroy - Arguments passed to DRM_IOCTL_PANTHOR_GROUP_DESTROY */ struct drm_panthor_group_destroy { /** @group_handle: Group to destroy */ __u32 group_handle; /** @pad: Padding field, MBZ. */ __u32 pad; }; /** * struct drm_panthor_queue_submit - Job submission arguments. * * This is describing the userspace command stream to call from the kernel * command stream ring-buffer. Queue submission is always part of a group * submission, taking one or more jobs to submit to the underlying queues. */ struct drm_panthor_queue_submit { /** @queue_index: Index of the queue inside a group. */ __u32 queue_index; /** * @stream_size: Size of the command stream to execute. * * Must be 64-bit/8-byte aligned (the size of a CS instruction) * * Can be zero if stream_addr is zero too. */ __u32 stream_size; /** * @stream_addr: GPU address of the command stream to execute. * * Must be aligned on 64-byte. * * Can be zero is stream_size is zero too. */ __u64 stream_addr; /** * @latest_flush: FLUSH_ID read at the time the stream was built. * * This allows cache flush elimination for the automatic * flush+invalidate(all) done at submission time, which is needed to * ensure the GPU doesn't get garbage when reading the indirect command * stream buffers. If you want the cache flush to happen * unconditionally, pass a zero here. */ __u32 latest_flush; /** @pad: MBZ. */ __u32 pad; /** @syncs: Array of struct drm_panthor_sync_op sync operations. */ struct drm_panthor_obj_array syncs; }; /** * struct drm_panthor_group_submit - Arguments passed to DRM_IOCTL_PANTHOR_VM_BIND */ struct drm_panthor_group_submit { /** @group_handle: Handle of the group to queue jobs to. */ __u32 group_handle; /** @pad: MBZ. */ __u32 pad; /** @queue_submits: Array of drm_panthor_queue_submit objects. */ struct drm_panthor_obj_array queue_submits; }; /** * enum drm_panthor_group_state_flags - Group state flags */ enum drm_panthor_group_state_flags { /** * @DRM_PANTHOR_GROUP_STATE_TIMEDOUT: Group had unfinished jobs. * * When a group ends up with this flag set, no jobs can be submitted to its queues. */ DRM_PANTHOR_GROUP_STATE_TIMEDOUT = 1 << 0, /** * @DRM_PANTHOR_GROUP_STATE_FATAL_FAULT: Group had fatal faults. * * When a group ends up with this flag set, no jobs can be submitted to its queues. */ DRM_PANTHOR_GROUP_STATE_FATAL_FAULT = 1 << 1, }; /** * struct drm_panthor_group_get_state - Arguments passed to DRM_IOCTL_PANTHOR_GROUP_GET_STATE * * Used to query the state of a group and decide whether a new group should be created to * replace it. */ struct drm_panthor_group_get_state { /** @group_handle: Handle of the group to query state on */ __u32 group_handle; /** * @state: Combination of DRM_PANTHOR_GROUP_STATE_* flags encoding the * group state. */ __u32 state; /** @fatal_queues: Bitmask of queues that faced fatal faults. */ __u32 fatal_queues; /** @pad: MBZ */ __u32 pad; }; /** * struct drm_panthor_tiler_heap_create - Arguments passed to DRM_IOCTL_PANTHOR_TILER_HEAP_CREATE */ struct drm_panthor_tiler_heap_create { /** @vm_id: VM ID the tiler heap should be mapped to */ __u32 vm_id; /** @initial_chunk_count: Initial number of chunks to allocate. */ __u32 initial_chunk_count; /** @chunk_size: Chunk size. Must be a power of two at least 256KB large. */ __u32 chunk_size; /** @max_chunks: Maximum number of chunks that can be allocated. */ __u32 max_chunks; /** * @target_in_flight: Maximum number of in-flight render passes. * * If the heap has more than tiler jobs in-flight, the FW will wait for render * passes to finish before queuing new tiler jobs. */ __u32 target_in_flight; /** @handle: Returned heap handle. Passed back to DESTROY_TILER_HEAP. */ __u32 handle; /** @tiler_heap_ctx_gpu_va: Returned heap GPU virtual address returned */ __u64 tiler_heap_ctx_gpu_va; /** * @first_heap_chunk_gpu_va: First heap chunk. * * The tiler heap is formed of heap chunks forming a single-link list. This * is the first element in the list. */ __u64 first_heap_chunk_gpu_va; }; /** * struct drm_panthor_tiler_heap_destroy - Arguments passed to DRM_IOCTL_PANTHOR_TILER_HEAP_DESTROY */ struct drm_panthor_tiler_heap_destroy { /** @handle: Handle of the tiler heap to destroy */ __u32 handle; /** @pad: Padding field, MBZ. */ __u32 pad; }; #if defined(__cplusplus) } #endif #endif /* _PANTHOR_DRM_H_ */ nvtop-3.2.0/src/panthor_utils.h000066400000000000000000000014161477175131100165260ustar00rootroot00000000000000/* * * Copyright (C) 2023 Adrian Larumbe * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include const char * panthor_device_name(uint32_t gpu_id); nvtop-3.2.0/src/plot.c000066400000000000000000000121471477175131100146070ustar00rootroot00000000000000/* * * Copyright (C) 2019-2021 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/plot.h" #include "nvtop/common.h" #include #include #include #include #include static inline int data_level(double rows, double data, double increment) { return (int)(rows - round(data / increment)); } void nvtop_line_plot(WINDOW *win, size_t num_data, const double *data, unsigned num_lines, bool legend_left, char legend[MAX_LINES_PER_PLOT][PLOT_MAX_LEGEND_SIZE]) { if (num_data == 0) return; int rows, cols; getmaxyx(win, rows, cols); rows -= 1; double increment = 100. / (double)(rows); assert(num_lines <= MAX_LINES_PER_PLOT && "Cannot plot more than " EXPAND_AND_QUOTE(MAX_LINES_PER_PLOT) " lines"); unsigned lvl_before[MAX_LINES_PER_PLOT]; for (size_t k = 0; k < num_lines; ++k) lvl_before[k] = data_level(rows, data[k], increment); for (size_t i = 0; i < num_data || i < (size_t)cols; i += num_lines) { for (unsigned k = 0; k < num_lines; ++k) { unsigned lvl_now_k = data_level(rows, data[i + k], increment); wcolor_set(win, k + 1, NULL); // Three cases: has increased, has decreased and remained level if (lvl_before[k] < lvl_now_k || lvl_before[k] > lvl_now_k) { // Case 1 and 2: has increased/decreased // An increase goes down on the plot because (0,0) is top left bool drawing_down = lvl_before[k] < lvl_now_k; unsigned bottom = drawing_down ? lvl_before[k] : lvl_now_k; unsigned top = drawing_down ? lvl_now_k : lvl_before[k]; // Draw the vertical line corners mvwaddch(win, bottom, i + k, drawing_down ? ACS_URCORNER : ACS_ULCORNER); mvwaddch(win, top, i + k, drawing_down ? ACS_LLCORNER : ACS_LRCORNER); // Draw the vertical line between the corners if (top - bottom > 1) { mvwvline(win, bottom + 1, i + k, 0, top - bottom - 1); } // Draw the continuation of the other metrics for (unsigned j = 0; j < num_lines; ++j) { if (j != k) { if (lvl_before[j] == top) // The continuation is at the same level as the bottom corner mvwaddch(win, top, i + k, ACS_BTEE); else if (lvl_before[j] == bottom) // The continuation is at the same level as the top corner mvwaddch(win, bottom, i + k, ACS_TTEE); else if (lvl_before[j] > bottom && lvl_before[j] < top) // The continuation lies on the vertical line mvwaddch(win, lvl_before[j], i + k, ACS_PLUS); else { // The continuation lies outside the update interval so keep the // color wcolor_set(win, j + 1, NULL); mvwaddch(win, lvl_before[j], i + k, ACS_HLINE); wcolor_set(win, k + 1, NULL); } } } } else { // Case 3: stayed level mvwhline(win, lvl_now_k, i + k, 0, 1); for (unsigned j = 0; j < num_lines; ++j) { if (j != k) { if (lvl_before[j] != lvl_now_k) { // Add the continuation of other metric lines wcolor_set(win, j + 1, NULL); mvwaddch(win, lvl_before[j], i + k, ACS_HLINE); wcolor_set(win, k + 1, NULL); } } } } lvl_before[k] = lvl_now_k; } } int plot_y_position = 0; for (unsigned i = 0; i < num_lines && plot_y_position < rows; ++i) { wcolor_set(win, i + 1, NULL); if (legend_left) { mvwprintw(win, plot_y_position, 0, "%.*s", cols, legend[i]); } else { size_t length = strlen(legend[i]); if (length <= (size_t)cols) { mvwprintw(win, plot_y_position, cols - length, "%s", legend[i]); } else { mvwprintw(win, plot_y_position, 0, "%.*s", (int)(length - cols), legend[i]); } } plot_y_position++; } } void draw_rectangle(WINDOW *win, unsigned startX, unsigned startY, unsigned sizeX, unsigned sizeY) { mvwhline(win, startY, startX + 1, 0, sizeX - 2); mvwhline(win, startY + sizeY - 1, startX + 1, 0, sizeX - 2); mvwvline(win, startY + 1, startX, 0, sizeY - 2); mvwvline(win, startY + 1, startX + sizeX - 1, 0, sizeY - 2); mvwaddch(win, startY, startX, ACS_ULCORNER); mvwaddch(win, startY, startX + sizeX - 1, ACS_URCORNER); mvwaddch(win, startY + sizeY - 1, startX, ACS_LLCORNER); mvwaddch(win, startY + sizeY - 1, startX + sizeX - 1, ACS_LRCORNER); } nvtop-3.2.0/src/time.c000066400000000000000000000023741477175131100145700ustar00rootroot00000000000000/* * * Copyright (C) 2018-2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include "nvtop/time.h" extern inline void nvtop_get_current_time(nvtop_time *time); extern inline double nvtop_difftime(nvtop_time t0, nvtop_time t1); extern inline uint64_t nvtop_difftime_u64(nvtop_time t0, nvtop_time t1); extern inline uint64_t nvtop_time_u64(nvtop_time t0); extern inline nvtop_time nvtop_add_time(nvtop_time t0, nvtop_time t1); extern inline nvtop_time nvtop_substract_time(nvtop_time t0, nvtop_time t1); extern inline nvtop_time nvtop_hmns_to_time(unsigned hour, unsigned minutes, unsigned long nanosec); nvtop-3.2.0/tests/000077500000000000000000000000001477175131100140335ustar00rootroot00000000000000nvtop-3.2.0/tests/CMakeLists.txt000066400000000000000000000015061477175131100165750ustar00rootroot00000000000000find_package(GTest) if (BUILD_TESTING AND GTest_FOUND) option(THOROUGH_TESTING "Enable extensive testing (takes hours, e.g., use once per release)" OFF) # Create a library for testing add_library(testLib ${PROJECT_SOURCE_DIR}/src/interface_layout_selection.c ${PROJECT_SOURCE_DIR}/src/extract_processinfo_fdinfo.c ${PROJECT_SOURCE_DIR}/src/interface_options.c ${PROJECT_SOURCE_DIR}/src/ini.c ) target_include_directories(testLib PUBLIC ${PROJECT_SOURCE_DIR}/include ${PROJECT_BINARY_DIR}/include) # Tests add_executable( interfaceTests interfaceTests.cpp ) target_link_libraries(interfaceTests PRIVATE testLib GTest::gtest_main) gtest_discover_tests(interfaceTests) if (THOROUGH_TESTING) target_compile_definitions(interfaceTests PRIVATE THOROUGH_TESTING) endif() endif() nvtop-3.2.0/tests/interfaceTests.cpp000066400000000000000000000234101477175131100175220ustar00rootroot00000000000000/* * * Copyright (C) 2022 Maxime Schmitt * * This file is part of Nvtop. * * Nvtop is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Nvtop is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with nvtop. If not, see . * */ #include #include #include #include extern "C" { #include "nvtop/interface.h" #include "nvtop/interface_layout_selection.h" } static std::ostream &operator<<(std::ostream &os, const struct window_position &win) { os << "Win (" << win.posX << ", " << win.posY << ")--(" << win.posX + win.sizeX << "," << win.posY + win.sizeY << ")"; return os; } namespace { // Returns true if the two windows overlap, false otherwise. bool window_position_overlap(struct window_position &w1, struct window_position &w2) { bool overlapX = w1.posX == w2.posX || (w1.posX < w2.posX && w1.posX + w1.sizeX - 1 >= w2.posX) || (w1.posX > w2.posX && w2.posX + w2.sizeX - 1 >= w1.posX); bool overlapY = w1.posY == w2.posY || (w1.posY < w2.posY && w1.posY + w1.sizeY - 1 >= w2.posY) || (w1.posY > w2.posY && w2.posY + w2.sizeY - 1 >= w1.posY); return overlapX && overlapY; } bool window_is_empty(const struct window_position &w1) { return w1.sizeX == 0 || w1.sizeY == 0; } // Check that the window is not empty // Returns true if the window is not empty bool check_non_empty_window(const struct window_position &w1) { EXPECT_GT(w1.sizeX, 0) << "Window " << w1 << " should not be empty"; EXPECT_GT(w1.sizeY, 0) << "Window " << w1 << " should not be empty"; return not window_is_empty(w1); } // Check that the none of the windows overlap any other bool check_no_windows_overlap(std::vector &windows) { bool has_overlap = false; for (unsigned winId = 0; winId < windows.size(); ++winId) { struct window_position ¤tWin = windows[winId]; for (unsigned winCompareId = winId + 1; winCompareId < windows.size(); ++winCompareId) { struct window_position &compareTo = windows[winCompareId]; bool overlaps = window_position_overlap(currentWin, compareTo); EXPECT_FALSE(overlaps) << "Between " << currentWin << " and " << compareTo; has_overlap = has_overlap || overlaps; } } return !has_overlap; } // Check that win does not extend past the container // Returns true if win is contained inside the container bool check_window_inside(const struct window_position &win, const struct window_position &container) { bool insideX = win.posX >= container.posX && win.posX + win.sizeX - 1 <= container.posX + container.sizeX - 1; EXPECT_TRUE(insideX) << win << " is not inside " << container; bool insideY = win.posY >= container.posY && win.posY + win.sizeY - 1 <= container.posY + container.sizeY - 1; EXPECT_TRUE(insideY) << win << " is not inside " << container; return insideX && insideY; } // Check that w1 is below w2 bool check_window_below(const struct window_position &w1, const struct window_position &w2) { EXPECT_GT(w1.posY, w2.posY + w2.sizeY - 1) << w1 << " is not below " << w2; return w1.posY > w2.posY + w2.sizeY - 1; } // Returns true if the layout is valid bool check_layout(struct window_position screen, std::vector &dev_pos, std::vector &plot_position, struct window_position process_position, struct window_position setup_position) { bool layout_valid = true; // Header // A particularity of the header is that it can be bigger than the screen for (auto const &dev_win : dev_pos) { bool valid = check_non_empty_window(dev_win); if (!valid) std::cout << "Error with header window: " << dev_win << std::endl; layout_valid = layout_valid && valid; } layout_valid = layout_valid && check_no_windows_overlap(dev_pos); // Plots for (auto const &plot_win : plot_position) { bool valid = check_non_empty_window(plot_win); if (!valid) std::cout << "Error with plot window: " << plot_win << std::endl; layout_valid = layout_valid && valid; } for (auto const &dev_win : dev_pos) { for (auto const &plot_win : plot_position) { layout_valid = layout_valid && check_window_below(plot_win, dev_win); layout_valid = layout_valid && check_window_inside(plot_win, screen); } } layout_valid = layout_valid && check_no_windows_overlap(plot_position); // Processes for (auto const &plot_win : plot_position) { layout_valid = layout_valid && check_window_below(process_position, plot_win); } if (not window_is_empty(process_position)) layout_valid = layout_valid && check_window_inside(process_position, screen); return layout_valid; } bool test_with_terminal_size(unsigned device_count, unsigned header_rows, unsigned header_cols, unsigned rows, unsigned cols) { struct window_position screen = {.posX = 0, .posY = 0, .sizeX = cols, .sizeY = rows}; nvtop_interface_gpu_opts to_draw_default = {.to_draw = plot_default_draw_info()}; std::vector plot_display(device_count, to_draw_default); process_field_displayed proc_display = process_default_displayed_field(); unsigned num_plots = 0; std::vector dev_positions(device_count); std::vector plot_positions(MAX_CHARTS); struct window_position process_position; struct window_position setup_position; std::vector map_dev_to_plot(device_count); compute_sizes_from_layout(device_count, header_rows, header_cols, rows, cols, plot_display.data(), proc_display, dev_positions.data(), &num_plots, plot_positions.data(), map_dev_to_plot.data(), &process_position, &setup_position, false); plot_positions.resize(num_plots); return check_layout(screen, dev_positions, plot_positions, process_position, setup_position); } } // namespace TEST(InterfaceLayout, LayoutSelection_issue_147) { test_with_terminal_size(8, 3, 78, 26, 189); } TEST(InterfaceLayout, CheckEmptyProcessWindow) { unsigned device_count = 3, header_rows = 3, header_cols = 55, rows = 4, cols = 120; struct window_position screen = {.posX = 0, .posY = 0, .sizeX = cols, .sizeY = rows}; nvtop_interface_gpu_opts to_draw_default = {.to_draw = plot_default_draw_info()}; std::vector plot_display(device_count, to_draw_default); process_field_displayed proc_display = process_default_displayed_field(); unsigned num_plots = 0; std::vector dev_positions(device_count); std::vector plot_positions(MAX_CHARTS); struct window_position process_position; struct window_position setup_position; std::vector map_dev_to_plot(device_count); compute_sizes_from_layout(device_count, header_rows, header_cols, rows, cols, plot_display.data(), proc_display, dev_positions.data(), &num_plots, plot_positions.data(), map_dev_to_plot.data(), &process_position, &setup_position, false); plot_positions.resize(num_plots); EXPECT_EQ(num_plots, 0); EXPECT_TRUE(window_is_empty(process_position)); } TEST(InterfaceLayout, FixInfiniteLoop) { unsigned device_count = 3, header_rows = 3, header_cols = 55, rows = 22, cols = 25; struct window_position screen = {.posX = 0, .posY = 0, .sizeX = cols, .sizeY = rows}; nvtop_interface_gpu_opts to_draw_default = {.to_draw = plot_default_draw_info()}; std::vector plot_display(device_count, to_draw_default); process_field_displayed proc_display = process_default_displayed_field(); unsigned num_plots = 0; std::vector dev_positions(device_count); std::vector plot_positions(MAX_CHARTS); struct window_position process_position; struct window_position setup_position; std::vector map_dev_to_plot(device_count); compute_sizes_from_layout(device_count, header_rows, header_cols, rows, cols, plot_display.data(), proc_display, dev_positions.data(), &num_plots, plot_positions.data(), map_dev_to_plot.data(), &process_position, &setup_position, false); plot_positions.resize(num_plots); } TEST(InterfaceLayout, LayoutSelection_test_fail_case1) { test_with_terminal_size(32, 3, 55, 16, 1760); } #ifdef THOROUGH_TESTING TEST(InterfaceLayout, CheckManyTermSize) { const std::array dev_count_to_test = {0, 1, 2, 3, 6, 16, 32, 64}; const std::map extra_increment = {{0, 0}, {1, 0}, {2, 0}, {3, 0}, {6, 4}, {16, 6}, {32, 8}, {64, 17}}; for (unsigned dev_count : dev_count_to_test) { for (unsigned screen_rows = 1; screen_rows < 2048; screen_rows += 1 + extra_increment.at(dev_count)) { for (unsigned screen_cols = 1; screen_cols < 2048; screen_cols += 1 + extra_increment.at(dev_count)) { for (unsigned header_cols = 55; header_cols < 120; header_cols += 1 + extra_increment.at(dev_count)) { ASSERT_TRUE(test_with_terminal_size(dev_count, 3, header_cols, screen_rows, screen_cols)) << "Problem found with " << dev_count << " devices, (" << 3 << ", header " << header_cols << "), terminal size (" << screen_rows << ", " << screen_cols << ")"; } } } } } #endif // THOROUGH_TESTING